Patents by Inventor Chun-Yi Wu

Chun-Yi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11417801
    Abstract: A micro light-emitting diode (LED) includes an epitaxial layered structure including a support layer, a first-type semiconductor element, an active layer, and a second-type semiconductor element that are sequentially disposed on one another in such order. A method for manufacturing a micro LED device including at least one of the micro LED is also disclosed.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: August 16, 2022
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Cuicui Sheng, Chun Kai Huang, Chun-Yi Wu
  • Patent number: 11398546
    Abstract: A semiconductor device is provided. The semiconductor device includes a channel layer disposed over a substrate, a barrier layer disposed over the channel layer, a compound semiconductor layer disposed over the barrier layer, a gate electrode disposed over the compound semiconductor layer, and a source electrode and a drain electrode disposed on opposite sides of the gate electrode. The source electrode and the drain electrode penetrate through at least a portion of the barrier layer. The semiconductor device also includes a source field plate connected to the source electrode through a source contact. The semiconductor device further includes a first electric field redistribution pattern disposed on the barrier layer and directly under the edge of the source field plate.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: July 26, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chun-Yi Wu, Chih-Yen Chen, Chang-Xiang Hung, Chia-Ching Huang
  • Publication number: 20220199438
    Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to form a groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 23, 2022
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsiu-Mei Yu, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu
  • Publication number: 20220149170
    Abstract: A chip structure includes a substrate, a bottom conductive layer, a semiconductor layer, an interlayer dielectric layer, at least one electrode, and at least one top electrode. The substrate includes in order a core layer and a composite material. The bottom conductive layer is disposed on the bottom surface of the core layer, the semiconductor layer is disposed on the substrate, and an interlayer dielectric layer is disposed on the semiconductor layer. The at least one electrode is disposed between the semiconductor layer and the interlayer dielectric layer, and the at least one top electrode is disposed on the interlayer dielectric layer and electrically coupled to the at least one electrode.
    Type: Application
    Filed: November 11, 2020
    Publication date: May 12, 2022
    Inventors: Hsiu-Mei Yu, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu
  • Patent number: 11329124
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an isolation element over the magnetic element. The isolation element partially covers a top surface of the magnetic element. The semiconductor device structure further includes a conductive line over the isolation element. In addition, the semiconductor device structure includes a dielectric layer over the conductive line and the magnetic element.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: May 10, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Chi-Cheng Chen, Hon-Lin Huang, Wei-Li Huang, Chun-Yi Wu, Chen-Shien Chen
  • Patent number: 11309201
    Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to forma groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: April 19, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Hsiu-Mei Yu, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu
  • Patent number: 11289407
    Abstract: A package structure is provided. The package structure includes a die, a lead frame, and a conductive glue. The lead frame includes a die pad and a retaining wall structure. The die pad is configured to support the die, and the retaining wall structure surrounds the die. The conductive glue is disposed between the die and the lead frame.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: March 29, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen Chen, Chun-Yi Wu
  • Publication number: 20220077370
    Abstract: A light-emitting component includes a light-emitting unit and an electrically insulating layer. The light-emitting unit includes a first semiconductor layer, an active layer, and a second semiconductor layer, which are stacked on one another along a stacking direction in such order. The second semiconductor has a lower surface distal from the active layer. The electrically insulating layer is disposed to cover a first portion and to expose a second portion of the lower surface of the second semiconductor layer. A fluorine-containing region is formed in the second semiconductor layer. Methods for making the light-emitting component are also disclosed.
    Type: Application
    Filed: November 15, 2021
    Publication date: March 10, 2022
    Inventors: Dongyan ZHANG, Yuehua JIA, Chun-Yi WU, Wen LIU, Jing WANG, Huan-Shao KUO, Huiwen LI, Duxiang WANG
  • Publication number: 20210398883
    Abstract: A package structure is provided. The package structure includes a die, a lead frame, and a conductive glue. The lead frame includes a die pad and a retaining wall structure. The die pad is configured to support the die, and the retaining wall structure surrounds the die. The conductive glue is disposed between the die and the lead frame.
    Type: Application
    Filed: June 23, 2020
    Publication date: December 23, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen CHEN, Chun-Yi WU
  • Patent number: 11201234
    Abstract: A high-electron mobility transistor (HEMT) includes a substrate, a group III-V channel layer, a group III-V barrier layer, a group III-V cap layer, a source electrode, a first drain electrode, a second drain electrode, and a connecting portion. The group III-V channel layer, the group III-V barrier layer, and the group III-V cap layer are sequentially disposed on the substrate. The source electrode is disposed at one side of the group III-V cap layer, and the first and second drain electrodes are disposed at another side of the group III-V cap layer. The bottom surface of the first drain electrode is separated from the bottom surface of the second drain electrode, and the composition of the first drain electrode is different from the composition of the second drain electrode. The connecting portion is electrically coupled to the first drain electrode and the second drain electrode.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: December 14, 2021
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chia-Ching Huang, Chih-Yen Chen, Chun-Yi Wu, Chih-Jen Hsiao
  • Publication number: 20210376054
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an isolation layer covering the magnetic element and a portion of the semiconductor substrate. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding edges of the magnetic element.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Cheng CHEN, Wei-Li HUANG, Chun-Yi WU, Kuang-Yi WU, Hon-Lin HUANG, Chih-Hung SU, Chin-Yu KU, Chen-Shien CHEN
  • Publication number: 20210358786
    Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to forma groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: Hsiu-Mei Yu, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu
  • Publication number: 20210305143
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.
    Type: Application
    Filed: March 24, 2020
    Publication date: September 30, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen CHEN, Hsin-Chang TSAI, Chun-Yi WU, Chia-Ching HUANG, Chih-Jen HSIAO, Wei-Chan CHANG, Francois HEBERT
  • Patent number: 11133246
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: September 28, 2021
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen Chen, Hsin-Chang Tsai, Chun-Yi Wu, Chia-Ching Huang, Chih-Jen Hsiao, Wei-Chan Chang, Francois Hebert
  • Publication number: 20210289852
    Abstract: A face mask structure and a method of manufacturing the same are provided. The face mask structure includes a main structure layer and an elastic structure layer. The elastic structure layer is disposed on a surface layer of the main structure layer so as to fully cover the surface layer. The elastic structure layer includes an elastic ear strap layer partially separatably disposed on the surface layer of the main structure layer, the elastic ear strap layer includes two elastic ear strap portions separatably connected with each other through a tear-off line. Each of the two elastic ear strap portions has two opposite ends separated from each other. After the two elastic ear strap portions are separated from each other by ripping or tearing along the tear-off line, two ears of a user can respectively wear the two elastic ear strap portions when using the face mask structure.
    Type: Application
    Filed: May 7, 2020
    Publication date: September 23, 2021
    Inventors: CHIEN-SHOU LIAO, CHI-JEN LAN, KUO-PIN CHUAN, JUNG-CHIN SHEN, CHUN-YI WU
  • Publication number: 20210288285
    Abstract: A method of manufacturing a flip-chip light emitting diode includes: providing a transparent substrate and a temporary substrate, and bonding the transparent substrate with the temporary substrate; grinding and thinning the transparent substrate; providing a light-emitting epitaxial laminated layer having a first surface and a second surface opposite to each other, and including a first semiconductor layer, an active layer and a second semiconductor layer; forming a transparent bonding medium layer over the first surface of the light-emitting epitaxial laminated layer, and bonding the transparent bonding medium layer with the transparent substrate; defining a first electrode region and a second electrode region over the second surface of the light-emitting epitaxial laminated layer, and manufacturing a first electrode and a second electrode; and removing the temporary substrate.
    Type: Application
    Filed: June 2, 2021
    Publication date: September 16, 2021
    Applicant: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Wei-ping XIONG, Shu-Fan YANG, Chun-Yi WU, Chaoyu WU
  • Patent number: 11094776
    Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a passivation layer over a semiconductor substrate. The method also includes forming a magnetic element over the passivation layer. The method further includes forming an isolation layer over the magnetic element and the passivation layer. The isolation layer includes a polymer material. In addition, the method includes forming a conductive line over the isolation layer, and the conductive line extends across the magnetic element.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 17, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Cheng Chen, Wei-Li Huang, Chun-Yi Wu, Kuang-Yi Wu, Hon-Lin Huang, Chih-Hung Su, Chin-Yu Ku, Chen-Shien Chen
  • Publication number: 20210226095
    Abstract: Provided are a light-emitting diode and a manufacturing method thereof, comprising: a luminescent epitaxial layer, comprising a first semiconductor layer (110), a light-emitting layer (120) and a second semiconductor layer (130) from bottom to top in sequence; a transparent dielectric layer (200), at least formed on the second semiconductor layer (130), the transparent dielectric layer (200) has a platform (210) and a series of openings (220); the transparent dielectric layer (200) has an ohmic contact layer (310) in the opening (220), a transition layer (320) is provided between the ohmic contact layer (310) and the second semiconductor layer (130).
    Type: Application
    Filed: April 9, 2021
    Publication date: July 22, 2021
    Inventors: Jing WANG, Huan Shao KUO, Chun-Yi WU
  • Patent number: 11056669
    Abstract: A method of manufacturing a flip-chip light emitting diode includes: providing a transparent substrate and a temporary substrate, and bonding the transparent substrate with the temporary substrate; grinding and thinning the transparent substrate; providing a light-emitting epitaxial laminated layer having a first surface and a second surface opposite to each other, and including a first semiconductor layer, an active layer and a second semiconductor layer; forming a transparent bonding medium layer over the first surface of the light-emitting epitaxial laminated layer, and bonding the transparent bonding medium layer with the transparent substrate; defining a first electrode region and a second electrode region over the second surface of the light-emitting epitaxial laminated layer, and manufacturing a first electrode and a second electrode; and removing the temporary substrate.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: July 6, 2021
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Shu-Fan Yang, Chun-Yi Wu, Chaoyu Wu
  • Publication number: 20210159370
    Abstract: A micro light-emitting device includes a micro light-emitting diode and a light-emitting structure. The micro light-emitting diode includes a semiconductor light-emitting unit that emits an excitation light having a first wavelength. The light-emitting structure is disposed on the micro light-emitting diode, and is configured to be excited by the excitation light to emit an excited light having a second wavelength. The light-emitting structure is a multiple quantum well structure. A display including the micro light-emitting device is also disclosed.
    Type: Application
    Filed: January 6, 2021
    Publication date: May 27, 2021
    Inventors: Chen-ke Hsu, Chia-en Lee, Chun-Yi Wu, Shaohua Huang