Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate, where a top portion of the fin comprises a layer stack that includes alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin; forming openings in the fin on opposing sides of the dummy gate structure; forming source/drain regions in the openings; removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material under the dummy gate structure; performing a first etching process to selectively remove the exposed first semiconductor material, where after the first etching process, the exposed second semiconductor material form nanostructures, where each of the nanostructures has a first shape; and after the first etching process, performing a second etching process to reshape each of the nanostructures into a second shape different from the first shape.

Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.

Abstract: The invention is related to a class of hydrophilic poly(meth)acrylamide-based copolymers each comprising dangling (i.e., pendant) reactive chains each terminated with a carboxyl group groups and at least 50% by mole of (meth)acrylamide repeating units relative to all repeating units of the hydrophilic poly(meth)acrylamide-based copolymer. The hydrophilic copolymers have a relatively high affinity to a base coating of a polyanionic polymer on a medical device or contact lens and are highly reactive towards azetidinium groups of an azetidinium-containing polymer upon heating. They can find particular use in producing water-soluble highly-branched hydrophilic polymeric material and in producing water gradient contact lenses.

Abstract: A speaker device is installed in an electronic device, and the speaker device includes a speaker module and a first loop tube. The speaker module has a casing and a speaker unit. The casing has a main sound cavity and a sound outlet. The speaker unit is disposed in the casing, and the speaker unit includes a diaphragm, which is communicated with the sound outlet. The first loop tube has a first end and a second end, and the first end is connected to the casing. The length of the first loop tube is at least 10 mm, and the inner diameter of the first loop tube is at least 2 mm.

Abstract: An imaging lens assembly module includes a lens barrel, a catadioptric lens assembly, an imaging lens assembly, a first fixing element and a second fixing element. The lens barrel has a first relying surface and a second relying surface, which face towards an object side of the imaging lens assembly module. The catadioptric lens assembly relies on the first relying surface. The imaging lens assembly is disposed on an image side of the catadioptric lens assembly, and relies on the second relying surface. The first fixing element is for fixing the catadioptric lens assembly to the lens barrel. The second fixing element is for fixing the imaging lens assembly to the lens barrel. The catadioptric lens assembly is for processing at least twice internal reflections of an image light in the imaging lens assembly module, and for providing optical refractive power.

Abstract: A chemical mechanical polishing system includes a platen to support a polishing pad having a polishing surface, a conduit having an inlet to be coupled to a gas source, and a dispenser coupled to the conduit and having a convergent-divergent nozzle suspended over the platen to direct gas from the gas source onto the polishing surface of the polishing pad.

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

Abstract: A microfluidic detection unit comprises at least one fluid injection section, a fluid storage section and a detection section. Each fluid injection section defines a fluid outlet; the fluid storage section is in gas communication with the atmosphere and defines a fluid inlet; the detection section defines a first end in communication with the fluid outlet and a second end in communication with the fluid inlet. A height difference is defined between the fluid outlet and the fluid inlet along the direction of gravity. When a first fluid is injected from the at least one fluid injection section, the first fluid is driven by gravity to pass through the detection section and accumulate to form a droplet at the fluid inlet, such that a state of fluid pressure equilibrium of the first fluid is established.

Abstract: An actuating and sensing module is disclosed and includes a bottom plate, a gas pressure sensor, a thin gas transportation device and a cover plate. The bottom plate includes a pressure relief orifice, a discharging orifice and a communication orifice. The gas pressure sensor is disposed on the bottom plate and seals the communication orifice. The thin gas transportation device is disposed on the bottom plate and seals the pressure relief orifice and the discharging orifice. The cover plate is disposed on the bottom plate and covers the gas pressure sensor and the thin gas-transportation device. The cover plate includes an intake orifice. The thin gas transportation device is driven to inhale gas through the intake orifice, the gas is then discharged through the discharging orifice by the thin gas transportation device, and a pressure change of the gas is sensed by the gas pressure sensor.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.

Abstract: Integrated circuit structures having channel cap reduction, and methods of fabricating integrated circuit structures having channel cap reduction, are described. For example, an integrated circuit structure includes a sub-fin structure beneath a stack of nanowires, the stack of nanowires having a first end and a second end. A dielectric cap has a first portion vertically over the first end of the stack of nanowires and has a second portion vertically over the second end of the stack of nanowires. The dielectric cap is not vertically over a location between the first end and the second end of the stack of nanowires. A gate electrode is over and around the stack of nanowires and laterally between the first and second portions of the dielectric cap. A gate dielectric structure is between the gate electrode and the stack of nanowires.

Abstract: A MEMS device is provided. The MEMS device includes a substrate having at least one contact, a first dielectric layer disposed on the substrate, at least one metal layer disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the metal layer and having a recess structure, and a structure layer disposed on the second dielectric layer and having an opening. The opening is disposed on and corresponds to the recess structure, and the cross-sectional area at the bottom of the opening is smaller than the cross-sectional area at the top of the recess structure. The MEMS device also includes a sealing layer, and at least a portion of the sealing layer is disposed in the opening and the recess structure. The second dielectric layer, the structure layer, and the sealing layer define a chamber.

Abstract: An integrated circuit (IC) device includes a substrate and a circuit region over the substrate. The circuit region includes at least one active region extending along a first direction, at least one gate region extending across the at least one active region and along a second direction transverse to the first direction, and at least one first input/output (IO) pattern configured to electrically couple the circuit region to external circuitry outside the circuit region. The at least one first IO pattern extends along a third direction oblique to both the first direction and the second direction.

Abstract: Integrated circuit structures having gate cut plugs removed from trench contacts, and methods of fabricating integrated circuit structures having gate cut plugs removed from trench contacts, are described. For example, an integrated circuit structure includes a vertical stack of horizontal nanowires. A gate electrode is over the vertical stack of horizontal nanowires. A conductive trench contact is adjacent to the gate electrode. A dielectric sidewall spacer is between the gate electrode and the conductive trench contact. A gate cut plug extends through the gate electrode and the dielectric sidewall spacer. The gate cut plug extends to and is conformal with a side of the conductive trench contact.

Abstract: A semiconductor structure includes a semiconductor die, a redistribution circuit structure, and a terminal. The redistribution circuit structure is disposed on and electrically coupled to the semiconductor die. The terminal is disposed on and electrically coupled to the redistribution circuit structure, where the redistribution circuit structure is disposed between the semiconductor die and the terminal, and the terminal includes an under-bump metallization (UBM) and a capping layer. The UBM is disposed on and electrically coupled to the redistribution circuit structure, where the UBM includes a recess. The capping layer is disposed on and electrically coupled to the UBM, where the UBM is between the capping layer and the redistribution circuit structure, and the capping layer fills the recess of the UBM.

Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.

Abstract: A focus has an opening and an upper surface surrounding the opening. The opening is configured to accommodate a SiC wafer. The SiC wafer has a first surface and a second surface opposite to the first surface. When the focus ring is mounted in a semiconductor wafer processing apparatus and the SiC wafer is positioned in the opening of the focus ring, the upper surface of the focus ring is lower than the first surface of the SiC wafer and is higher than the second surface of the SiC wafer.

Abstract: The invention is related to contact lenses that not only comprise the much desired water gradient structural configurations, but also have a minimized uptakes of polycationic antimicrobials and a long-lasting surface hydrophilicity and wettability even after going through a 30-days lens care regime. Because of the water gradient structural configuration and a relatively-thick, extremely-soft and water-rich hydrogel surface layer, a contact lens of the invention can provide superior wearing comfort. Further, a contact lens of the invention is compatible with multipurpose lens care solutions present in the market and can endure the harsh lens care handling conditions (e.g., digital rubbings, accidental inversion of contact lenses, etc.) encountered in a daily lens care regime. As such, they are suitable to be used as weekly- or monthly-disposable water gradient contact lenses.

Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.

Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.