Abstract: An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor.

Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.

Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.

Abstract: A package structure includes a first redistribution layer, a second redistribution layer, at least one semiconductor chip, an insulating encapsulation, a protection layer, and at least one connecting module. The at least one semiconductor chip is located between and electrically connected to the first redistribution layer and the second redistribution layer. The insulating encapsulation encapsulates the at least one semiconductor chip. The protection layer is disposed on and partially covers the first redistribution layer, wherein the first redistribution layer is located between the at least one semiconductor chip and the protection layer.

Abstract: An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and a second redistribution structure. The first redistribution structure has a dielectric layer and a feed line disposed on the dielectric layer. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The insulation encapsulation has a protrusion laterally wraps around the feed line. The insulation encapsulation has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer. The second redistribution structure is disposed on the die and the insulation encapsulation.

Abstract: A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A dielectric layer and a core material layer are sequentially formed on a first carrier. A portion of the core material layer is removed to form a core layer having a plurality of cavities. The first carrier, the dielectric layer, and the core layer are attached onto the package array such that the core layer is located between the dielectric layer and the package array. The first carrier is removed from the dielectric layer. A plurality of first conductive patches is formed on the dielectric layer above the cavities.

Abstract: An integrated fan-out package including an insulating encapsulation, a radio frequency integrated circuit (RF-IC), an antenna, a ground conductor, and a redistribution circuit structure is provided. The integrated circuit includes a plurality of conductive terminals. The RF-IC, the antenna, and the ground conductor are embedded in the insulating encapsulation. The ground conductor is between the RF-IC and the antenna. The redistribution circuit structure is disposed on the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals, the antenna, and the ground conductor. A method of fabricating the integrated fan-out package is also provided.

Abstract: A package structure includes at least one integrated circuit component, an insulating encapsulation, and a redistribution structure. The at least one integrated circuit component includes a semiconductor substrate, an interconnection structure disposed on the semiconductor substrate, and signal terminals and power terminals located on and electrically connecting to the interconnection structure. The interconnection structure is located between the semiconductor substrate and the signal terminals and between the semiconductor substrate and the power terminals, and where a size of the signal terminals is less than a size of the power terminals. The insulating encapsulation encapsulates the at least one integrated circuit component. The redistribution structure is located on the insulating encapsulation and electrically connected to the at least one integrated circuit component.

Abstract: A package structure includes a first redistribution layer, a second redistribution layer, at least one semiconductor chip, an insulating encapsulation, a protection layer, and at least one connecting module. The at least one semiconductor chip is located between and electrically connected to the first redistribution layer and the second redistribution layer. The insulating encapsulation encapsulates the at least one semiconductor chip. The protection layer is disposed on and partially covers the first redistribution layer, wherein the first redistribution layer is located between the at least one semiconductor chip and the protection layer.

Abstract: A semiconductor device includes an active device. The semiconductor device further includes a plurality of antenna grounds electrically connected to the active device. The semiconductor device further includes a plurality of patch antennas, wherein each patch antenna of the plurality of patch antennas is over a corresponding antenna ground of the plurality of antenna grounds. The semiconductor device further includes a plurality of reflectors, wherein each antenna ground of the plurality of antenna ground is between a corresponding patch antenna of the plurality of patch antennas and a corresponding reflector of the plurality of reflectors. An area of each antenna ground of the plurality of antenna grounds is greater than an area of each reflector of the plurality of reflectors.

Abstract: An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and a second redistribution structure. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The second redistribution structure is disposed on the die and the insulation encapsulation. At least one of the first redistribution structure and the second redistribution structure includes a dielectric layer, a feed line, and a signal enhancement layer. The feed line is at least partially disposed on the dielectric layer. The signal enhancement layer covers the feed line. The signal enhancement layer has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer.

Abstract: An integrated fan-out package including an insulating encapsulation, a radio frequency integrated circuit (RF-IC), an antenna, a ground conductor, and a redistribution circuit structure is provided. The integrated circuit includes a plurality of conductive terminals. The RF-IC, the antenna, and the ground conductor are embedded in the insulating encapsulation. The ground conductor is between the RF-IC and the antenna. The redistribution circuit structure is disposed on the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals, the antenna, and the ground conductor.

Abstract: An electronic apparatus is provided. The electronic apparatus includes an integrated fan-out package, a dielectric housing, and a plurality of conductive patterns. The dielectric housing is covering the integrated fan-out package, wherein a gap or a first dielectric layer is in between the dielectric housing and the integrated fan-out package. The plurality of conductive patterns is located on a surface of the dielectric housing, wherein the plurality of conductive patterns is located in between the dielectric housing and the integrated fan-out package.

Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.

Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.

Abstract: An integrated circuit structure includes a substrate, a metal ring penetrating through the substrate, a dielectric region encircled by the metal ring, and a through-via penetrating through the dielectric region. The dielectric region is in contact with the through-via and the metal ring.

Abstract: A package structure includes a sub-package, a conductive structure, and at least one first antenna. The sub-package includes at least one chip. The conductive structure is bonded onto and electrically connected to the sub-package. The at least one first antenna has a vertical polarization and is electrically connected to the at least one chip, wherein the at least one first antenna is partially located in the sub-package, and the at least one first antenna is extended within the sub-package into the conductive structure.

Abstract: An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and a second redistribution structure. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The second redistribution structure is disposed on the die and the insulation encapsulation. At least one of the first redistribution structure and the second redistribution structure includes a dielectric layer, a feed line, and a signal enhancement layer. The feed line is at least partially disposed on the dielectric layer. The signal enhancement layer covers the feed line. The signal enhancement layer has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer.

Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.

Abstract: An integrated fan-out package including an insulating encapsulation, a radio frequency integrated circuit (RF-IC), an antenna, a ground conductor, and a redistribution circuit structure is provided. The integrated circuit includes a plurality of conductive terminals. The RF-IC, the antenna, and the ground conductor are embedded in the insulating encapsulation. The ground conductor is between the RF-IC and the antenna. The redistribution circuit structure is disposed on the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals, the antenna, and the ground conductor. A method of fabricating the integrated fan-out package is also provided.