Abstract: A method for forming a semiconductor device includes providing a semiconductor-on-insulator (SOI) structure, and forming at least one hard mask (HM) layer over the SOI structure. The SOI structure includes an insulator layer and a semiconductor layer over the insulator layer. The method further comprises forming a trench inside the at least one HM layer and the semiconductor layer, and depositing a spacer layer in the trench. The spacer layer comprises a bottom surface portion over the bottom surface of the trench, and a side wall portion along the side wall of the trench. The method further comprises etching the bottom surface portion of the spacer layer while the side wall portion of the spacer layer remains, and etching the insulator layer to extend the trench into the insulator layer.

Abstract: A method of fabricating a semiconductor device includes forming a first insulating layer over a semiconductor substrate, a contact plug within the first insulating layer, an etch stop layer over the first insulating layer, and a second insulating layer over the etch stop layer. The second insulating layer has an opening over the contact plug. A first metal layer, a dielectric material, and a second metal layer are deposited in the opening. The first metal layer engages the contact plug and is free of direct contact with the first insulating layer.

Abstract: A method of fabricating a semiconductor device includes forming a first insulating layer over a semiconductor substrate, a contact plug within the first insulating layer, an etch stop layer over the first insulating layer, and a second insulating layer over the etch stop layer. The second insulating layer has an opening over the contact plug. A first metal layer, a dielectric material, and a second metal layer are deposited in the opening. The first metal layer engages the contact plug and is free of direct contact with the first insulating layer.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure disposed in the semiconductor substrate, a conductive layer disposed over the isolation structure, a capacitor disposed over the isolation structure, the capacitor including a top electrode, a bottom electrode, and a dielectric disposed between the top electrode and the bottom electrode, and a first contact electrically coupling the conductive layer and the bottom electrode, the bottom electrode substantially engaging the first contact on at least two faces.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure disposed in the semiconductor substrate, a conductive layer disposed over the isolation structure, a capacitor disposed over the isolation structure, the capacitor including a top electrode, a bottom electrode, and a dielectric disposed between the top electrode and the bottom electrode, and a first contact electrically coupling the conductive layer and the bottom electrode, the bottom electrode substantially engaging the first contact on at least two faces.

Abstract: A method for fabricating a recessed channel access transistor device is provided. A semiconductor substrate having thereon a recess is provided. A gate dielectric layer is formed in the recess. A gate material layer is then deposited into the recess. A dielectric cap layer is formed on the gate material layer. The dielectric cap layer and the gate material layer are etched to form a gate pattern. A liner layer is then formed on the gate pattern. A spacer is formed on the liner layer on each sidewall of the gate pattern. The liner layer not masked by the spacer is etched to form an undercut recess that exposes a portion of the gate material layer. The spacer is then removed. The exposed portion of the gate material layer in the undercut recess is oxidized to form an insulation block therein.

Abstract: The invention provides a method for forming a deep trench in a substrate. A sacrificial layer and a liner layer are first used to define the deep trench pattern. The sacrificial layer is then replaced with a silicon glass layer. A thick mask layer includes the silicon glass layer, the liner layer and a silicon nitride layer is formed on the substrate. Through an opening of the thick mask layer, a deep trench is etched into the substrate.

Abstract: The invention provides a method for forming a deep trench in a substrate. A sacrificial layer and a liner layer are first used to define the deep trench pattern. The sacrificial layer is then replaced with a silicon glass layer. A thick mask layer includes the silicon glass layer, the liner layer and a silicon nitride layer is formed on the substrate. Through an opening of the thick mask layer, a deep trench is etched into the substrate.

Abstract: The present invention provides an apparatus for supporting a wafer in a semiconductor process. The apparatus includes an electrostatic chuck, a focus ring and a conductive material. The electrostatic chuck has a first fillister in its periphery. When a DC power is applied to the electrostatic chuck, the wafer is attached tightly to the electrostatic chuck by electromagnetic force. The focus ring has a second fillister opposite to the first fillister, and the focus ring is fixed on the periphery of the electrostatic chuck. The conductive material is located below the focus ring, and the conductive material is moving between the first fillister and the second fillister by a drive apparatus. When the conductive material is moving close to the focus ring in semiconductor etching process, it can improve the etching uniformity of the wafer periphery.

Abstract: The present invention provides an apparatus for supporting a wafer in a semiconductor process. The apparatus includes an electrostatic chuck, a focus ring and a conductive material. The electrostatic chuck has a first fillister in its periphery. When a DC power is applied to the electrostatic chuck, the wafer is attached tightly to the electrostatic chuck by electromagnetic force. The focus ring has a second fillister opposite to the first fillister, and the focus ring is fixed on the periphery of the electrostatic chuck. The conductive material is located below the focus ring, and the conductive material is moving between the first fillister and the second fillister by a drive apparatus. When the conductive material is moving close to the focus ring in semiconductor etching process, it can improve the etching uniformity of the wafer periphery.

Abstract: A gas distributing system and a method of operating the distributing system is provided. After setting a few control valve parameters, the gas distributing system automatically adjusts the distribution of plasma gas inside a wafer processing chamber during a dry etching or a film deposition process so that uniform single wafer is produced. First, a main gas conduit is redirected into two separate gas conduit inside a gas separator. One conduit connects with a gas nozzle near the central region of an upper electrode panel distributor and the other conduit connects with a gas nozzle near the peripheral region of the upper electrode panel distributor. An O-ring between the central region and the peripheral region prevents any mixing of gas from the nozzles in these two regions. Gas distribution inside the reaction chamber can be changed to meet the need of different processing conditions by adjusting the flow control valves mounted on the two conduits.