Patents by Inventor Chun-Li Liu
Chun-Li Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11947251Abstract: An illumination system provides an illumination beam and includes a red light source, a green light source, a blue light source, a first supplementary light source, a first X-shaped light-splitting assembly, a first light-splitting element, and a light-uniforming element. The red light source provides a red beam. The green light source provides a green beam. The blue light source provides a blue beam. The first supplementary light source provides a first supplementary beam. The first X-shaped light-splitting assembly guides the first supplementary beam and the blue beam to the first light-splitting element. The first light-splitting element guides the red beam, the green beam, the blue beam, and the first supplementary beam to the light-uniforming element. The first supplementary beam is a red supplementary beam or a blue supplementary beam, and the illumination system includes at least five light-emitting elements. A projection apparatus including the above illumination system is also provided.Type: GrantFiled: March 23, 2022Date of Patent: April 2, 2024Assignee: Coretronic CorporationInventors: Chi-Fu Liu, Tsung-Hsin Liao, Chun-Li Chen, Hung-Yu Lin
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Publication number: 20240094148Abstract: This disclosure relates to an X-ray reflectometry apparatus and a method for measuring a three-dimensional nanostructure on a flat substrate. The X-ray reflectometry apparatus comprises an X-ray source, an X-ray reflector, a 2-dimensional X-ray detector, and a two-axis moving device. The X-ray source is for emitting X-ray. The X-ray reflector is configured for reflecting the X-ray onto a sample surface. The 2-dimensional X-ray detector is configured to collect a reflecting X-ray signal from the sample surface. The two-axis moving device is configured to control two-axis directions of the 2-dimensional X-ray detector to move on at least one of x-axis and z-axis with a formula concerning an incident angle of the X-ray with respect to the sample surface for collecting the reflecting X-ray signal.Type: ApplicationFiled: November 28, 2022Publication date: March 21, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Bo-Ching HE, Chun-Ting LIU, Wei-En FU, Wen-Li WU
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Publication number: 20240096867Abstract: A semiconductor structure is provided and includes a first gate structure, a second gate structure, and at least one local interconnect that extend continuously across a non-active region from a first active region to a second active region. The semiconductor structure further includes a first separation spacer disposed on the first gate structure and first vias on the first gate structure. The first vias are arranged on opposite sides of the first separation spacer are isolated from each other and apart from the first separation spacer by different distances.Type: ApplicationFiled: December 1, 2023Publication date: March 21, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Charles Chew-Yuen YOUNG, Chih-Liang CHEN, Chih-Ming LAI, Jiann-Tyng TZENG, Shun-Li CHEN, Kam-Tou SIO, Shih-Wei PENG, Chun-Kuang CHEN, Ru-Gun LIU
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Patent number: 11917340Abstract: A projection device, including an illumination system, a control element, a driving element, a light valve, and a projection lens, is provided. The illumination system includes multiple light sources for providing multiple light beams to be combined into an illumination light beam. The driving element respectively drives the light sources in a first mode or a second mode, so that the light beams have respective luminous brightness, and the driving element is switched from the first mode to the second mode according to a first signal. The control element provides the first signal to the driving element according to an optical state or a time state of the projection device. The light valve is adapted to convert the illumination light beam into an image light beam. The projection lens is adapted to project the image light beam out of the projection device.Type: GrantFiled: March 24, 2022Date of Patent: February 27, 2024Assignee: Coretronic CorporationInventors: Chi-Fu Liu, Tsung-Hsin Liao, Chun-Li Chen, Hung-Yu Lin
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Patent number: 11914277Abstract: An illumination system for providing an illumination beam includes red, blue, and green light source modules, a first light combining element, and a light uniforming element. The red light source module includes a first red light emitting element emitting first red light and a second red light emitting element emitting second red light. A peak wavelength of the second red light is greater than a peak wavelength of the first red light. The blue light source module includes a first blue light emitting element emitting first blue light and a second blue light emitting element emitting second blue light. A peak wavelength of the second blue light is less than a peak wavelength of the first blue light. The green light source module generates green light. The first light combining element guides these lights into the light uniforming element, so that the illumination system outputs the illumination beam.Type: GrantFiled: January 18, 2022Date of Patent: February 27, 2024Assignee: Coretronic CorporationInventors: Hung-Yu Lin, Chi-Fu Liu, Chun-Hsin Lu, Chun-Li Chen
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Patent number: 10978581Abstract: Implementations of semiconductor devices may include: a plurality of drain fingers and a plurality of source fingers interdigitated with one another; at least one gate; and at gate bus formed to completely surround the plurality of drain fingers and the plurality of source fingers; wherein the gate bus is mechanically and electrically coupled to the at least one gate.Type: GrantFiled: April 18, 2019Date of Patent: April 13, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Woochul Jeon, Chun-Li Liu, Ali Salih
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Patent number: 10930524Abstract: In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. A first electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a first lead. A second electrical interconnect is coupled between the control terminal of the semiconductor device and a second lead.Type: GrantFiled: May 8, 2019Date of Patent: February 23, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chun-Li Liu, Ali Salih, Mingjiao Liu
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Patent number: 10741653Abstract: Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.Type: GrantFiled: September 12, 2019Date of Patent: August 11, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Woochul Jeon, Chun-Li Liu
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Patent number: 10707203Abstract: A method for forming a cascode rectifier structure includes providing a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are provided adjacent a major surface of the heterostructure and a control electrode is provided between the first and second current carrying electrode. A rectifier device is provided integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is provided further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. The cascode rectifier structure is provided as a two terminal device.Type: GrantFiled: December 19, 2018Date of Patent: July 7, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Balaji Padmanabhan, Prasad Venkatraman, Zia Hossain, Chun-Li Liu, Woochul Jeon, Jason McDonald
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Patent number: 10593666Abstract: A cascode switch structure includes a group III-V transistor structure having a first current carrying electrode, a second current carrying electrode and a first control electrode. A semiconductor MOSFET device includes a third current carrying electrode electrically connected to the first current carrying electrode, a fourth current carrying electrode electrically connected to the first control electrode, and a second control electrode. A first diode includes a first cathode electrode electrically connected to the second current carrying electrode and a first anode electrode. A second diode includes a second anode electrode electrically connected to the first anode electrode and a second cathode electrode electrically connected to the fourth current carrying electrode. In one embodiment, the group III-V transistor structure, the first diode, and the second diode are integrated within a common substrate.Type: GrantFiled: December 11, 2018Date of Patent: March 17, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Balaji Padmanabhan, Prasad Venkatraman, Zia Hossain, Chun-Li Liu, Jason McDonald, Ali Salih, Alexander Young
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Publication number: 20200006202Abstract: Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.Type: ApplicationFiled: September 12, 2019Publication date: January 2, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Woochul JEON, Chun-Li LIU
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Patent number: 10431525Abstract: Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.Type: GrantFiled: August 3, 2018Date of Patent: October 1, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Woochul Jeon, Chun-Li Liu
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Patent number: 10418472Abstract: An electronic device can include a HEMT including at least two channel layers. In an embodiment, a lower semiconductor layer overlies a lower channel layer, wherein the lower semiconductor layer has an aluminum content that is at least 10% of a total metal content of the lower semiconductor layer. An upper semiconductor layer overlies the upper channel layer, wherein the upper semiconductor layer has an aluminum content that is greater as compared to the lower semiconductor layer. In another embodiment, an electronic device can include stepped source and drain electrodes, so that lower contact resistance can be achieved. In a further embodiment, an absolute value of a difference between pinch-off or threshold voltages between different channel layers is greater than 1 V and allows current to be turned on or turned off for a channel layer without affecting another channel layer.Type: GrantFiled: April 28, 2017Date of Patent: September 17, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Peter Moens, Jia Guo, Ali Salih, Chun-Li Liu
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Publication number: 20190267252Abstract: In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. A first electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a first lead. A second electrical interconnect is coupled between the control terminal of the semiconductor device and a second lead.Type: ApplicationFiled: May 8, 2019Publication date: August 29, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chun-Li LIU, Ali SALIH, Mingjiao LIU
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Patent number: 10388539Abstract: In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. The control terminal of the first electrical interconnect is coupled to a first lead by a first electrical interconnect. A second electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a second lead. The second current carrying terminal of the first semiconductor device is coupled to the device receiving structure or to the interconnect structure.Type: GrantFiled: July 6, 2016Date of Patent: August 20, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chun-Li Liu, Ali Salih, Mingjiao Liu
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Publication number: 20190245072Abstract: Implementations of semiconductor devices may include: a plurality of drain fingers and a plurality of source fingers interdigitated with one another; at least one gate; and at gate bus formed to completely surround the plurality of drain fingers and the plurality of source fingers; wherein the gate bus is mechanically and electrically coupled to the at least one gate.Type: ApplicationFiled: April 18, 2019Publication date: August 8, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Woochul JEON, Chun-Li LIU, Ali SALIH
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Patent number: 10312359Abstract: Implementations of semiconductor devices may include: a plurality of drain fingers and a plurality of source fingers interdigitated with one another; at least one gate; and at gate bus formed to completely surround the plurality of drain fingers and the plurality of source fingers; wherein the gate bus is mechanically and electrically coupled to the at least one gate.Type: GrantFiled: April 17, 2018Date of Patent: June 4, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Woochul Jeon, Chun-Li Liu, Ali Salih
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Patent number: 10276713Abstract: In accordance with an embodiment, a semiconductor component includes a plurality of layers of compound semiconductor material over a body of semiconductor material and first and second filled trenches extending into the plurality of layers of compound semiconductor material. The first trench has first and second sidewalls and a floor and a first dielectric liner over the first and second sidewalls and the second trench has first and second sidewalls and a floor and second dielectric liner over the first and second sidewalls of the second trench.Type: GrantFiled: April 14, 2017Date of Patent: April 30, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chun-Li Liu, Balaji Padmanabhan, Ali Salih, Peter Moens
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Publication number: 20190123043Abstract: A method for forming a cascode rectifier structure includes providing a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are provided adjacent a major surface of the heterostructure and a control electrode is provided between the first and second current carrying electrode. A rectifier device is provided integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is provided further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. The cascode rectifier structure is provided as a two terminal device.Type: ApplicationFiled: December 19, 2018Publication date: April 25, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Balaji PADMANABHAN, Prasad VENKATRAMAN, Zia HOSSAIN, Chun-Li LIU, Woochul JEON, Jason MCDONALD
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Publication number: 20190123041Abstract: A cascode switch structure includes a group III-V transistor structure having a first current carrying electrode, a second current carrying electrode and a first control electrode. A semiconductor MOSFET device includes a third current carrying electrode electrically connected to the first current carrying electrode, a fourth current carrying electrode electrically connected to the first control electrode, and a second control electrode. A first diode includes a first cathode electrode electrically connected to the second current carrying electrode and a first anode electrode. A second diode includes a second anode electrode electrically connected to the first anode electrode and a second cathode electrode electrically connected to the fourth current carrying electrode. In one embodiment, the group III-V transistor structure, the first diode, and the second diode are integrated within a common substrate.Type: ApplicationFiled: December 11, 2018Publication date: April 25, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Balaji PADMANABHAN, Prasad VENKATRAMAN, Zia HOSSAIN, Chun-Li LIU, Jason MCDONALD, Ali SALIH, Alexander YOUNG