Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware. The firmware includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a data out message from a host, arranged to rewrite a first mode page setting among the plurality of mode page settings. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting according to the data out message. When the data out message will change the mode parameters which cannot be rewritten in the first mode page setting, the controller replies to the host with an UPIU response message indicating a failure event.

Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. The memory blocks include single-level cell blocks and multiple-level cell blocks. The controller is coupled to the memory device. When the controller executes a predetermined procedure to write data stored in the single-level cell blocks into the multiple-level cell blocks, the controller is configured to determine whether a valid page count corresponding to each single-level cell block is greater than a threshold, and when the valid page count corresponding to more than one single-level cell block is greater than the threshold, the controller is configured to execute a first merge procedure to directly write the data stored in the single-level cell blocks with the valid page count greater than the threshold into one or more of the multiple-level cell blocks.

Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. The memory blocks include single-level cell blocks and multiple-level cell blocks. The controller is coupled to the memory device. When the controller executes a predetermined procedure to write data stored in the single-level cell blocks into the multiple-level cell blocks, the controller is configured to determine whether a valid page count corresponding to each single-level cell block is greater than a threshold, and when the valid page count corresponding to more than one single-level cell block is greater than the threshold, the controller is configured to execute a first merge procedure to directly write the data stored in the single-level cell blocks with the valid page count greater than the threshold into one or more of the multiple-level cell blocks.

Abstract: A data storage device utilized for confirming firmware data includes a flash memory and a controller. The controller is coupled to the flash memory to receive first firmware data and first sorting hash data related to the first firmware data, and it divides a first hash data generated from the first firmware data into a plurality of data groups, and re-assembles the data groups according to a mapping and sorting algorithm to generate second sorting hash data. The controller includes an efuse region for writing the mapping and sorting algorithm. When the controller determines that the second sorting hash data is identical to the first sorting hash data, the first firmware data is allowed to update the controller.

Abstract: The invention introduces a method for scheduling and executing commands in a flash memory, performed by a processing unit, including at least the following steps: reading information stored in a command profile space to determine whether a priority command is present in a command queue; de-queuing the priority command from the command queue and executing the priority command when the priority command is present in the command queue; and using a scheduling algorithm to select a simple read/write command from the command queue and executing the simple read/write command when no priority command is present in the command queue.

Abstract: Compounds of Formula (I) and pharmaceutically acceptable salts thereof, wherein G1, G2, G3, L1, L2, and L3 are as defined in the specification, are useful in treating conditions or disorders prevented by or ameliorated by the modulation of lysophosphatidic acid receptor 1. Methods for making the compounds are described. Also described are pharmaceutical compositions of compounds of formula (I), and methods for using such compounds and compositions.

Abstract: A method for making a semiconductor device is disclosed. A substrate comprising semiconductor device elements is provided. A top conductive pad and an anti-reflective coating are patterned over the substrate. The anti-reflective coating is disposed on the top conductive pad. At least one passivation film is formed over the substrate and the anti-reflective coating. The at least one passivation film and the anti-reflective coating are etched to form a trench therein so as to expose a portion of the top conductive pad.

Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. Each memory block includes multiple pages. The controller is coupled to the memory device and includes an ECC engine configured to check and correct errors that have occurred in data stored in the memory blocks. When a number of error bits in a page of one of the memory blocks exceeds a threshold, the controller is configured to add a block number of the memory block in a predetermined queue and when a garbage collection procedure has been triggered, the controller is configured to perform garbage collection on the memory block.

Abstract: A data storage device includes a memory device and a controller. The memory device includes a first buffer, a second buffer, and a backup memory block. The first buffer is an MLC block and the second buffer is an SLC block. The controller is coupled to the memory device, receives a write command to write predetermined data in the memory device and determines whether the predetermined data has to be written into different buffers. When the controller determines that the predetermined data has to be written into different buffers, the controller writes a portion of the predetermined data that has been written in one or more predetermined pages of the first buffer into the backup memory block.

Abstract: The invention introduces a method for resetting a flash memory device, performed by a controller of a host, including at least the following steps: driving a memory controller to perform fewer than a maximum number of normal resets after receiving a hardware reset command from a processor; and driving the memory controller to perform a super reset when the normal resets are unsuccessful.

Abstract: A linkage mechanism includes a pivot assembly, a gear assembly, and a linkage assembly. The pivot assembly pivots around a first rotation axis. The gear assembly is pivoted with the pivot assembly and moves in conjunction with the pivot assembly. The gear assembly includes a cam, and the cam pivots around a second rotation axis. The second rotation axis is not parallel to the first rotation axis. The linkage assembly is disposed at a side of the gear assembly and contacts the cam. When the pivot assembly drives the gear assembly to pivot, the linkage assembly abuts against the cam to produce a relative movement with the cam.

Abstract: Provided herein is a method for manufacturing a semiconductor device. A substrate including a MEMS region and a connection region thereon is provided; a dielectric layer disposed on the substrate in the connection region is provided; a poly-silicon layer disposed on the dielectric layer is provided, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer is provided; and a passivation layer covering the dielectric layer is provided, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer, and a conductive layer conformally covering the connection pad and the poly-silicon layer in the transition region is provided.

Abstract: The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, at least including: descrambling first data from a second side via an enabled descrambler of a lowest layer; determining whether a reception error is occurred by continuously monitoring first descrambled data; sending a NAC (negative acknowledgement control) frame to the second side to inform the second side that the reception error is occurred for the first data each time the reception error is determined for the first descrambled data; and when a total number of occurrences of the reception errors reaches a predefined threshold, disabling the descrambler of the lowest layer.

Abstract: The present invention provides a dye blending device. The dye containers of the device are connected with external dye supplying devices via a pipeline to obtain specific dyes; the motor thereof are connected with the dye containers via the pipeline to apply a pressure on the dye containers; quantitative pumps and electronic control valves are disposed between a collection zone and the dye containers to configure the transportation operation of the dye; a controller of the device receives a dye blending instruction, instructs the motor to apply a pressure to a specified dye container, enables a quantitative pump and an electronic control valve corresponding to the specified dye container to output a specified dosage of dye to the collection zone, and instructs a vibrator disposed in the collection zone to generate vibration to blend the mixture dye outputted to the collection zone, thus achieving the objective of automatically blending dyes.

Abstract: The invention introduces a method for scheduling and executing commands in a flash memory, performed by a processing unit, including at least the following steps: reading information stored in a command profile space to determine whether a priority command is present in a command queue; de-queuing the priority command from the command queue and executing the priority command when the priority command is present in the command queue; and using a scheduling algorithm to select a simple read/write command from the command queue and executing the simple read/write command when no priority command is present in the command queue.

Abstract: Provided herein is a semiconductor device is provided. The semiconductor device includes a substrate including a MEMS region and a connection region thereon; a dielectric layer disposed on the substrate in the connection region; a poly-silicon layer disposed on the dielectric layer, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer; and a passivation layer covering the dielectric layer, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer.

Abstract: An ultrasound imaging system includes a beam receiving circuit and a back-end circuit. The beam receiving circuit receives a plurality of digitized echo signals. The back-end circuit is coupled to the beam receiving circuit for outputting a plurality of compressed delay timing parameters corresponding to a plurality of channels to the beam receiving circuit. The beam receiving circuit decompresses the compressed delay timing parameters into a plurality of delay timing parameters, and processes the digitized echo signals into an ultrasound beamforming value according to the delay timing parameters corresponding to the channels. The back-end circuit synthesizes an ultrasound image according to the ultrasound beamforming value outputted from the beam receiving circuit.

Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware. The firmware includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a data out message from a host, arranged to rewrite a first mode page setting among the plurality of mode page settings. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting according to the data out message. When the data out message will change the mode parameters which cannot be rewritten in the first mode page setting, the controller replies to the host with an UPIU response message indicating a failure event.

Abstract: A thermal conductive plastic material, comprising: a plastic solution; a first thermal conductive material, filled and distributed in the plastic solution, being processed by an Atmospheric Pressure Plasma (APP) technology, and having its surface provided with hydrophilic functional groups; and a second thermal conductive material, filled and distributed in the plastic solution, being processed by the Atmospheric Pressure Plasma (APP) technology or chemical modification, and having its surface provided with hydrophilic functional groups. Wherein, the first thermal conductive material is formed by ceramic powders, the second thermal conductive material is formed by carbon-containing ingredient, while the first thermal conductive material and the second thermal conductive material are in touch with each other.