Patents by Inventor Dean A. Klein

Dean A. Klein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9804989
    Abstract: Electrical systems and related methods are disclosed. An electrical system comprises an electronic device configured to communicate through an electrical connector using one of a plurality of different communication protocols responsive to receiving an indication of the one of the plurality of different communication protocols through the electrical connector from another electronic device. The other electronic device is configured to provide a protocol indicator that indicates a particular communication protocol with which the other electronic device is configured to communicate through an electrical connector of the electronic device. A method includes receiving a protocol indicator from another electronic device through an electrical connector. The protocol indicator indicates a communication protocol. The method also includes communicating with the other electronic device through the electrical connector using the indicated communication protocol.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: October 31, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Patent number: 9772936
    Abstract: Methods for programming compressed data to a memory array, memory devices, and memory systems are disclosed. In one such method, memory pages or blocks that are partially programmed with valid data are found. The data is collected from these partially programmed pages or blocks and the data is compressed. The compressed data is then programmed back to different locations in the memory array of the memory device.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: September 26, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Dean Klein
  • Publication number: 20170083452
    Abstract: Disclosed are systems and methods for managing memory. A memory management system may include a table having multiple virtual memory addresses. Each virtual memory address may correspond to a physical memory address and data that identifies a type of memory device corresponding to the physical memory address. The physical memory device can be used to access the memory device when a table hit occurs.
    Type: Application
    Filed: December 6, 2016
    Publication date: March 23, 2017
    Inventor: Dean A. Klein
  • Publication number: 20170027160
    Abstract: A waterfowl decoy having oscillating wings includes an oscillation mechanism having an anchor plate fixedly disposed in the interior cavity of a waterfowl decoy body, first and second wing gears pivotally attached to the surface of the anchor plate, the wing gears intermeshed such that pivoting movement of one causes corresponding counter-pivoting movement in the other, a drive wheel and link for reciprocally pivoting the first wing gear within a defined arc, and a pair of wings attached to the wing gears and extending outwardly from the decoy body, such that reciprocating movement of the wing gears causes the wings to oscillate in a motion resembling that of the flapping wings of a bird in flight.
    Type: Application
    Filed: July 28, 2016
    Publication date: February 2, 2017
    Inventors: Ron Latschaw, Dean A. Klein
  • Patent number: 9524248
    Abstract: Disclosed are systems and methods for managing memory. A memory management system may include a table having multiple virtual memory addresses. Each virtual memory address may correspond to a physical memory address and data that identifies a type of memory device corresponding to the physical memory address. The physical memory device can be used to access the memory device when a table hit occurs.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: December 20, 2016
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Publication number: 20160196142
    Abstract: Examples of the present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device configured to generate control flow instructions, and a second device including an array of memory cells, an execution unit to execute the control flow instructions, and a controller configured to control an execution of the control flow instructions on data stored in the array.
    Type: Application
    Filed: December 28, 2015
    Publication date: July 7, 2016
    Inventors: Kyle B. Wheeler, Richard C. Murphy, Troy A. Manning, Dean A. Klein
  • Patent number: 9304750
    Abstract: A system and method are described for a memory management processor which, using a table of reference addresses embedded in the object code, can open the appropriate memory pages to expedite the retrieval of information from memory referenced by instructions in the execution pipeline. A suitable compiler parses the source code and collects references to branch addresses, calls to other routines, or data references, and creates reference tables listing the addresses for these references at the beginning of each routine. These tables are received by the memory management processor as the instructions of the routine are beginning to be loaded into the execution pipeline, so that the memory management processor can begin opening memory pages where the referenced information is stored. Opening the memory pages where the referenced information is located before the instructions reach the instruction processor helps lessen memory latency delays which can greatly impede processing performance.
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: April 5, 2016
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Publication number: 20160041828
    Abstract: A method and system are described for generating reference tables in object code which specify the addresses of branches, routines called, and data references used by routines in the code. In a suitably equipped processing system, the reference tables can be passed to a memory management processor which can open the appropriate memory pages to expedite the retrieval of data referenced in the execution pipeline. The disclosed method and system create such reference tables at the beginning of each routine so that the table can be passed to the memory management processor in a suitably equipped processor. Resulting object code also allows processors lacking a suitable memory management processor to skip the reference table, preserving upward compatibility.
    Type: Application
    Filed: October 19, 2015
    Publication date: February 11, 2016
    Inventor: DEAN A. KLEIN
  • Publication number: 20160026596
    Abstract: Electrical systems and related methods are disclosed. An electrical system comprises an electronic device configured to communicate through an electrical connector using one of a plurality of different communication protocols responsive to receiving an indication of the one of the plurality of different communication protocols through the electrical connector from a another electronic device. The other electronic device is configured to provide a protocol indicator that indicates a particular communication protocol with which the other electronic device is configured to communicate through an electrical connector of the electronic device. A method includes receiving a protocol indicator from another electronic device through an electrical connector. The protocol indicator indicates a communication protocol. The method also includes communicating with the other electronic device through the electrical connector using the indicated communication protocol.
    Type: Application
    Filed: July 25, 2014
    Publication date: January 28, 2016
    Inventor: Dean A. Klein
  • Patent number: 9235526
    Abstract: A non-volatile hard disk drive cache system is coupled between a processor and a hard disk drive. The cache system includes a control circuit, a non-volatile memory and a volatile memory. the control circuit causes a subset of the data stored in the hard disk drive to be written to the non-volatile memory. In response to a request to read data are stored in the non-volatile memory. If so, the requested read data are provided form the non-volatile memory. Otherwise, the requested read data are provided from the hard disk drive. the volatile memory is used as a write buffer and to store disk access statistics, such as the disk drive locations that are most frequently read, which are used by the control circuit to determine which data to store in the non-volatile memory.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: January 12, 2016
    Assignee: Round Rock Research, LLC
    Inventor: Dean A. Klein
  • Patent number: 9201820
    Abstract: A master memory controller comprises a plurality of memory communication channels. At least one of the memory communication channels is used to communicate with one or more slave memory controllers. The master and slave memory controllers can operate in a parallel operation mode to communicate with a plurality of memory devices coupled to the memory communication channels of each memory controller.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: December 1, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Dean Klein
  • Patent number: 9170781
    Abstract: A method and system are described for generating reference tables in object code which specify the addresses of branches, routines called, and data references used by routines in the code. In a suitably equipped processing system, the reference tables can be passed to a memory management processor which can open the appropriate memory pages to expedite the retrieval of data referenced in the execution pipeline. The disclosed method and system create such reference tables at the beginning of each routine so that the table can be passed to the memory management processor in a suitably equipped processor. Resulting object code also allows processors lacking a suitable memory management processor to skip the reference table, preserving upward compatibility.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: October 27, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Patent number: 9142263
    Abstract: A memory device providing signals indicating when refresh operations are complete. The signals from a number of memory devices can be combined, such as by logically ORing, to provide a refresh complete signal to a power management controller. Dynamic factors can affect the refresh operation and the memory may be refreshed without restoring the entire system to a high power state. The time required to perform a refresh operation can be determined dynamically, allowing the system to be returned to a low power state as soon as refresh is complete. Ambient temperatures can be monitored to dynamically determine when to perform a refresh operation.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: September 22, 2015
    Assignee: Round Rock Research, LLC
    Inventor: Dean A. Klein
  • Patent number: 9117095
    Abstract: A computing system includes data encryption in the data path between a data source and data storage devices. The data encryption may utilize a key which is derived at least in part from an identification code stored in a nonvolatile memory. The key may also be derived at least in part from user input to the computer.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: August 25, 2015
    Assignee: Round Rock Research LLC
    Inventor: Dean A Klein
  • Patent number: 9064600
    Abstract: A computer system includes a memory controller coupled to a memory module containing several DRAMs. The memory module also includes a non-volatile memory storing row addresses identifying rows containing DRAM memory cells that are likely to lose data during normal refresh of the memory cells. Upon power-up, the data from the non-volatile memory are transferred to a comparator in the memory controller. The comparator compares the row addresses to row addresses from a refresh shadow counter that identify the rows in the DRAMs being refreshed. When a row of memory cells is being refreshed that is located one-half of the rows away from a row that is likely to loose data, the memory controller causes the row that is likely to loose data to be refreshed. The memory controller also includes error checking circuitry for identifying the rows of memory cells that are likely to lose data during refresh.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: June 23, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Patent number: 9015390
    Abstract: An integrated circuit active memory device receives task commands from a component in a host computer system that may include the active memory device. The host system includes a memory controller coupling the active memory device to a host CPU and a mass storage device. The active memory device includes a command engine issuing instructions responsive to the task commands to either an array control unit or a DRAM control unit. The instructions provided to the DRAM control unit cause data to be written to or read from a DRAM and coupled to or from either the processing elements or a host/memory interface. The processing elements execute instructions provided by the array control unit to decompress data written to the DRAM through the host/memory interface and compress data read from the DRAM through the host/memory interface.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: April 21, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Publication number: 20150006812
    Abstract: A non-volatile hard disk drive cache system is coupled between a processor and a hard disk drive. The cache system includes a control circuit, a non-volatile memory and a volatile memory. the control circuit causes a subset of the data stored in the hard disk drive to be written to the non-volatile memory. In response to a request to read data are stored in the non-volatile memory. If so, the requested read data are provided form the non-volatile memory. Otherwise, the requested read data are provided from the hard disk drive. the volatile memory is used as a write buffer and to store disk access statistics, such as the disk drive locations that are most frequently read, which are used by the control circuit to determine which data to store in the non-volatile memory.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 1, 2015
    Inventor: Dean A. Klein
  • Patent number: D791325
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: July 4, 2017
    Assignee: Carbon Medical Technologies, Inc.
    Inventors: Kristina M. Whittchow, Dean A. Klein, Timothy J. Olson
  • Patent number: D791326
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: July 4, 2017
    Assignee: Carbon Medical Technologies, Inc.
    Inventors: Timothy J. Olson, Kristina M. Wittchow, Dean A. Klein
  • Patent number: D791327
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: July 4, 2017
    Assignee: Carbon Medical Technologies, Inc.
    Inventors: Dean A. Klein, Timothy J. Olson, Kristina M. Wittchow