Abstract: A three-dimensional (3D) memory device includes a memory cell, a top contact coupled to the memory cell, and a bottom contact coupled to the memory cell. The memory cell can include a pillar, an insulating layer surrounding the pillar, a first gate contact surrounding a first portion of the insulating layer, and a second gate contact surrounding a second portion of the insulating layer. The pillar can be configured to store an electrical charge. The pillar can be a monocrystalline material. The 3D memory device can utilize dynamic flash memory (DFM), decrease defects, increase manufacturing efficiency, decrease leakage current, decrease junction current, decrease power consumption, increase storage density, increase charge retention times, and decrease refresh rates.

Abstract: In an example of the present disclosure, a three-dimensional (3D) memory device includes a memory array structure and a staircase structure. The staircase structure includes a plurality of stairs extending along a first lateral direction. The plurality of stairs include a stair including a conductor portion on a top surface of the stair. The conduction portion is connected to the memory array structure. Widths of conductor portions are different in a second lateral direction perpendicular to the first lateral direction.

Abstract: Systems and methods for providing monitoring and troubleshooting for services of a cloud-based system include receiving a request from a user, the request being for any of monitoring and troubleshooting one or more services provided by the cloud-based system; submitting a job to one or more observability agents associated with the one or more services of the cloud-based system; receiving a response from the one or more observability agents, the response including metrics associated with the one or more services; and providing the response to the user.

Abstract: Provided are a reconfigurable neuron device based on ion gate regulation and a method of preparing the same. The device includes: a synthetic antiferromagnetic layer, a metal oxide layer, an ionic liquid layer and a top electrode layer which are sequentially stacked from bottom to top. A left boundary antiferromagnetic layer and a right boundary antiferromagnetic layer having opposite magnetization directions are provided on two opposite edges of a bottom end of the synthetic antiferromagnetic layer, and a magnetic tunnel junction configured to output a spike signal is further provided in a middle portion of the bottom end of the synthetic antiferromagnetic layer. The metal oxide layer, the ionic liquid layer and the top electrode layer constitute an ion gate, the ionic liquid layer includes a positive ion and a negative ion.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes channel structures in a first region and word line pick-up structures in a first portion of a second region. The first region and the second region are arranged in a first direction. The 3D memory device also includes word lines each extending in the first region and a second portion of the second region. The first portion and the second portion of the second region are arranged in a second direction perpendicular to the first direction. The 3D memory device also includes dummy channel structures in the second portion of the second region. Adjacent channel structures are spaced apart from each other by a first distance. Adjacent dummy channel structures are spaced apart from each other by a second distance that is smaller than the first distance.

Abstract: A neuron device based on magnetic tunnel junction and a neural network apparatus are provided, where the neuron device based on magnetic tunnel junction includes: a synthetic antiferromagnetic layer, where a first side of the synthetic antiferromagnetic layer is provided with a bottom electrode; a barrier layer arranged on a second side of the synthetic antiferromagnetic layer; a ferromagnetic free layer arranged on a side of the barrier layer away from the bottom electrode; a top electrode arranged on a side of the ferromagnetic free layer away from the bottom electrode; a first boundary antiferromagnetic pinning layer and a second boundary antiferromagnetic pinning layer both arranged on the side of the ferromagnetic free layer away from the bottom electrode, and respectively located on two sides of the top electrode.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a stack structure, and a slit structure extending. The stack structure includes interleaved conductive layers and dielectric layers. Edges of the interleaved conductive layers and dielectric layers define a staircase structure. Each one of the conductive layers has a thickened portion in the staircase structure. The thickened portion extends along a first direction. The slit structure extends through the stack structure and along a second direction perpendicular to the first direction, such that the slit structure cuts off at least one, but not all, of the thickened portions of the conductive layers.

Abstract: Memory devices and fabricating methods thereof are disclosed. In certain aspects, a disclosed memory device comprises a stack structure including conductive layers and dielectric layers alternatively stacked in a vertical direction; a row of first channel structures along a first lateral direction, each vertically extending in the stack structure; a top select gate cut structure extending vertically in an upper portion of the stack structure and laterally along the first lateral direction and in contact with the first channel structures; and a row of first contact structures each comprising: a lower first contact portion having a lower surface in contact with a corresponding first channel structure and a side surface in contact with the top select gate cut structure, and an upper first contact portion on the lower first contact portion and having a lower surface and a side surface both in contact with the top select gate cut structure.

Abstract: A system for generating a 3D heart model based on 2D ultrasound image is provided. The system includes at least one storage device and at least one processor configured to communicate with the at least one storage device. The at least one storage device includes a set of instructions. The at least one processor is configured to communicate with the at least one storage device. When executing the set of instructions, the at least one processor is configured to direct the system to perform operations. The operations includes: obtaining a 2D ultrasound image of a subject; obtaining a target 3D model of an anatomical structure of the subject; obtaining a transformed target 3D model by transforming the target 3D model to align the target 3D model with the 2D ultrasound image; and generating a target 3D image of the subject based on the transformed target 3D model and the 2D ultrasound image.

Abstract: A battery includes a case and a cell. The case is provided with a pressure relief groove; the cell is arranged within the case and includes a positive electrode plate, a negative electrode plate, and a separator located between the positive and negative electrode plates; the negative electrode plate includes a negative electrode current collector and a negative electrode active material layer located on the negative electrode current collector, the negative electrode active material layer including a silicon-carbon composite material; and a ratio of a Dv50 of the silicon-carbon composite material to a depth of the pressure relief groove ranges from 0.06 to 0.6.

Abstract: Methods, systems, and apparatuses, including computer programs encoded on computer storage media, for generating a summary of a set of content items using a language model neural network. In particular, the described techniques include processing data characterizing a set of content items and the respective relative prominence data for each of the set of content items using a language model neural network to generate the summary of the set of content items. Because the relative prominence data is included in the input to the language model neural network, the summary will reflect the relative prominence represented for each of the content items.

Abstract: The present disclosure relates to methods, devices, and systems for managing contact structures in semiconductor devices. An example semiconductor device includes a first stack of dielectric layers and isolating layers alternating with each other along a first direction, a first contact structure extending in the first stack, and a second contact structure extending in the first stack. The first contact structure is coupled to a first connection layer in the first stack, and the second contact structure is coupled to a second connection layer in the first stack. A size of the first contact structure along a second direction perpendicular to the first direction is greater than a size of the second contact structure along the second direction. The second contact structure extends through the second connection layer.

Abstract: Memory device and formation method are provided. The memory device includes a stack structure; and a plurality of gate line slit structures vertically extending through the stack structure to divide the stack structure into a plurality of stack portions. The plurality of GLS structures extend along a first direction in a lateral plane of the stack structure and are arranged along a second direction substantially perpendicular to the first direction. Each stack portion is between corresponding adjacent gate line slit structures. At least one edge stack portion, along the second direction, of the plurality of stack portions at edge of the stack structure includes a configuration different from a non-edge stack portion of the plurality of stack portions along the second direction.

Abstract: A memory device includes an array of memory cells disposed on a first side of a first semiconductor layer, and a pad-out structure disposed on the array of memory cells. Each of the memory cells includes a semiconductor body extending in a first direction, a first terminal in contact with the first side of the first semiconductor layer and a second terminal are formed at both ends of the semiconductor body; a word line extending in a second direction perpendicular to the first direction; and a plate line extending in the second direction.

Abstract: Three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. One disclosed semiconductor device comprises a stack structure comprising an array region and a contact region, and a gate line slit structure extending vertically through the stack structure and laterally along a first lateral direction to divide the stack structure into memory blocks. The gate line slit structure comprises a first dummy channel structure located at a boundary between the array region and the contact region, a first gate line slit segment extending laterally from the first dummy channel structure into the array region, and a second gate line slit segment extending laterally from the first dummy channel structure into the contact region.

Abstract: A method for detecting network attack based on kernel operating characteristics of a software switch, comprising: collecting kernel operating characteristic data of the software switch during network management and packet forwarding of the software switch, wherein the kernel operating characteristic data of the software switch can reflect characteristic data of a fine-grained operating state of a network; preprocessing the kernel operating characteristic data of the software switch; and inputting the preprocessed kernel operating characteristic data of the software switch into a pre-trained attack detection model to detect a potential attack behavior in a network. The method is applicable to all scenarios where the software switch is applicable, especially a software-defined network and a cloud data center, an industrial Internet, 5G, edge computing based on the software-defined network.

Abstract: An attribute encoding method, an attribute decoding method, and an electronic device. The attribute encoding method includes: determining, by an encoding end, K first target neighboring points in a plurality of candidate neighboring points based on a geometric distance and an attribute distance between a to-be-encoded point and each candidate neighboring point in the plurality of candidate neighboring points; performing, by the encoding end, attribute prediction on the to-be-encoded point based on an attribute value of each first target neighboring point to obtain an attribute predicted value of the to-be-encoded point; and encoding, by the encoding end, an attribute residual of the to-be-encoded point to generate an encoded bitstream corresponding to the to-be-encoded point; where the attribute residual of the to-be-encoded point is determined based on the attribute predicted value of the to-be-encoded point and an original attribute value of the to-be-encoded point.

Abstract: A method for preparing a water-soluble rutin powder includes: heating and mixing a plant polysaccharide substance, a filler, and water to obtain a wall material solution; adding an antioxidant and a rutin powder into the wall material solution at a first temperature, followed by emulsification and dispersion, pH adjustment, and high-pressure homogenization to obtain a rutin powder emulsion; and carrying out heating fusion of the rutin powder emulsion to obtain a water-soluble rutin powder. With the preparation method, a water-soluble rutin product is obtained through emulsification, high-pressure homogenization, ultra-high-temperature fusion, drying and other processes by using modified starch and a plant polysaccharide as a wall material and rutin as a core material.

Abstract: In various examples, systems and methods of controlling robotic sortation devices are described. In various examples, a first item associated with a first target may be determined. A first item count associated with a first buffer may be determined. A first robotic sortation device may be allocated to the first target based at least in part on the first item count. The first robotic sortation device may receive the first item. The first robotic sortation device may be controlled to place the first item in a first container associated with the first target.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes channel structures in a first region, word line pick-up structures in a dielectric portion of a second region, and word lines each extending in the first region and a conductive portion of the second region. The first region and the second region are arranged in a first direction. The dielectric portion and the conductive portion of the second region are arranged in a second direction perpendicular to the first direction. The word lines are discontinuous in the dielectric portion of the second region and are electrically connected to the word line pick-up structures, respectively.