Patents by Inventor Di Wang

Di Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250048646
    Abstract: According to one aspect of the present disclosure, a semiconductor device is provided. The semiconductor device may include a stack structure including conductor layers and dielectric layers stacked alternately along a first direction. The semiconductor device may include at least one semiconductor structure penetrating through the stack structure. The semiconductor structure may include a capacitor structure, a first transistor structure, and a second transistor structure extending in the stack structure along the first direction. The second transistor structure, the first transistor structure, and the capacitor structure in a same semiconductor structure may be arranged and connected sequentially along the first direction.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 6, 2025
    Inventors: Zhong Zhang, Di Wang, Dongxue Zhao, Wenxi Zhou, Zhiliang Xia, Zongliang Huo
  • Publication number: 20250044783
    Abstract: According to embodiments of the present disclosure, there are provided a method, device, medium, and product for state prediction. The method includes: obtaining a neural network, the neural network being trained to determine a state change of a physical system over time, training data of the neural network indicating states of a plurality of physical systems at a plurality of times; obtaining state data corresponding to a state of a target physical system at a first time; determining respective unit feature representations of the physical units in the target physical system based at least on target values of material properties of the physical units; and determining a state of the target physical system at a second time based on the state data by inputting at least the unit feature representations to the neural network. Through the above solution, generalization capability of the neural network can be significantly improved.
    Type: Application
    Filed: November 7, 2022
    Publication date: February 6, 2025
    Inventors: Weihao GAO, Ce YANG, Di WU, Chong WANG
  • Publication number: 20250043248
    Abstract: The present disclosure provides a preparation method and use of a hydrogel material for growth of blood vessel organoids (BVOs). The preparation method of the hydrogel material includes: (1) synthesis of gelatin methacryloyl (GelMA), and (2) synthesis of ns-GelMA-PEO. The hydrogel material may be used for in vitro cultivation of BVOs. The hydrogel material ns-GelMA-PEO prepared by the present disclosure may significantly improve the survival and budding abilities of BVOs. The ns-GelMA-PEO provides a novel solution for in vitro cultivation of BVOs, and may well support the growth and differentiation of organoids.
    Type: Application
    Filed: January 10, 2024
    Publication date: February 6, 2025
    Applicant: Union Hospital Tongji Medical College HUST
    Inventors: Di SUN, Jiaming SUN, Zhenxing WANG, Shize LEI
  • Patent number: 12215437
    Abstract: The present disclosure discloses a gradient single-crystal positive electrode material, which has a chemical formula of LiNixCoyA1-x-yO2@mLiaZbOc, wherein 0<x<1, 0<y<1, 0<x+y<1, 0<m<0.05, 0.3<a?10, 1?b<4, and 1?c<15, A is at least one of Mn, Zr, Sr, Ba, W, Ti, Al, Mg, Y, and Nb, and Z is at least one of B, Al, Co, W, Ti, Zr, and Si. The atomic ratio of the content of Co on the surface of the single-crystal positive electrode material particle to the content of Ni+Co+A on the surface is greater than 0.4 and less than 0.8, and the atomic ratio of Co at a depth 10% of the radius from the surface of the single crystal positive electrode material particle is not less than 0.3; and the single-crystal positive electrode material particle has a roundness of greater than 0.4, and is free from sharp corners.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: February 4, 2025
    Assignee: HENAN KELONG NEW ENERGY CO., LTD
    Inventors: Jinsuo Li, Di Cheng, Yunjun Xu, Gaofeng Zuo, Jing Huang, Xiaojing Li, Danfeng Chen, Wanchao Wen, Yanping Wang, Zhengzhong Yin
  • Publication number: 20250039646
    Abstract: An internal radio wave transmission system of building includes a base layer and a transmission layer, with a radio wave transmission channel between the two layers. The radio wave transmission system in a building includes a signal transceiver device, a first reflective plate and a second reflective plate. The signal transceiver device is connected with a telecommunication room, and the signal transceiver device emits and receives radio wave signals. The first reflective plate is disposed in the channel and corresponds to positions of the base layer and the signal transceiver device to receive and guide the radio wave signals. The second reflective plate is disposed in the channel and corresponds to a position of the transmission layer to receive and guide the radio wave signals to terminal equipment located in the transmission layer. The invention ensures the effective transmission of the radio wave signals inside the building.
    Type: Application
    Filed: June 20, 2024
    Publication date: January 30, 2025
    Inventors: TZUU-YAW LU, HERMAN CHUNGHWA RAO, Chun-Chieh KUO, Hua-Pei CHIANG, CHYI-DAR JANG, TSUNG-JEN WANG, CHI-HUNG LIN, WEI-DI HWANG, FANG-CHI YEN, CHIEN-LI HOU
  • Publication number: 20250038131
    Abstract: In certain aspects, a three-dimensional (3D) memory device includes a stack structure including a core region and a staircase region, a channel structure extending through the stack structure in the core region, and a first support structure extending through the stack structure in the staircase region. The first support structure includes a first portion extending along a first direction and a second portion protruding from the first portion along a second direction perpendicular to the first direction. The first support structure is located between two blocks of the 3D memory device.
    Type: Application
    Filed: October 14, 2024
    Publication date: January 30, 2025
    Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Wei Xie, Di Wang, Tingting Zhao, Wenxi Zhou
  • Publication number: 20250040142
    Abstract: A semiconductor structure and a manufacturing method thereof, and a memory system are provided. The semiconductor structure may include a stack structure including a first region, a second region and a boundary region between the first region and the second region. The stack structure includes gate layers and insulation layers stacked alternately, and the gate layers include a first gate layer and a plurality of second gate layers on a side of the first gate layer. A first contact structure in the boundary region extends and connects to the first gate layer. A plurality of second contact structures in the second region extend and connect to the second gate layers of different layers respectively. A size of the first contact structure perpendicular to a stacking direction of the stack structure is different from sizes of the second contact structures perpendicular to the stacking direction.
    Type: Application
    Filed: October 17, 2023
    Publication date: January 30, 2025
    Inventors: Zhong Zhang, Di Wang, Wenxi Zhou
  • Patent number: 12211957
    Abstract: A flip-chip light-emitting diode includes a first conductivity type semiconductor layer, a light-emitting layer, a second conductivity type semiconductor layer, a first transparent dielectric layer, a second transparent dielectric layer, and a distributed Bragg reflector (DBR) structure which are sequentially stacked. The first transparent dielectric layer has a thickness greater than ?/2n1, and the second transparent dielectric layer has a thickness of m?/4n2, wherein m is an odd number, ? is an emission wavelength of the light-emitting layer, n1 is a refractive index of the first transparent dielectric layer, and n2 is a refractive index of the second transparent dielectric layer and is greater than n1.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: January 28, 2025
    Assignee: Tianjin Sanan Optoelectronics Co., Ltd.
    Inventors: Weiping Xiong, Xin Wang, Zhiwei Wu, Di Gao, Yu-Ren Peng, Huan-shao Kuo
  • Publication number: 20250028628
    Abstract: Some embodiments provide a method for monitoring a first service that executes in a Pod on a node of a Kubernetes deployment. At a second service executing on the node, the method monitors a storage of the node that stores core dump files to detect when a core dump file pertaining to the first service is written to the storage. Upon detection of the core dump file being written to the storage, the method automatically (i) generates an image of the first service based on data in the core dump file and (ii) instantiates a new container on the node to analyze the generated image in order to debug the first service.
    Type: Application
    Filed: July 21, 2023
    Publication date: January 23, 2025
    Inventors: Yu Ying, Hayden Kevin Fowler, Sreeram Kumar Ravinoothala, Di Wang, Yong Wang
  • Patent number: 12205895
    Abstract: A three-dimensional (3D) memory device includes interleaved conductive layers and dielectric layers. Edges of the conductive layers and dielectric layers define a plurality of stairs. The 3D memory device may also include a plurality of landing structures each disposed on a respective conductive layer at a respective stair. Each of the landing structures comprises a first layer of a first material and a second layer of a second material. The first layer is over the second layer. The second material is different from the first material.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: January 21, 2025
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Zhong Zhang, Wenxi Zhou, Di Wang, Zhiliang Xia, Zongliang Huo
  • Publication number: 20250017247
    Abstract: A method for extracting oils from sauces while simultaneously determining fat content, peroxide value, and acid value is disclosed. The method is simple to operate and requires uncomplicated equipment. It features a short testing cycle and high efficiency, and suitable for the extraction of oils from oil-rich emulsified encapsulated sauces (such as salad dressings) with high extraction rates. The determination of peroxide value and acid value is not affected by pretreatment methods, ensuring more representative results. It addresses the challenges of difficult oil separation and extraction from oil-rich emulsified encapsulated sauces and solves significant issues encountered when using acid hydrolysis and alkaline hydrolysis methods to determine peroxide value and acid value. It enables the simultaneous monitoring of three physicochemical indicators (fat content, peroxide value, and acid value).
    Type: Application
    Filed: September 27, 2024
    Publication date: January 16, 2025
    Inventors: Chunfeng YU, Ziheng JIN, Yanjun WEN, Linzheng LI, Tiantian WANG, Honglong LI, Wenjin ZHANG, Haitao HAN, Congcong ZHAO, Di WANG
  • Publication number: 20250018485
    Abstract: A revolving cathode tool and method for co-rotating electrochemical machining of an inner wall of an aero-engine casing are provided, and relates to the technical field of electrochemical machining. The co-rotating electrochemical machining revolving cathode tool comprises a power supply, a cathode shaft, an anode workpiece and a flexible cathode assembly. The cathode shaft is electrically connected with a cathode of the power supply. The anode workpiece is electrically connected with an anode of the power supply. One end of the cathode shaft is connected with the flexible cathode assembly. The problem that a non-array complex structure of the inner wall of the aero-engine casing cannot be machined through counter-rotating electrochemical machining is fundamentally solved. The diameter of the cathode tool is 1/n of the diameter of the anode workpiece.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 16, 2025
    Inventors: Dengyong WANG, Shuofang ZHOU, Di ZHU, Wenjian CAO, Jun ZHANG, Zengwei ZHU
  • Publication number: 20250011865
    Abstract: Provided is a kit for calibration of an isothermal polymerase chain reaction (PCR) analyzer and use thereof. The kit includes a standard substance, an amplification primer set, a reaction buffer, a polymerase, a dye, and a negative control. The standard substance is a DNA plasmid with a gradient concentration of 100 copies/?L to 106 copies/?L; the amplification primer set has nucleotide sequences shown in SEQ ID NO: 1 to SEQ ID NO: 6; the polymerase is a Bst DNA polymerase; and the dye is a loop-mediated isothermal amplification (LAMP) fluorescent dye (with excitation: 485 nm, emission: 498 nm, and a detection channel of SYBR® Green I or a FAM channel). The kit and a technology for calibration of an isothermal PCR instrument meet calibration demands of the isothermal PCR instrument and fill a technical gap.
    Type: Application
    Filed: March 8, 2024
    Publication date: January 9, 2025
    Inventors: Yunhua GAO, Xian CHEN, Di WANG, Yue FEI, Zhidong WANG, Xiao WU, Song LU
  • Publication number: 20250015156
    Abstract: According to one aspect of the present disclosure, a semiconductor device is provided. The semiconductor device may include a stacked layer and a top select gate layer located on the stacked layer. The semiconductor device may include a gate-line structure extending through the top select gate layer and the stacked layer. A portion of the gate-line structure that extends through the top select gate layer may be a first isolation structure, and the first isolation structure may include a contact layer in contact with the top select gate layer. The semiconductor device may include a channel structure extending through the stacked layer and a first dielectric layer located on the top select gate layer, where the first dielectric layer and the contact layer comprise different insulating materials. The semiconductor device may include a channel local contact extending through the first dielectric layer and corresponding to the channel structure.
    Type: Application
    Filed: December 26, 2023
    Publication date: January 9, 2025
    Inventors: Zhong Zhang, Qingfu Zhang, Di Wang, Wenxi Zhou
  • Patent number: 12193230
    Abstract: A three-dimensional (3D) memory device includes a doped semiconductor layer, a stack structure, and a channel structure. The stack structure includes interleaved conductive layers and dielectric layers formed on the doped semiconductor layer. The conductive layers include a plurality of word lines, and a drain select gate line. The channel structure extends through the stack structure along a first direction and is in contact with the doped semiconductor layer. The drain select gate line includes a first dielectric layer in contact with the channel structure, and a first polysilicon layer in contact with the first dielectric layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: January 7, 2025
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Yuancheng Yang, Bingjie Yan, Di Wang, Cuicui Kong, Wenxi Zhou
  • Publication number: 20240431108
    Abstract: According to one aspect of the present disclosure, a three-dimensional memory is provided. The three-dimensional memory may include a stack structure comprising a gate layer and a dielectric layer disposed alternately and comprising a plurality of steps. The three-dimensional memory may include an etch stop layer disposed on the plurality of steps. The three-dimensional memory may include a protective layer covering the stack structure and the etch stop layer. The three-dimensional memory may include a plurality of connection pillars. Each of the connection pillars penetrates through the protective layer and the etch stop layer on a corresponding step and is connected with the gate layer of the corresponding step.
    Type: Application
    Filed: September 4, 2024
    Publication date: December 26, 2024
    Inventors: Zhong Zhang, Di Wang, Wenxi Zhou, Zhiliang Xia, Zongliang Huo
  • Publication number: 20240431100
    Abstract: The present disclosure provides a three-dimensional (3D) memory. The 3D memory may include a stack structure including gate layers and dielectric layers disposed alternately. The stack structure may include a step structure including a plurality of staircase structures disposed in a first direction and having different heights in a second direction. The 3D memory may include a plurality of first stops disposed in the first direction and located on the plurality of steps of at least one of the staircase structures, with each of the plurality of first stops disposed on the corresponding step of the plurality of steps. The 3D memory may include a protection layer covering the step structure and the first stops. The 3D memory may include a plurality of contact posts each extending through the protection layer and the first stop and being connected with the gate layer in the step corresponding to the first stop.
    Type: Application
    Filed: September 4, 2024
    Publication date: December 26, 2024
    Inventors: Zhong Zhang, Di Wang, Wenxi Zhou, Kun Zhang, Zhiliang Xia, Zongliang Huo
  • Patent number: 12171798
    Abstract: Provided are an essential oil composition and a preparation method thereof. The essential oil composition includes a eutectic composition and an essential oil; the eutectic composition includes a hydrogen-bond donor and a hydrogen-bond acceptor; the hydrogen-bond donor is geranic acid or derivatives of the geranic acid; the hydrogen-bond acceptor is choline or derivatives or hydrates of the choline; a mass ratio of the hydrogen-bond donor to the hydrogen-bond acceptor is 1-10:1-10.
    Type: Grant
    Filed: March 13, 2024
    Date of Patent: December 24, 2024
    Assignee: Jiangxi University of Chinese Medicine
    Inventors: Zhenfeng Wu, Wei He, Di Wang, Ming Yang, Na Wan
  • Patent number: 12168755
    Abstract: In a method and system for treating a catalytic cracking gasoline, a catalytic cracking process, or a plant employs a fluidized reactor to carry out hydrodealkylation treatment on a catalytic cracking oil gas or catalytic cracking gasoline, so that heavy aromatics present therein can be efficiently converted into light olefins and light aromatics. The method and system can improve the yield of light olefins, allow a long-period stable operation, relieve the contradiction between supply and demand of light aromatics, and solve the problem of high content of heavy aromatics that have low value and are difficult to be utilized in aromatics present in oil gas from catalytic cracking units.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: December 17, 2024
    Assignees: CHINA PETROLEUM & CHEMICAL CORPORATION, RESEARCH INSTITUTE OF PETROLEUM PROCESSING, SINOPEC
    Inventors: Di Wang, Xiaoli Wei, Jianhong Gong, Jingchuan Yu, Jiushun Zhang
  • Patent number: 12168951
    Abstract: Systems, apparatuses, and methods include predicting a sulfur exposure of one or more copper-zeolite catalysts deployed in an exhaust aftertreatment system; comparing the predicted sulfur exposure to a predefined sulfur exposure threshold; and responsive to the determination, heating the exhaust aftertreatment catalyst to a predefined heat treatment temperature for a predefined time period to desulfate the one or more copper-zeolite catalysts.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: December 17, 2024
    Assignee: Cummins Inc.
    Inventors: Di Wang, Richard J. Ancimer, Michael J. Cunningham, Aleksey Yezerets, Jinyong Luo, Yadan Tang, Yuhui Zha