Patents by Inventor Ding Wang

Ding Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200114429
    Abstract: Provided is a method of making colloidal platinum nanoparticles. The method includes three consecutive steps: dissolving platinum powders by a halogen-containing oxidizing agent in HCl to obtain an inorganic platinum solution containing an inorganic platinum compound; adding a reducing agent into the same reaction vessel to form a mixture solution and heating the mixture solution to undergo a reduction reaction and produce a composition containing platinum nanoparticles, residues and a gas, and guiding the gas out of the reaction vessel, wherein the amount of the residues is less than 15% by volume of the mixture solution; and adding a medium into the same reaction vessel to disperse the platinum nanoparticles to obtain colloidal platinum nanoparticles. The method is simple, safe, time-effective, cost-effective, and has the advantage of high yield.
    Type: Application
    Filed: April 23, 2019
    Publication date: April 16, 2020
    Inventors: Lin LU, Kuei-Sheng FAN, Chun-Lun CHIU CHIU, Han-Wu YEN, Hao-Chan HSU, Chia-Yi LIN, Chi-Jiun PENG, Cheng-Ding WANG, Jim-Min FANG
  • Publication number: 20200083185
    Abstract: Methods of forming connectors and packaged semiconductor devices are disclosed. In some embodiments, a connector is formed by forming a first photoresist layer over an interconnect structure, and patterning the first photoresist layer. The patterned first photoresist layer is used to form a first opening in an interconnect structure. The patterned first photoresist is removed, and a second photoresist layer is formed over the interconnect structure and in the first opening. The second photoresist layer is patterned to form a second opening over the interconnect structure in the first opening. The second opening is narrower than the first opening. At least one metal layer is plated through the patterned second photoresist layer to form the connector.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 12, 2020
    Inventors: Jung Wei Cheng, Hai-Ming Chen, Chien-Hsun Lee, Hao-Cheng Hou, Hung-Jen Lin, Chun-Chih Chuang, Ming-Che Liu, Tsung-Ding Wang
  • Publication number: 20200081204
    Abstract: A grating coupled laser (GCL) includes an active section and a passive section. The passive section is butt coupled to the active section to form a butt joint with the active section. The active section includes an active waveguide. The passive section includes a passive waveguide, a transmit grating coupler, and a top cladding. The passive waveguide is optically coupled end to end with the active waveguide and includes a first portion and a second portion. The first portion of the passive waveguide is positioned between the second portion of the passive waveguide and the active waveguide. The transmit grating coupler is optically coupled to the passive waveguide and includes grating teeth that extend upward from the second portion of the passive waveguide. The top cladding is positioned directly above the first portion of the passive waveguide and is absent directly above at least some of the transmit grating coupler.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 12, 2020
    Inventors: Daniel Mahgerefteh, Shiyun Lin, Yasuhiro Matsui, Ding Wang, David Bruce Young
  • Publication number: 20200020548
    Abstract: A semiconductor device includes a passivation layer formed on a semiconductor substrate, a protective layer overlying the passivation layer and having an opening, an interconnect structure formed in the opening of the protective layer, a bump formed on the interconnect structure, and a molding compound layer overlying the interconnect structure and being in physical contact with a lower portion of the bump.
    Type: Application
    Filed: September 23, 2019
    Publication date: January 16, 2020
    Inventors: Hung-Jen Lin, Tsung-Ding Wang, Chien-Hsiun Lee
  • Publication number: 20200013635
    Abstract: A device includes a first die, a second die, one or more redistribution layers (RDLs) electrically connected to the first die, a plurality of connectors on a surface of the one or more RDLs and a package substrate electrically connected to the first die and the second die. The package substrate is electrically connected to the first die through the one or more RDLs and the plurality of connectors. The package substrate comprises a cavity, and the second die is at least partially disposed in the cavity.
    Type: Application
    Filed: September 17, 2019
    Publication date: January 9, 2020
    Inventors: Jung Wei Cheng, Tsung-Ding Wang, Mirng-Ji Lii, Chien-Hsiun Lee, Chen-Hua Yu
  • Patent number: 10522486
    Abstract: Methods of forming connectors and packaged semiconductor devices are disclosed. In some embodiments, a connector is formed by forming a first photoresist layer over an interconnect structure, and patterning the first photoresist layer. The patterned first photoresist layer is used to form a first opening in an interconnect structure. The patterned first photoresist is removed, and a second photoresist layer is formed over the interconnect structure and in the first opening. The second photoresist layer is patterned to form a second opening over the interconnect structure in the first opening. The second opening is narrower than the first opening. At least one metal layer is plated through the patterned second photoresist layer to form the connector.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung Wei Cheng, Hai-Ming Chen, Chien-Hsun Lee, Hao-Cheng Hou, Hung-Jen Lin, Chun-Chih Chuang, Ming-Che Liu, Tsung-Ding Wang
  • Patent number: 10515931
    Abstract: An assembly has at least one integrated circuit (IC) die fixed in a medium. The assembly has a redistribution layer over the IC die. The redistribution layer has conductors connecting first pads on active faces of the IC die to second pads at an exposed surface of the assembly. A die unit is provided over the IC die. The die unit has a bottom die interconnected to a package substrate. Respective portions of the redistribution layer corresponding to each of the at least one IC die partially underlie the bottom die, and extend beyond the bottom die. The package substrate has contacts connected to the ones of the second pads corresponding to the at least one IC die.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Ding Wang, Chien-Hsun Lee
  • Patent number: 10514512
    Abstract: Optical connectors are provided for connecting sets of optical waveguides, such as optical fiber ribbons to each other, to printed circuit boards, or to backplanes. The provided connectors utilize expanded beam optics with non-contact optical mating resulting in relaxed mechanical precision requirements. The provided connectors can have low optical loss, are easily scalable to high channel count (optical fibers per connector) and can be compatible with low insertion force blind mating.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: December 24, 2019
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Michael A. Haase, Terry L. Smith, Barry J. Koch, Ding Wang, Alexander R. Mathews
  • Patent number: 10483132
    Abstract: A semiconductor device includes a passivation layer formed on a semiconductor substrate, a protective layer overlying the passivation layer and having an opening, an interconnect structure formed in the opening of the protective layer, a bump formed on the interconnect structure, and a molding compound layer overlying the interconnect structure and being in physical contact with a lower portion of the bump.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: November 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jen Lin, Tsung-Ding Wang, Chien-Hsun Lee
  • Publication number: 20190330523
    Abstract: A thermochromic polymer composition including a base polymer material; a temperature sensitive material, which changes a color of the thermochromic polymer composition in response to a temperature change; and a stabilizer, which enhances stability performance of the thermochromic polymer composition. The thermochromic polymer composition which has a good thermochromic performance and good thermal performance and thus could provide a visible indication of the overheat condition. An electrical device is formed from the thermochromic polymer composition. A further embodiment of the process for preparing the thermochromic polymer composition and forming the electrical device.
    Type: Application
    Filed: July 5, 2019
    Publication date: October 31, 2019
    Inventors: Nan Li, Jiansheng Chen, Yan Gao, Cuicui Su, Ding Wang, Bo Qiao
  • Publication number: 20190323902
    Abstract: A thermochromic electrical device is made of thermochromic plastic material and has a visual indicator pre-printed with regular print or ink to allow visible warning of a scalding situation when the thermochromic plastic portion fades from its original color to leave the warning visible. The electric device may be any one of, for example, a cable tie, a cable connector, a terminal connector, a splice connector, and a cable jacket.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 24, 2019
    Inventors: Yan Gao, Nan Li, Jiansheng Chen, Cuicui Su, Ding Wang, Bo Qiao
  • Publication number: 20190287306
    Abstract: A method of providing a geographically distributed live mixed-reality meeting is described. The method comprises receiving, from a camera at a first endpoint, a live video stream; generating an mixed reality view incorporating the received video stream; rendering the mixed reality view at a display at the first endpoint and transmitting the mixed reality view to at least one other geographically distant endpoint; receiving data defining a bounding area; calculating a real world anchor for the bounding area using the data defining the bounding area; rendering the bounding area in the mixed reality view at a real world position determined using the real world anchor; and applying different rule sets to content objects placed into the mixed reality view by users dependent upon the position of the content objects relative to the bounding area in real world space.
    Type: Application
    Filed: May 18, 2018
    Publication date: September 19, 2019
    Inventors: Anthony Arnold WIESER, Martin GRAYSON, Kenton Paul Anthony O'HARA, Edward Sean Lloyd RINTEL, Camilla Alice LONGDEN, Philipp STEINACHER, Dominic ROEDEL, Advait SARKAR, Shu Sam CHEN, Jens Emil Krarup GRONBAEK, Ding WANG
  • Patent number: 10365439
    Abstract: The disclosure generally relates to sets of optical waveguides such as optical fiber ribbons and embedded optical waveguides, and optical interconnects useful for connecting multiple optical waveguides such as in optical fiber ribbon cables and printed circuit boards (PCBs) having optoelectronic capabilities. In particular, the disclosure provides an efficient, compact, and reliable optical waveguide connector that incorporates microlenses and re-directing elements which combine the features of optical waveguide alignment, along with redirecting and shaping of the optical beam.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: July 30, 2019
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Ding Wang, Terry L. Smith
  • Publication number: 20190220042
    Abstract: A flight control method includes obtaining route data for instructing an aircraft to fly on a route represented by the route data, analyzing the route data according to a preset splitting condition, splitting the route into multiple sub-routes in response to the route data satisfying the preset splitting condition, and determining a to-be-executed sub-route from the multiple sub-routes and transmitting the to-be-executed sub-route to the aircraft.
    Type: Application
    Filed: March 26, 2019
    Publication date: July 18, 2019
    Inventors: Zhuo GUO, Zhuo XIE, Haoyu LI, Wenlin LI, Ding WANG, Zebo YANG
  • Publication number: 20190221128
    Abstract: A flight control method includes acquiring, by a smart terminal, data of at least two flight routes. The flight control method also includes associating, by the smart terminal and based on preset information of at least two aircrafts, at least one aircraft with a flight route of the at least two flight routes. The flight control method further includes based on a result of the associating, sending, by the smart terminal, data of the flight route to the associated at least one aircraft.
    Type: Application
    Filed: March 22, 2019
    Publication date: July 18, 2019
    Inventors: Zhuo GUO, Zhuo XIE, Zebo YANG, Wenlin LI, Lei WANG, Ding WANG, Haoyu LI
  • Patent number: 10319655
    Abstract: A device includes a bottom package component that includes a bottom die, and a dam over a top surface of the bottom die. The dam has a plurality of sides forming a partial ring, with an air gap surrounded by the plurality of side portions. The air gap overlaps the bottom die. A top package component is bonded to the bottom package component, wherein the air gap separates a bottom surface of the top package component from the bottom die.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: June 11, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Tsung-Ding Wang, Chen-Shien Chen, Chung-Shi Liu, Jiun Yi Wu
  • Patent number: 10319607
    Abstract: A device comprises a substrate having a die mounted on the first side of the substrate and a moldable underfill (MUF) disposed on the first side of the substrate and around the die. An interposer is mounted on the first side of the substrate, with the interposer having lands disposed on a first side of the interposer. The interposer mounted to the substrate by connectors bonded to a second side of the interposer, the connectors providing electrical connectivity between the interposer and the substrate. A package is mounted on the first side of the interposer and is electrically connected to the lands. At least one of the lands is aligned directly over the die and wherein a pitch of the connectors is different than a pitch of the lands.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: June 11, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun Yi Wu, Yu-Min Liang, Mirng-Ji Lii, Chien-Hsun Lee, Tsung-Ding Wang, Jung Wei Cheng
  • Publication number: 20190123016
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a bump structure disposed on a first substrate and a molding compound in physical contact with the bump structure. The bump structure protrudes from the molding compound. A conductive region is on a second substrate and contacts the bump structure. A no-flow underfill (NUF) material is vertically between the molding compound and the second substrate and laterally surrounds the bump structure. The NUF material is separated from the molding compound.
    Type: Application
    Filed: December 17, 2018
    Publication date: April 25, 2019
    Inventors: Hung-Jen Lin, Tsung-Ding Wang, Chien-Hsiun Lee, Wen-Hsiung Lu, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 10261264
    Abstract: A multiple optical fiber connection apparatus comprises an outer housing to receive a plurality of optical fibers and a collar body disposed within the housing having a fiber comb portion disposed at a front portion of the collar body. The fiber comb portion includes an array of grooves, with each groove configured to guide an optical fiber disposed therein, and a ramp section adjacent the groove array, wherein the ramp section including a gradual rising portion.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: April 16, 2019
    Assignee: Corning Research & Development Corporation
    Inventors: Mark R. Richmond, Johnny P. Bryant, Ding Wang, James R. Bylander, Nathan Stipek
  • Publication number: 20190103353
    Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.
    Type: Application
    Filed: August 1, 2018
    Publication date: April 4, 2019
    Inventors: Chung-Shi Liu, Chien-Hsun Lee, Jiun Yi Wu, Hao-Cheng Hou, Hung-Jen Lin, Jung Wei Cheng, Tsung-Ding Wang, Yu-Min Liang, Li-Wei Chou