Abstract: A system includes test control circuitry in parallel with power control circuitry. The power control circuitry enables a core processor and memory interface drivers responsive to a reset. The test control circuitry can enable the memory interface drivers separately from the core processor to enable testing of the connections to the memory devices. The test control circuitry is triggered separately from the other power control circuitry, and can be protected to allow only secured access for testing.

Abstract: A memory device is described. The memory device includes logic circuitry to perform calibrations of resistive network terminations and data drivers of the memory device while the memory device is within a self refresh mode.

Abstract: In a computer system, a multilevel memory includes a near memory device and a far memory device, which are byte addressable. The multilevel memory includes a controller that receives a data request including original tag information. The controller includes routing hardware to selectively provide alternate tag information for the data request to cause a cache hit or a cache miss to selectively direct the request to the near memory device or to the far memory device, respectively. The controller can include selection circuitry to select between the original tag information and the alternate tag information to control where the data request is sent.

Abstract: A method is provided to supply power to wafer-scale ICs. The method includes receiving a wafer containing ICs placed on the top of the wafer. The wafer has through-silicon vias to provide power from the bottom to the ICs. The method also includes a printed circuit board, which has power rails in a pattern on the top of the printed circuit board, where the rails provide voltage and ground. The method continues with placing metal solder spheres between the bottom of the wafer and the top of the printed circuit board, where the spheres provide connections between the two, and where the spheres are free to move and operate as mechanical springs to resist clamping forces. The method also includes applying clamping pressure to the structure to establish connections by compressing the spheres, where no soldering is required.

Abstract: Techniques and mechanisms for configuring an integrated circuit to couple to, and exchange data with, a hardware interface. In an embodiment, the integrated circuit comprises a data channel including a plurality of bits, configuration logic, and a plurality of contacts including a first contact group and a second contact group. In response to a signal indicating connectivity of the integrated circuit to the interface, a mode of the configuration logic is selected to couple the plurality of bits to one of the first contact group and the second contact group.

Abstract: The wiper device includes a wiper blade which extends in a longitudinal direction and at least one longitudinal strip that is pre-curved to have a curved shape when in a relaxed condition. The wiper device supports the wiper blade and biases the wiper blade into a curved shape. A connecting device is attached with the at least one longitudinal strip. The connecting device includes a two-piece base and a joint part which is pivotably connected with the two-piece base. The two-piece base includes a first piece, which is directly secured with the at least one longitudinal strip, and a second piece with laterally spaced apart side walls that are each J-shaped.

Abstract: The windscreen wiper device includes a wiper blade that is made of an elastomeric material and extends in a longitudinal direction. The windscreen wiper device also includes a joint part with a U-shaped cross-section that includes a top wall and a pair of side walls. At least one of the side walls has a spring loaded interference finger which projects outwardly for engaging an inner surface of a wiper arm to reduce side to side play between the joint part and the wiper arm.

Abstract: Examples include techniques to change a mode of operation for a memory device. Examples include using information stored at a memory array of the memory device to program mode registers at the memory device to change the mode of operation to a first mode of operation that corresponds to a frequency set point associated with dynamic voltage and frequency scaling for a processor coupled with the memory device.

Abstract: A method is provided to supply power to wafer-scale ICs. The method includes receiving a wafer containing ICs placed on the top of the wafer. The wafer has through-hole vias to provide power from the bottom to the ICs. The method also includes a printed circuit board, which has power rails in a pattern on the top of the printed circuit board, where the rails provide voltage and ground. The method continues with placing metal solder spheres between the bottom of the wafer and the top of the printed circuit board, where the spheres provide connections between the two, and where the spheres are free to move and operate as mechanical springs to resist clamping forces. The method also includes applying clamping pressure to the structure to establish connections by compressing the spheres, where no soldering is required.

Abstract: Examples include techniques to access or operate a dual in-line memory module (DIMM) via one or multiple data channels. In some examples, memory devices at or on the DIMM may be accessed via one or more data channels. The one or more data channels arranged such that the DIMM is configured to operate in a dual channel mode that includes two data channels or to operate in a single channel mode that includes a single data channel.

Abstract: A mold shuttle positioning system in a glass sheet forming system includes a mold mounted on a support frame. A shuttle frame including a pair of generally parallel elongate beams for receiving and supporting the mold support frame thereon. At least one support wheel assembly including a wheel and a shuttle guide is mounted in proximity to each of the shuttle beams to position and support each one of the beams as the shuttle frame is moved to position the mold supported thereon at one of multiple desired processing locations. At least one mold guide is mounted on the support surface of one of the beams for receiving and fixing the position of the mold support frame relative to the shuttle frame to align and prevent movement of the mold support frame with respect to the shuttle frame in any direction as the mold support frame is supported thereon.

Abstract: Devices, systems, and methods include an active mode to accommodate read/write operations of a memory device and a self-refresh mode to accommodate recharging of voltage levels representing stored data when read/write operations are idle. At least one register source provides a first voltage level and a second voltage level that is less than the first voltage level. With such a configuration, during the active mode, the memory device operates at the first voltage level as provided by the at least one register source, and during the self-refresh mode, the memory device operates at the second voltage level as provided by the at least one register source.

Abstract: One embodiment provides a method, including: accepting, at an input and display device, an ink stroke provided to an input overlay application; providing a display of the ink stroke on the input and display device; converting the ink stroke input into a converted input for an underlying application; providing the converted input to the underlying application; detecting a user input associated with the converted input; and reverting to the ink stroke on the input and display device. Other embodiments are described and claimed.

Abstract: A method is provided to supply power to wafer-scale ICs. The method includes receiving a wafer containing ICs placed on the top of the wafer. The wafer has through-hole vias to provide power from the bottom to the ICs. The method also includes a printed circuit board, which has power rails in a pattern on the top of the printed circuit board, where the rails provide voltage and ground. The method continues with placing metal solder spheres between the bottom of the wafer and the top of the printed circuit board, where the spheres provide connections between the two, and where the spheres are free to move and operate as mechanical springs to resist clamping forces. The method also includes applying clamping pressure to the structure to establish connections by compressing the spheres, where no soldering is required.

Abstract: A reduced density article of manufacture, and process for making same, made from a thermoplastic polycarbonate composition. The reduced density article of manufacture has (1) a certain density and (2) a certain micro structure containing from 1% to 20% by volume of voids wherein at least 80% of the voids are high aspect voids and less than 20% of the voids are spherical voids with a diameter of 10 to 100 microns. The polycarbonate thermoplastic composition comprises at least 50 mole % of a certain bisphenol A. The reduced density article of manufacture is made by a monofilament additive manufacturing technique.

Abstract: A multi-die memory device having fixed bandwidth interfaces can selectively connect portions of the interfaces of the multiple memory dies as a memory channel for the multi-die device. The selective application of the interface bits of the memory dies enables the application of ECC (error checking and correction) in memory devices that otherwise have insufficient connectors to exchange ECC information. The device includes circuitry to selectively apply CAS (column address select) signals to the memory dies to selectively connect the connectors of the memory dies. CAS selection can provide various configurations in which selected bits of a first memory die interface are combined with selected bit or bits of a second memory die interface to provide the device interface. The memory dies can operate in byte mode to apply only half of their data I/O (input/output) interface, with CAS doubled up to provide access to the memory arrays.

Abstract: Articles and procedures for preventing or treating vaginal prolapse, urinary incontinence, and other disorders of the pelvic floor.

Abstract: Devices, systems, and methods include an active mode to accommodate read/write operations of a memory device and a self-refresh mode to accommodate recharging of voltage levels representing stored data when read/write operations are idle. At least one register source provides a first voltage level and a second voltage level that is less than the first voltage level. With such a configuration, during the active mode, the memory device operates at the first voltage level as provided by the at least one register source, and during the self-refresh mode, the memory device operates at the second voltage level as provided by the at least one register source.

Abstract: In a memory system an interface circuit includes an interface to a memory array, and to a data signal. The circuit includes loopback circuitry to enable loopback of received data signals without having to access the data from the memory array. The circuit can be part of a memory device, a register device, or a data buffer. The circuit interfaces to a memory array of a memory device, and performs loopback functions for a host controller that can test the operation of the interface.

Abstract: A memory subsystem is enabled with a write pattern command. The write pattern command can have a different command encoding from other write commands. The write pattern command triggers a dynamic random access memory (DRAM) device to write a data pattern that is internally generated, instead of a bit pattern on the data signal lines of the data bus. The internally generated data pattern can be read from a register, such as a mode register. In response to a write pattern command, the DRAM device provides the write pattern data from the register to the memory array to write. Thus, the memory controller does not need to send the data to the memory device.