Patents by Inventor Edward J. Seminaro
Edward J. Seminaro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160226591Abstract: Aspects of the present invention include an optical transceiver for providing transmission and reception of optical signals. The optical transceiver includes a carrier having two opposing surfaces and one or more openings extending from a first of the two opposing surfaces to a second of the two opposing surfaces. The optical transceiver includes a laser driver chip coupled to the first surface. The optical transceiver includes a vertical cavity surface emitting laser (VCSEL) array chip coupled to the first surface. The optical transceiver includes a photodetector array chip coupled to the first surface. The optical transceiver includes a receiver amplifier chip coupled to the first surface. The optical transceiver includes an optical coupling element coupled to the second surface. The VCSEL array chip and the photodetector array chip are disposed such that optical signals can pass through the one or more openings in the carrier.Type: ApplicationFiled: February 4, 2015Publication date: August 4, 2016Inventors: Amilcar Arvelo, Alan F. Benner, Michael J. Ellsworth, Eric J. McKeever, Thong N. Nguyen, Edward J. Seminaro
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Publication number: 20160223772Abstract: Aspects of the present invention include an optical fiber routing mat for routing optical fibers. The optical fiber routing mat includes a first layer of material and a second layer of material. A surface of the first layer of material is adhesively coupled to a surface of the second layer of material. The optical fiber routing mat includes one or more optical fibers disposed between the first layer of material and the second layer of material. The one or more optical fibers are bent to a radius at least large enough to prevent damage to the one or more optical fibers.Type: ApplicationFiled: September 9, 2015Publication date: August 4, 2016Inventors: Alan F. Benner, Mark A. Brandon, Eric J. McKeever, Edward J. Seminaro
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Publication number: 20160223763Abstract: Aspects of the present invention include an optical fiber connector for connecting optical fibers. The optical fiber connector includes a ferrule coupled to one or more optical fiber ribbons. The optical fiber connector includes a connector housing coupled with a radius controlled ribbon bending housing. The connector housing surrounds the ferrule on at least four sides, and the one or more optical fiber ribbons coupled to the ferrule are within the connector housing. The optical fiber connector includes a strain relief clamp coupled with the radius controlled ribbon bending housing.Type: ApplicationFiled: September 10, 2015Publication date: August 4, 2016Inventors: Alan F. Benner, Mark A. Brandon, Michael J. Ellsworth, Eric J. McKeever, Thong N. Nguyen, Edward J. Seminaro
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Publication number: 20160223757Abstract: Aspects of the present invention include an optical fiber connector for connecting optical fibers. The optical fiber connector includes a ferrule coupled to one or more optical fiber ribbons. The optical fiber connector includes a connector housing coupled with a radius controlled ribbon bending housing. The connector housing surrounds the ferrule on at least four sides, and the one or more optical fiber ribbons coupled to the ferrule are within the connector housing. The optical fiber connector includes a strain relief clamp coupled with the radius controlled ribbon bending housing.Type: ApplicationFiled: February 4, 2015Publication date: August 4, 2016Inventors: Alan F. Benner, Mark A. Brandon, Michael J. Ellsworth, Eric J. McKeever, Thong N. Nguyen, Edward J. Seminaro
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Publication number: 20160172259Abstract: A method of forming a custom module lid. The method may include placing a multichip module (MCM) between a module base and a temporary lid, target components are exposed through viewing windows in the temporary lid, a top surface of the target components is measured and mapped to create a target profile, the target profile is used to form custom pockets in a custom lid, and the custom pockets correspond to the target components.Type: ApplicationFiled: November 7, 2014Publication date: June 16, 2016Inventors: Amilcar R. Arvelo, Michael J. Ellsworth, Eric J. McKeever, Thong N. Nguyen, Edward J. Seminaro
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Publication number: 20160157359Abstract: A method of forming a custom module lid. The method may include placing a multichip module (MCM) between a module base and a temporary lid, target components are exposed through viewing windows in the temporary lid, a top surface of the target components is measured and mapped to create a target profile, the target profile is used to form custom pockets in a custom lid, and the custom pockets correspond to the target components.Type: ApplicationFiled: August 25, 2015Publication date: June 2, 2016Inventors: Amilcar R. Arvelo, Michael J. Ellsworth, Eric J. McKeever, Thong N. Nguyen, Edward J. Seminaro
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Publication number: 20160154196Abstract: Embodiments are directed to decomposing an all-to-all interconnection network topology into a plurality of smaller all-to-all interconnection network elements, replicating the interconnection network elements in a modular fashion, wherein the modular interconnection network elements construct the all-to-all interconnection network topology. Embodiments are directed to an apparatus comprising a shuffle cable assembly comprising a plurality of shuffle cables, where each of the plurality of shuffle cables comprises a plurality of optical fibers and a plurality of connectors, a block configured to organize, align, and maintain a position of the plurality of connectors, and at least one handle coupled to the block and configured to actuate the plurality of connectors.Type: ApplicationFiled: March 12, 2013Publication date: June 2, 2016Inventors: Alan F. Benner, David Graybill, Edward J. Seminaro, Richard Rieland
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Publication number: 20160079140Abstract: A package for a multi-chip module includes a top cold plate and a bottom plate whose perimeters are in thermal communication so the plates together completely encase the module except for a connector passing through the bottom plate. The cold plate has copper tubing pressed into a groove formed in a serpentine pattern. The perimeter of the cold plate has thermal conduction fins which mate with thermal conduction slots in the perimeter of the bottom plate. Thermal interface material is disposed in gaps between the plates and chips on the module, the gaps having dimensions controlled by support ribs of plates which abut the module substrate. The cold plate is used on the hottest side of the module, e.g., the side having computationally-intensive chips such as ASICs. A densely packed array of these packages can be used in a central electronic complex drawer with a shared coolant circulation system.Type: ApplicationFiled: September 12, 2014Publication date: March 17, 2016Inventors: Amilcar R. Arvelo, Michael J. Ellsworth, Eric J. McKeever, Thong N. Nguyen, Edward J. Seminaro
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Publication number: 20160081197Abstract: A package for a multi-chip module includes a top cold plate and a bottom plate whose perimeters are in thermal communication so the plates together completely encase the module except for a connector passing through the bottom plate. The cold plate has copper tubing pressed into a groove formed in a serpentine pattern. The perimeter of the cold plate has thermal conduction fins which mate with thermal conduction slots in the perimeter of the bottom plate. Thermal interface material is disposed in gaps between the plates and chips on the module, the gaps having dimensions controlled by support ribs of plates which abut the module substrate. The cold plate is used on the hottest side of the module, e.g., the side having computationally-intensive chips such as ASICs. A densely packed array of these packages can be used in a central electronic complex drawer with a shared coolant circulation system.Type: ApplicationFiled: August 31, 2015Publication date: March 17, 2016Inventors: Amilcar R. Arvelo, Michael J. Ellsworth, Eric J. McKeever, Thong N. Nguyen, Edward J. Seminaro
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Patent number: 8898665Abstract: A method for accessing a memory space allocated to a virtual machine, the method includes: receiving a request from the virtual machine to generate, for another virtual machine, a memory credential associated with a certain memory space allocated to the virtual machine; generating, in response to the request, a cryptographically signed credential; sending the cryptographically signed credential to the other virtual machine; receiving from the other virtual machine an access request to access at least one memory entry within the certain memory space; and accessing the at least one memory entry, if the access request complies with the memory credential.Type: GrantFiled: February 29, 2012Date of Patent: November 25, 2014Assignee: International Business Machines CorporationInventors: Shmuel Ben-Yehuda, Zorik Machulsky, Julian Satran, Edward J. Seminaro, Leah Shalev, Ilan Shimony
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Publication number: 20140338325Abstract: A hardware retention mechanism comprising a frame including a first guide shoulder and a pivot point; an actuator arm including a first guide post; and a first shape memory alloy wire strung between the first guide shoulder and the first guide post that rotates the actuator arm between a locked position and an unlocked position. The actuator arm is rotatable around the pivot point between a locked position and an unlocked position. In some embodiments, the frame may further comprise a second guide shoulder, the actuator arm may further comprise a second guide post, and a second shape memory alloy wire may be strung between the second guide shoulder and the second guide post that rotates the actuator arm between an unlocked position and a locked position.Type: ApplicationFiled: July 30, 2014Publication date: November 20, 2014Inventors: Philip M. Corcoran, Eric A. Eckberg, Joseph D. Rico, Edward J. Seminaro
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Patent number: 8827331Abstract: A hardware retention mechanism comprising a frame including a first guide shoulder and a pivot point; an actuator arm including a first guide post; and a first shape memory alloy wire strung between the first guide shoulder and the first guide post that rotates the actuator arm between a locked position and an unlocked position. The actuator arm is rotatable around the pivot point between a locked position and an unlocked position. In some embodiments, the frame may further comprise a second guide shoulder, the actuator arm may further comprise a second guide post, and a second shape memory alloy wire may be strung between the second guide shoulder and the second guide post that rotates the actuator arm between an unlocked position and a locked position.Type: GrantFiled: June 6, 2011Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventors: Philip M. Corcoran, Eric A. Eckberg, Joseph D. Rico, Edward J. Seminaro
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Patent number: 8539274Abstract: A method, apparatus, and computer program product for load shedding during an emergency power off event. In one embodiment, power is supplied from a main power source to a plurality of electrical loads within a device enclosure. Power loss is detected from the main power source. Upon detecting the power loss, at least one of the electrical loads is disconnected from a supplemental power source such that power to at least one remaining load connected to the supplemental power source is sustained by the supplementary power source.Type: GrantFiled: March 17, 2010Date of Patent: September 17, 2013Assignee: International Business Machines CorporationInventors: Robert G. Atkins, Edward N. Cohen, Philip M. Corcoran, William J. Petrowsky, Edward J. Seminaro
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Patent number: 8453398Abstract: A support system is provided and includes first and second raised floor tiles, a ramp and sheeting. The ramp includes first and second edges and is disposable with the first edge adjacent to the first raised floor tile and the second edge adjacent to the second raised floor tile. The ramp has a substantially similar thickness as the first raised floor tile at the first edge and a different thickness from the second raised floor tile at the second edge. The sheeting is disposable on the second raised floor tile to abut the second edge of the ramp and has a thickness such that a combined thickness of the sheeting and the second raised floor tile is substantially similar to the thickness of the ramp at the second edge.Type: GrantFiled: March 29, 2012Date of Patent: June 4, 2013Assignee: International Business Machines CorporationInventors: Robert G. Atkins, Eric J. McKeever, Edward J. Seminaro
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Patent number: 8369092Abstract: An input/output (I/O) and disk expansion subsystem is provided for an electronics rack which provides expanded I/O and/or disk storage capabilities to electronic subsystems of the rack. The expansion subsystem includes a subsystem enclosure having first and second sides in opposing relation, with the first side accessible through a front of the rack and the second accessible through a back of the rack when the enclosure resides within the rack. A plurality of field-replaceable units reside within the subsystem enclosure, and are accessible and removable through the first or second sides of the enclosure without removing the enclosure from the rack. The field-replaceable units include an input/output adapter cage(s), a storage device cage, power and control supplies, fan assemblies, and a midplane connector assembly. The adapter cage, storage device cage, and power and control supply dock to and are electrically interconnected by the midplane connector assembly.Type: GrantFiled: April 27, 2010Date of Patent: February 5, 2013Assignee: International Business Machines CorporationInventors: Robert G. Atkins, Philip M. Corcoran, Edward J. Seminaro, Jeffrey A. Verkerke
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Patent number: 8351200Abstract: Systems and methods are provided for cooling an electronics rack and a computer room from a single unit, which includes a heat-generating electronics subsystem across which air flows from an air inlet to an air outlet side of the rack. First and second modular cooling units (MCUs) are associated with the rack and configured to provide system coolant to the electronics subsystem for cooling thereof. System coolant supply and return manifolds are in fluid communication with the MCUs for facilitating providing of system coolant to the electronics subsystem, and to an air-to-liquid heat exchanger associated with the rack for exclusively cooling air passing through the rack, as well as conditioning the ambient air of the computer room. Such cooling is exclusive of an outside-of-rack conditioned air unit.Type: GrantFiled: April 16, 2009Date of Patent: January 8, 2013Assignee: International Business Machines CorporationInventors: Ravi K. Arimilli, Michael J. Ellsworth, Jr., Edward J. Seminaro
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Patent number: 8352758Abstract: An energy management control method and controller reduce power supply current and/or subsystem cooling overhead that reduces system efficiency, may reduce system reliability and may increase ambient noise. Multiple device connectors are supplied from corresponding soft switches that are programmed to provide a current level that is sufficient to supply the maximum current for the device installed in the corresponding device connector. The current level may be determined from device information provided from the device during initialization, which may directly specify a maximum current requirement. Alternatively, the maximum current requirement can be determined from other device-identifying information such as a unique device identifier. As a result a guaranteed maximum current or power and power dissipation can be determined, and multiple power supplies and/or cooling devices such as air movement devices (AMDs) may be enabled, disabled or otherwise controlled accordingly.Type: GrantFiled: March 22, 2010Date of Patent: January 8, 2013Assignee: International Business Machines CorporationInventors: Robert G. Atkins, Edward N Cohen, Philip M Corcoran, Edward J Seminaro
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Patent number: 8332552Abstract: An integrated processor design includes physical interface macros supporting heterogeneous electrical properties. The processor design comprises a plurality of processing cores and a plurality of physical interfaces to connect to a memory interface, a peripheral component interconnect express (PCI Express or PCIe) interface for input/output, an Ethernet interface for network communication, and/or a serial attached SCSI (SAS) interface for storage. Each physical interface may be programmatically connected to a selected interface controller, such as a memory controller, a PCI Express controller, or an Ethernet controller, for example. A plurality of such controllers may be connected to a switch within the processor design, with the switch also being connected to each physical interface macro. Thus, the physical interface macros may be programmatically connected to a subset of the plurality of controllers.Type: GrantFiled: November 13, 2008Date of Patent: December 11, 2012Assignee: International Business Machines CorporationInventors: Ravi K. Arimilli, Claude Basso, Jean L. Calvignac, Daniel M. Dreps, Edward J. Seminaro
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Publication number: 20120308294Abstract: A hardware retention mechanism comprising a frame including a first guide shoulder and a pivot point; an actuator arm including a first guide post; and a first shape memory alloy wire strung between the first guide shoulder and the first guide post that rotates the actuator arm between a locked position and an unlocked position. The actuator arm is rotatable around the pivot point between a locked position and an unlocked position. In some embodiments, the frame may further comprise a second guide shoulder, the actuator arm may further comprise a second guide post, and a second shape memory alloy wire may be strung between the second guide shoulder and the second guide post that rotates the actuator arm between an unlocked position and a locked position.Type: ApplicationFiled: June 6, 2011Publication date: December 6, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Philip M. Corcoran, Eric A. Eckberg, Joseph D. Rico, Edward J. Seminaro
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Publication number: 20120273185Abstract: A method, system, and computer program product are provided for controlling liquid-cooled electronics, which includes measuring a first set point temperature, Ta, wherein the Ta is based on a dew point temperature, Tdp of a computer room. A second set point temperature, Tb, is measured, wherein the Tb is based on a facility chilled liquid inlet temperature, Tci, and a rack power, Prack, of an electronics rack. A Modular Cooling Unit (MCU) set point temperature, Tsp, is selected. The Tsp is the higher value of said Ta and said Tb. Responsive to the selected Tsp, a control valve is regulated. The control valve controls a flow of liquid that passes through a heat exchanger.Type: ApplicationFiled: April 12, 2012Publication date: November 1, 2012Applicant: IBM CORPORATIONInventors: RAVI K. ARIMILLI, MICHAEL J. ELLSWORTH, JR., EDWARD J. SEMINARO