Abstract: A cell array includes a memory cell region in which memory cells are formed and a peripheral region that is provided around the memory cell region. In the memory cell region, first lines are extended in parallel with a first direction, and the first lines are repeatedly formed at first intervals in a second direction orthogonal to the first direction. In the peripheral region, each of the first lines located at (4n?3)-th (n is a positive integer) and (4n?2)-th positions in the second direction from a predetermined position has a contact connecting portion on one end side in the first direction of the first line. In the peripheral region, each of the first lines located at (4n?1)-th and 4n-th positions in the second direction from the predetermined position has the contact connecting portion on the other end side in the first direction of the first line. The contact connecting portion is formed so as to contact a contact plug extended in a laminating direction.

Abstract: A semiconductor memory device having a first wiring layer which is provided on a first insulator, and which extends in a first direction, and a non-volatile memory cell which is provided in a pillar shape on the first wiring layer, and which includes a non-ohmic element and variable resistance element connected in series. The resistance value of the variable resistance element changes in accordance with a voltage or current applied thereto. A barrier layer is provided on the memory cell and is configured in an in-plane direction. A conductive layer is provided on the barrier layer and is configured in an in-plane direction. A second insulator is provided on the first insulator and covers side surfaces of the memory cell, the barrier layer, and the conductive layer. A second wiring layer is provided on the conductive layer and extends in a second direction.

Abstract: A method of manufacturing a semiconductor device, comprises forming a first mask pattern on an under-layer region, forming a plurality of dummy-line patterns on the under-layer region, the dummy-line patterns being arranged at a first pitch, forming second mask patterns having mask parts provided on long sides of the dummy-line patterns, removing the dummy-line patterns, and etching the under-layer region by using the first mask pattern and the mask parts as a mask.

Abstract: A plurality of bit lines s arranged crossing a plurality of first word lines. A first diode is arranged at each cross point of the first word lines and the bit lines. A cathode of the first diode is connected to one of the first word lines. A first variable resistance film configuring the first diode is provided between the anodes of the first diodes and the bit lines, and configures a first memory cell together with each of the first diodes, and further, is used in common to the first diodes.

Abstract: Systems and methods for reliably canceling a DMA transfer mode and accelerating printer initialization. A host device 3 for controlling a printer having a DMA transfer mode for printing by transferring image data associated with a received image print command to a print buffer 15. The host device 3 has a print data generating unit 33 for generating the image print command, memory 35 for storing the data size of the image data associated with the image print command generated by the print data generating unit 33, and a printer control unit 34 for sending to the printer 1 an initialization command having null data of the data size stored in memory 35 added to the beginning of the initialization command.

Abstract: A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed at predetermined intervals on the semiconductor substrate, each word line having a gate insulating film, a charge storage layer, a first insulating film, and a controlling gate electrode which are stacked in order, and including a metal oxide layer above the level of the gate insulating film, a second insulating film covering a side of the word line and a surface of the semiconductor substrate between the word lines, and having a film thickness of 15 nm or less, and a third insulating film formed between the word lines adjacent to each other such that a region below the level of the metal oxide layer has a cavity.

Abstract: A nonvolatile semiconductor memory device comprises a semiconductor substrate; a cell array block formed on the semiconductor substrate and including plural stacked cell array layers each with a plurality of first lines, a plurality of second lines crossing the plurality of first lines, and memory cells connected at intersections of the first and second lines between both lines; and a plurality of via-holes extending in the stacked direction of the cell array layers to individually connect the first or second line in the each cell array layer to the semiconductor substrate. The via-holes are formed continuously through the plural cell array layers, and multiple via-holes having equal lower end positions and upper end positions are connected to the first or second lines indifferent cell array layers.

Abstract: A light transmitting material having a tubular clad material and an amorphous core material having a refractive index higher than that of the tubular clad material, characterized in that the amorphous core material comprises a polymer derived from monomers comprising a polymer polyol and a polyfunctional compound having reactivity with a hydroxyl group.

Abstract: A plasma display device including a scan circuit, a plasma display panel, and a plurality of power sources for driving the plasma display panel. The scan circuit is configured to apply scan voltages to scan electrodes of the plasma display panel in order to select light-emitting cells and non-light-emitting cells during an address period. The scan circuit includes a capacitor configured to remove the need to provide a current cut-off switch to prevent undesirable current flowing between the power supplies during the operation of the plasma display.

Abstract: An engine output controller includes a delay timer which measures the period of time elapsed from a timing of a target hydraulic pressure of a release side hydraulic pressure, and control starts a predetermined period of time after a predetermined amount of torque increase is achieved. The engine output control stores maps of the predetermined periods of time and the amounts of torque increase corresponding to normal shifts, such as 3rd to 2nd and 4th to 3rd, and skip-shifts, such as 4th to 2nd, and selects the map corresponding to the type of downshift.

Abstract: This is directed to a processing method for carrying a cell structure (1) with a catalytic component. Information about a mass of the cell structure (1) is displayed on the surface thereof prior to the initiation of a carrying process, and in the carrying process, the information is read and the cell structure (1) is carried with an appropriate amount of the catalytic component on the basis of the information. When cell structures are processed for carrying thereon a catalytic component, each cell structure can carry an appropriate amount of the catalytic component in accordance with the mass of the cell structure, even if there is a variation in the masses of the cell structures.

Abstract: A low-cost capacitive load drive circuit, in which a reference voltage, a first voltage, and a second voltage are supplied to a capacitive load, and a plasma display apparatus using it, have been disclosed. The capacitive load drive circuit comprises a reference voltage switch the breakdown voltage of which is properly adjusted, a first switch, a reference voltage phase adjusting circuit, and a first phase adjusting circuit, and malfunctions due to the difference in switching characteristics can be prevented from occurring even when devices of different breakdown voltages are used.

Abstract: An assembling method for assembling an assembly by combining a plurality of mating members with each other, wherein inherent information regarding dimensions of individual members, which is necessary for the combination of members, has been marked on the member surface prior to the start of an assembling process, the information marked on the member is read in the assembling process, and members having a dimension that meets a proper combining condition are selected based on the information. An individual member and inherent information regarding the dimension of members can be handled integrally, when the mating members are combined with each other, members having a dimension that meets a proper combining condition are selected, and when the member is processed so as to correspond to the property thereof, proper processing corresponding to the inherent properties of each member can be performed easily and surely without troublesome work.

Abstract: The plasma display apparatus, in which the light emission efficiency is improved, has been disclosed. The fourth electrodes, which extend in the same direction of the first electrodes (X electrode) and the second electrodes (Y electrodes) and are exposed into the discharge space, are provided between the first and the second electrodes where the sustaining discharge is carried out, and when the sustain action is carried out, the fixed voltage between the voltage applied to the first electrode and that applied to the second electrode is applied to the fourth electrode provided between the first and the second electrodes where the sustain action is carried out in order to make the electric field between the first and the second electrodes uniform.

Abstract: For an optical reflecting mirror formed by applying injection molding to a plastic material, it is an object of the present invention to suppress warpage or distortion due to molding contraction and provide an optical reflecting mirror such as an axial eccentric a spherical mirror or free curved surface mirror with a highly accurate mirror surface, which is an axial eccentric a spherical mirror or free curved surface mirror formed by applying injection molding to a plastic material, including a rib connected in such a way as to intersect with the body having the mirror surface, formed at least at the outer edge of the mirror surface closest to the maximum curvature part within the mirror surface.

Abstract: A method of manufacturing a semiconductor device includes forming a plurality of dummy line patterns arranged at a first pitch on an underlying region, forming first mask patterns having predetermined mask portions formed on long sides of the dummy line patterns, each of the first mask patterns having a closed-loop shape and surrounding each of the dummy line patterns, removing the dummy line patterns, forming a second mask pattern having a first pattern portion which covers end portions of the first mask patterns and inter-end portions each located between adjacent ones of the end portions, etching the underlying region using the first mask patterns and the second mask pattern as a mask to form trenches each located between adjacent ones of the predetermined mask portions, and filling the trenches with a predetermined material.

Abstract: Systems and methods for reliably canceling a DMA transfer mode and accelerating printer initialization. A host device 3 for controlling a printer having a DMA transfer mode for printing by transferring image data associated with a received image print command to a print buffer 15. The host device 3 has a print data generating unit 33 for generating the image print command, memory 35 for storing the data size of the image data associated with the image print command generated by the print data generating unit 33, and a printer control unit 34 for sending to the printer 1 an initialization command having null data of the data size stored in memory 35 added to the beginning of the initialization command.

Abstract: A plastic lens, which does not require a modification to an inner diameter of a mirror frame but is uniform in outer diameter, is provided and include: protrusions on the circumference in at least three points divided thereof into three equal parts except for an injection gate point, in positions equally distant to a center O of the plastic lens. The protrusions have respective outer surfaces provided as fit portions to a mirror frame. The plastic lens preferably has a diameter of 50 mm or more and a thickness smallest at the center thereof.

Abstract: A method of manufacturing a semiconductor device, comprises forming a first mask pattern on an under-layer region, forming a plurality of dummy-line patterns on the under-layer region, the dummy-line patterns being arranged at a first pitch, forming second mask patterns having mask parts provided on long sides of the dummy-line patterns, removing the dummy-line patterns, and etching the under-layer region by using the first mask pattern and the mask parts as a mask.

Abstract: A semiconductor device comprising a plurality of first wirings provided in a predetermined layer on a substrate with being lined up, and formed to extend longer or contract shorter from one side toward the other side along a direction in which the first wirings are lined up, adjacent one-end portions of the first wirings being arranged in positions displaced from one another in a direction crossing at right angles the direction in which the first wirings are lined up.