Patents by Inventor Eiji Mochizuki

Eiji Mochizuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130334672
    Abstract: In a semiconductor device, semiconductor chips and lead frames are soldered at the same time on an insulating circuit board by one reflow soldering, and the positions of the externally led out lead frames undergo no change. In manufacturing the semiconductor device, after power semiconductor chips and control ICs are mounted on an insulating circuit board, and lead frames are disposed thereon, the semiconductor chips and lead frames are soldered at the same time on the insulating circuit board by one reflow soldering. Furthermore, after a primary bending work is carried out on the lead frames, and a terminal case is mounted over the insulating circuit board, a secondary bending work is carried out on the lead frames.
    Type: Application
    Filed: March 30, 2012
    Publication date: December 19, 2013
    Applicant: FUJI ELECTRIC CO., LTD
    Inventors: Toshio Denta, Tadanori Yamada, Eiji Mochizuki
  • Patent number: 8598688
    Abstract: A semiconductor device and manufacturing method are disclosed which prevent breakage and chipping of a semiconductor chip and improve device characteristics. A separation layer is in a side surface of an element end portion of the chip. An eave portion is formed by a depressed portion in the element end portion. A collector layer on the rear surface of the chip extends to a side wall and bottom surface of the depressed portion, and is connected to the separation layer. A collector electrode is over the whole surface of the collector layer, and is on the side wall of the depressed portion. The thickness of an outermost electrode film is 0.05 ?m or less. The collector electrode on the rear surface of the chip is joined onto an insulating substrate via a solder layer, which covers the collector electrode on a flat portion of the rear surface of the semiconductor chip.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: December 3, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Kyohei Fukuda, Eiji Mochizuki, Mitsutoshi Sawano, Takaaki Suzawa
  • Patent number: 8553306
    Abstract: An optical deflector includes a plurality of piezoelectric unimorph oscillating bodies (210a to 210d) that cause a reflecting plate (1) to oscillate rotationally, centering upon a pair of flexible support units (2a and 2b). The optical deflector forms a single structure of the oscillating plates (23a to 23b), the reflecting plate (1), the flexible support units (2a and 2b), and a support body (9), by connecting one set of the terminals of the oscillating plates (23a to 23d) of the suite of piezoelectric unimorph oscillating bodies (210a to 210d) to the flexible support units (2a and 2b), and connecting the other set of terminals to the support body (9). Furthermore, the plurality of piezoelectric unimorph oscillating bodies (210a to 210d) each respectively comprise a plurality of parallel oscillating bodies (23a1 to 23a-3, 23b-1 to 23b-3, 23c-1 to 23c-3), and (23d-1 to 23d-3), and a suite of parallel actuators (28a-1 to 28a-3, 28c-1 to 28c-3, and 28d-1 to 28d-3).
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: October 8, 2013
    Assignees: Ricoh Company, Ltd., Stanley Electric Co., Ltd.
    Inventors: Tetsurou Saitoh, Eiji Mochizuki, Yukito Sato, Yoshiaki Yasuda, Masahiro Akamatsu, Masanao Tani
  • Publication number: 20130237016
    Abstract: A semiconductor device and manufacturing method are disclosed which prevent breakage and chipping of a semiconductor chip and improve device characteristics. A separation layer is in a side surface of an element end portion of the chip. An eave portion is formed by a depressed portion in the element end portion. A collector layer on the rear surface of the chip extends to a side wall and bottom surface of the depressed portion, and is connected to the separation layer. A collector electrode is over the whole surface of the collector layer, and is on the side wall of the depressed portion. The thickness of an outermost electrode film is 0.05 ?m or less. The collector electrode on the rear surface of the chip is joined onto an insulating substrate via a solder layer, which covers the collector electrode on a flat portion of the rear surface of the semiconductor chip.
    Type: Application
    Filed: April 10, 2013
    Publication date: September 12, 2013
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kyohei FUKUDA, Eiji MOCHIZUKI, Mitsutoshi SAWANO, Takaaki SUZAWA
  • Patent number: 8462417
    Abstract: A light adjusting apparatus includes a substrate (10, 40) having an aperture, a plurality of incident light adjusting units (20a, 20b, 20c) each moving in a same plane, and a plurality of driving units (50a, 50b, 50c) respectively driving the incident light adjusting units (20a, 20b, 20c), and adjusts an incident light passing through the aperture by mutually moving the incident light adjusting units (20a, 20b, 20c) with the driving units to an aperture position that is center-aligned with the aperture and a retracted position that is retracted from the aperture. An incident light adjusting unit that is moved to the aperture position is positioned by contacting with at least one of other incident light adjusting units that are retracted from the aperture.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: June 11, 2013
    Assignee: Olympus Corporation
    Inventors: Takayuki Ide, Tomoya Ueda, Shunichi Shinohara, Eiji Mochizuki
  • Patent number: 8373916
    Abstract: An optical scanner, including a frame member; a pair of connection members near a coupling end with the frame member; a pair of elastic members connected with the frame member by the connection members; a mirror substrate supported by the pair of elastic members, the mirror substrate having a bending rigidity outward from the rotational axis for each area in accordance with a bending moment caused by oscillation, the mirror substrate having a slit at both connection ends with the pair of elastic members; and a piezoelectric element provided on each of the connection members, the piezoelectric element generating a torque for driving the mirror substrate oscillatable back and forth around the pair of elastic members as a torsion rotational axis.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: February 12, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Mitsumi Fujii, Tetsurou Saitoh, Eiji Mochizuki, Kohki Sasaki
  • Publication number: 20120313224
    Abstract: A semiconductor device and manufacturing method are disclosed which prevent breakage and chipping of a semiconductor chip and improve device characteristics. A separation layer is in a side surface of an element end portion of the chip. An eave portion is formed by a depressed portion in the element end portion. A collector layer on the rear surface of the chip extends to a side wall and bottom surface of the depressed portion, and is connected to the separation layer. A collector electrode is over the whole surface of the collector layer, and is on the side wall of the depressed portion. The thickness of an outermost electrode film is 0.05 ?m or less. The collector electrode on the rear surface of the chip is joined onto an insulating substrate via a solder layer, which covers the collector electrode on a flat portion of the rear surface of the semiconductor chip.
    Type: Application
    Filed: June 10, 2011
    Publication date: December 13, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kyohei FUKUDA, Eiji MOCHIZUKI, Mitsutoshi SAWANO, Takaaki SUZAWA
  • Patent number: 8273644
    Abstract: A soldering method of soldering first and second members includes shooting a laser light to at least one part of an outer peripheral portion surrounding a soldering-target region of the first member thereby to form an oxide film, and bonding the second member with the soldering-target region through a solder. According to the method, the solder resist is never exfoliated even after cleaning with chemicals for removing flux residues contained in solder.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: September 25, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Kazunaga Onishi, Yoshitaka Nishimura, Tatsuo Nishizawa, Eiji Mochizuki
  • Patent number: 8158458
    Abstract: A power semiconductor module and a method of manufacture thereof includes lead a frame carrying lead having inner and outer lead portions. The outer lead portions, which are connected by soldering to semiconductor chips simultaneously, eliminate the need for using bonding wires. Since no bonding wire is used for connecting the leads and the semiconductor chips, a sufficient current capacity is obtained. The bonding between an insulating circuit board and the semiconductor chips and the bonding between the semiconductor chips and the leads can be made simultaneously in a single step of reflow-soldering. As a result, the mounting time can be shortened and the power semiconductor module can be manufactured more efficiently.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: April 17, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Osamu Ikawa, Eiji Mochizuki, Masayuki Soutome, Norio Arikawa
  • Patent number: 8026566
    Abstract: A semiconductor device includes a first metal foil, an insulating sheet mounted on an upper surface of the first metal foil main, at least one second metal foil mounted on the insulating sheet, at least one solder layer mounted on the at least one second metal foil, and at least one semiconductor element mounted on the at least one second metal foil through the at least one solder layer. The at least one semiconductor has a thickness of 50 ?m or greater and less than 100 ?m.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: September 27, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Masafumi Horio, Yoshinari Ikeda, Eiji Mochizuki
  • Publication number: 20110180893
    Abstract: An imaging module includes an imaging chip including a micro-lens guiding incident light and an imaging element in a semiconductor substrate and converting the incident light into an electric signal, and a polarizing glass chip including a polarizing filter glass having a polarizer determining a polarization direction of the incident light arranged on a transparent substrate such that the polarizer faces the micro-lens and a spacer member connected to the polarizing filter glass to adjust a gap between the polarizer and the micro-lens of the imaging chip. In the imaging module, a melt-bonding surface of the spacer member is melt-bonded to the semiconductor substrate such that the polarizer of the polarizing glass chip and the micro-lens of the imaging chip are arranged close to each other via the gap, and the imaging element and the micro-lens of the imaging chip are sealed by the polarizing glass chip.
    Type: Application
    Filed: January 17, 2011
    Publication date: July 28, 2011
    Applicant: RICOH COMPANY, LTD.
    Inventors: Daiki MINEGISHI, Yasuhiro SATOH, Eiji MOCHIZUKI, Masayuki FUJISHIMA, Hiroshi MIURA
  • Patent number: 7985630
    Abstract: A method for manufacturing a semiconductor module, includes the steps of preparing a board; mounting a semiconductor device on the second metal foil; placing a resin case onto the board for surrounding a first metal foil, an insulating sheet, the second metal foil, and the semiconductor device; pouring a resin in a paste form into the case to fill a space relative to the first metal foil, insulating sheet, the second metal foil and the semiconductor device; and heat-curing the resin. A bottom end of a peripheral wall of the case is located above a bottom surface of the first metal. The bottom surface of the first metal foil and the resin form a flat bottom surface to contact an external mounting member.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: July 26, 2011
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
  • Patent number: 7944042
    Abstract: A semiconductor device includes an outer resin case having a peripheral wall and terminal mounting holes formed in the peripheral wall, and a layer assembly provided in the outer resin case. The layer assembly includes a semiconductor chip, an insulating circuit board on which the semiconductor chip is mounted, and a heat-dissipating metal base. External terminals having leg portions are arranged in mounting holes of the peripheral wall, and are press-fitted into the terminal-mounting holes. Bonding wires connect the terminal leg portions and a conductive pattern of the insulating circuit board or the semiconductor chip.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: May 17, 2011
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Katsuhiko Yoshihara, Rikihiro Maruyama, Masaaki Chino, Eiji Mochizuki, Motokiyo Yokoyama, Tatsuo Nishizawa, Tomonobu Sugiyama
  • Publication number: 20110085223
    Abstract: A light adjusting apparatus includes a substrate (10, 40) having an aperture, a plurality of incident light adjusting units (20a, 20b, 20c) each moving in a same plane, and a plurality of driving units (50a, 50b, 50c) respectively driving the incident light adjusting units (20a, 20b, 20c), and adjusts an incident light passing through the aperture by mutually moving the incident light adjusting units (20a, 20b, 20c) with the driving units to an aperture position that is center-aligned with the aperture and a retracted position that is retracted from the aperture. An incident light adjusting unit that is moved to the aperture position is positioned by contacting with at least one of other incident light adjusting units that are retracted from the aperture.
    Type: Application
    Filed: December 20, 2010
    Publication date: April 14, 2011
    Applicant: OLYMPUS CORPORATION
    Inventors: Takayuki IDE, Tomoya UEDA, Shunichi SHINOHARA, Eiji MOCHIZUKI
  • Publication number: 20110085220
    Abstract: An optical scanning device includes a substrate, a frame, a torsion beam, and a cantilever. The substrate has a three-layer structure including an oxide film sandwiched between two silicon substrates. The torsion beam swingably supports a mirror portion which deflects a light beam projected from a light source. The cantilever is supported by the frame to connect to the torsion beam and applies torque to the torsion beam. The cantilever and the torsion beam are formed on the same silicon substrate. The cantilever has a thickness substantially thinner than the thickness of the torsion beam. An image forming apparatus includes the optical scanning device. An image projection device includes the optical scanning device.
    Type: Application
    Filed: September 23, 2010
    Publication date: April 14, 2011
    Inventor: Eiji MOCHIZUKI
  • Publication number: 20110059581
    Abstract: A method for manufacturing a semiconductor module, includes the steps of preparing a board; mounting a semiconductor device on the second metal foil; placing a resin case onto the board for surrounding a first metal foil, an insulating sheet, the second metal foil, and the semiconductor device; pouring a resin in a paste form into the case to fill a space relative to the first metal foil, insulating sheet, the second metal foil and the semiconductor device; and heat-curing the resin. A bottom end of a peripheral wall of the case is located above a bottom surface of the first metal. The bottom surface of the first metal foil and the resin form a flat bottom surface to contact an external mounting member.
    Type: Application
    Filed: November 9, 2010
    Publication date: March 10, 2011
    Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
  • Patent number: 7902653
    Abstract: A semiconductor module includes a first metal foil; an insulating sheet mounted on a top surface of the first metal foil; at least one second metal foil mounted on a top surface of the insulating sheet; at least one semiconductor device mounted on the second metal foil; and a resin case for surrounding the first metal foil, insulating sheet, second metal foil, and semiconductor device. A bottom end of a peripheral wall of the resin case is located above a bottom surface of the first metal foil. A resin is provided inside the resin case to fill the inside of the resin case. The bottom surface of the first metal foil and the resin form a flat bottom surface so that the flat bottom surface contacts an external mounting member.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: March 8, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
  • Publication number: 20100232833
    Abstract: An optical scanner, including a frame member; a pair of connection members near a coupling end with the frame member; a pair of elastic members connected with the frame member by the connection members; a mirror substrate supported by the pair of elastic members, the mirror substrate having a bending rigidity outward from the rotational axis for each area in accordance with a bending moment caused by oscillation, the mirror substrate having a slit at both connection ends with the pair of elastic members; and a piezoelectric element provided on each of the connection members, the piezoelectric element generating a torque for driving the mirror substrate oscillatable back and forth around the pair of elastic members as a torsion rotational axis.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 16, 2010
    Inventors: Mitsumi Fujii, Tetsurou Saitoh, Eiji Mochizuki, Kohki Sasaki
  • Patent number: D674760
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: January 22, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Eiji Mochizuki, Toshio Denta, Tadanori Yamada
  • Patent number: D689833
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: September 17, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Motohito Hori, Tatsuo Nishizawa, Yoshinari Ikeda, Eiji Mochizuki