Patents by Inventor Feng Yu

Feng Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240370521
    Abstract: An operator processing method includes obtaining a real-time shape of any to-be-output first tensor by combining in real time one or more micro-operators in a pre-constructed micro-operator library. Then, a micro-operator included in one combination (for example, a combination with optimal performance because different combinations have different performance) is selected for execution. Micro-operators in the micro-operator library are pre-compiled. Therefore, a compiler is not needed. In addition, shapes of the micro-operators are fixed and different, and are used as a “basis” of “shape space”.
    Type: Application
    Filed: July 16, 2024
    Publication date: November 7, 2024
    Inventors: Qing Zhou, Feng Yu, Jian He
  • Publication number: 20240371974
    Abstract: A method of manufacturing a semiconductor device includes: depositing a first dielectric layer and a second dielectric layer over a substrate; forming a dummy gate electrode over the second dielectric layer; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; removing the dummy gate electrode and forming a replacement gate; forming an inter-layer dielectric (ILD) layer over the replacement gate; and performing a first treatment by introducing a trap-repairing element into at least one of the gate spacer, the second dielectric layer, the substrate, the LDD regions and the ILD layer.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 7, 2024
    Inventors: CHUN HSIUNG TSAI, KUO-FENG YU, YU-MING LIN, CLEMENT HSINGJEN WANN
  • Publication number: 20240362470
    Abstract: The application provides a panoramic perception method, system and a non-transitory computer readable medium. The panoramic perception method comprises: performing a first pretraining on a plurality of weights of a training model using the source database; performing a second pretraining with data augmentation on the plurality of weights of the training model using the source database; performing a combined training on the plurality of weights of the training model using both the source database and the target database; performing a quantization-aware training on the plurality of weights of the training model using the source database and the target database; performing a post training quantization on the plurality of weights of the training model using the target database; and performing panoramic perception by the training model.
    Type: Application
    Filed: October 3, 2023
    Publication date: October 31, 2024
    Inventors: Yu-Chen LU, Sheng-Feng YU, Wei-Cheng LIN, Chi-Chih CHANG, Pei-Shuo WANG, Kuan-Cheng LIN, Kai-Chiang WU
  • Patent number: 12132107
    Abstract: A semiconductor structure includes a substrate, a first semiconductor fin, a second semiconductor fin, and a first lightly-doped drain (LDD) region. The first semiconductor fin is disposed on the substrate. The first semiconductor fin has a top surface and sidewalls. The second semiconductor fin is disposed on the substrate. The first semiconductor fin and the second semiconductor fin are separated from each other at a nanoscale distance. The first lightly-doped drain (LDD) region is disposed at least in the top surface and the sidewalls of the first semiconductor fin.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: October 29, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsiung Tsai, Kuo-Feng Yu, Kei-Wei Chen
  • Publication number: 20240355730
    Abstract: Methods to form vertically conducting and laterally conducting low-cost resistor structures utilizing dual-resistivity conductive materials are provided. The dual-resistivity conductive materials are deposited in openings in a dielectric layer using a single deposition process step. A high-resistivity ?-phase of tungsten is stabilized by pre-treating portions of the dielectric material with impurities. The portions of the dielectric material in which impurities are incorporated encompass regions laterally adjacent to where high-resistivity ?-W is desired. During a subsequent tungsten deposition step the impurities may out-diffuse and get incorporated in the tungsten, thereby stabilizing the metal in the high-resistivity ?-W phase. The ?-W converts to a low-resistivity ?-phase of tungsten in the regions not pre-treated with impurities.
    Type: Application
    Filed: July 2, 2024
    Publication date: October 24, 2024
    Inventors: Jia-En Lee, Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang
  • Publication number: 20240355740
    Abstract: A method includes forming a dielectric layer over a conductive feature, and etching the dielectric layer to form an opening. The conductive feature is exposed through the opening. The method further includes forming a tungsten liner in the opening, wherein the tungsten liner contacts sidewalls of the dielectric layer, depositing a tungsten layer to fill the opening, and planarizing the tungsten layer. Portions of the tungsten layer and the tungsten liner in the opening form a contact plug.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 24, 2024
    Inventors: Feng-Yu Chang, Sheng-Hsuan Lin, Shu-Lan Chang, Kai-Yi Chu, Meng-Hsien Lin, Pei-Hsuan Lee, Pei Shan Chang, Chih-Chien Chi, Chun-I Tsai, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai, Syun-Ming Jang, Wei-Jen Lo
  • Patent number: 12124051
    Abstract: From an object plane to an image plane along an optical axis, a camera lens including a first lens, a diffractive optical element and a lens module is provided in various embodiments. The first lens has a positive focal power. The diffractive optical element has a positive focal power and a negative dispersion property. A surface that is of the diffractive optical element or the first lens and that faces the object plane side is a convex surface at the optical axis, a surface that is of the diffractive optical element or the first lens and that faces the image plane side is a concave surface at the optical axis. The lens module includes N lenses. At least one of a surface facing the object plane side and a surface facing the image plane side that are of each of the N lenses is an aspheric surface.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: October 22, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Feng Yu, Takuya Anzawa, Sayuri Noda
  • Patent number: 12119389
    Abstract: A method of manufacturing a semiconductor device includes: providing a substrate comprising a surface; forming fins on the substrate; depositing a dummy gate electrode over the fins; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; performing a first treatment at a first temperature to repair defects in at least one of the dummy gate electrode, the gate spacer and the LDD region; forming source/drain regions in the respective LDD regions; removing the dummy gate electrode to form a replacement gate; depositing an inter-layer dielectric (ILD) layer over the replacement gate and the source/drain regions; and subsequent to the forming of the replacement gate, performing a second treatment at a second temperature, lower than the first temperature, to repair defects of the semiconductor device.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: October 15, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Kuo-Feng Yu, Yu-Ming Lin, Clement Hsingjen Wann
  • Patent number: 12119390
    Abstract: The present disclosure relates to a semiconductor device including a substrate having a top surface and a gate stack. The gate stack includes a gate dielectric layer on the substrate and a gate electrode on the gate dielectric layer. The semiconductor device also includes a multi-spacer structure. The multi-spacer includes a first spacer formed on a sidewall of the gate stack, a second spacer, and a third spacer. The second spacer includes a first portion formed on a sidewall of the first spacer and a second portion formed on the top surface of the substrate. The second portion of the second spacer has a thickness in a first direction that gradually decreases. The third spacer is formed on the second portion of the second spacer and on the top surface of the substrate. The semiconductor device further includes a source/drain region formed in the substrate, and a portion of the third spacer abuts the source/drain region and the second portion of the second spacer.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: October 15, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun Hsiung Tsai, Clement Hsingjen Wann, Kuo-Feng Yu, Ming-Hsi Yeh, Shahaji B. More, Yu-Ming Lin
  • Patent number: 12117409
    Abstract: A durability test method a phase change material includes: placing a material to be tested in a solid-liquid combination test component for detecting the material to be tested, and executing a preset centrifugal rotation detection control scheme; performing cycling control on a temperature regulation semiconductor provided on the solid-liquid combination test component according to a preset temperature single-cycle regulation scheme; obtaining a temperature detection information of the material to be tested; and analyzing and processing the temperature detection information of the material to be tested to generate a durability information of the material to be tested according to a preset durability analysis method of the material to be tested.
    Type: Grant
    Filed: March 15, 2024
    Date of Patent: October 15, 2024
    Assignee: Shenzhen University
    Inventors: Hongzhi Cui, Xiangpeng Cao, Lele Cao, Haibin Yang, Feng Yu
  • Patent number: 12109338
    Abstract: Apparatus, methods and instructions for disinfecting air. The apparatus may include, and the methods may involve, a fixture. The fixture may include a germicidal light source. The fixture may include a fan. The fan may circulate air through a volume into which the germicidal light source propagates germicidal light. The light source may be configured to emit, upward from a horizontal plane, a beam that, absent reflection off an environmental object, does not cross the horizontal plane. The apparatus may include a shield that prevents light from the light source from crossing the horizontal plane. The sensor may face upward from the horizontal plane. The sensor may face downward from the horizontal plane.
    Type: Grant
    Filed: January 31, 2024
    Date of Patent: October 8, 2024
    Assignee: Wangs Alliance Corporation
    Inventors: Shelley S. Wald, Voravit Puvanakijjakorn, Rong Feng Yu, David Xin Wang, Li Changyong, Zhou Tingting
  • Patent number: 12111268
    Abstract: A surface inspection system for foil article is disclosed. The surface inspection system comprises a box having a top long narrow opening and a bottom long narrow opening, a bridge interface, a first light source, a second light source, a first modular camera device having a first camera, and a second modular camera device having a second camera. In which, the first light source, the second light source, the first modular camera device, and the second modular camera device all accommodated in the box, and are coupled to a control box through the bridge interface. Particularly, this surface inspection system is allowed to be integrated in an automatic production line of a foil article like electro-forming aluminum foil (also called electronic aluminum foil), so as to achieve an in-line inspection of the surface morphology of the electro-forming aluminum foil.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: October 8, 2024
    Assignees: Kapito Inc.
    Inventors: Feng-Tso Sun, Yi-Ting Yeh, Feng-Yu Sun, Shiang-En Hong, Po-Han Chou, Hui-Pu Chang, Yun-Yi Chen, Jyun-Tang Huang
  • Publication number: 20240332382
    Abstract: A semiconductor structure includes a substrate, a first transistor disposed over the substrate and including a first channel, a first interfacial layer over the first channel, a first gate dielectric layer over the first interfacial layer, and a first gate electrode layer over the first gate dielectric layer, and a second transistor disposed over the substrate and including a second channel, a second interfacial layer over the second channel, a second gate dielectric layer over the second interfacial layer, and a second gate electrode layer over the second gate dielectric layer. The first gate dielectric layer includes a first dipole material composition having a first maximum concentration at a half-thickness line of the first gate dielectric layer. The second gate dielectric layer includes a second dipole material composition having a second maximum concentration at a half-thickness line of the second gate dielectric layer and greater than the first maximum concentration.
    Type: Application
    Filed: June 10, 2024
    Publication date: October 3, 2024
    Inventors: Yung-Hsiang Chan, Shan-Mei Liao, Wen-Hung Huang, Jian-Hao Chen, Kuo-Feng Yu, Mei-Yun Wang
  • Publication number: 20240309918
    Abstract: A rotating shaft braking structure includes a retaining member, having a shaft hole and an inner toothed portion; a rotating shaft pivoted in the shaft hole, including a shaft and an extension shaft having two drive blocks; two swing plates, engaged with the respective drive blocks, each swing plate having an outer toothed section and linking posts; a brake flywheel, having a receiving groove and four traction grooves, the extension shaft being pivoted to the brake flywheel so that the drive blocks abut against the receiving groove and the linking posts are engaged in the traction grooves; the brake flywheel being deflected at a predetermined angle for the outer toothed section to be engaged with or disengaged from the inner toothed portion; an adjustment wheel; and a torsion spring, disposed between the brake flywheel and the adjustment wheel, the torsion spring producing a torque on the brake flywheel.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 19, 2024
    Inventor: Feng-Yu Kuan
  • Publication number: 20240308778
    Abstract: A track assembly for an automation system can define a horizontal direction, a vertical direction, and a transverse direction. The track assembly can include a track, a cover, and a clip. The track can include a hole and the cover can include a groove that extends in the horizontal direction. The clip can be configured to slide within the groove of the cover and configured to be positioned, at least partially, within the hole of the track.
    Type: Application
    Filed: March 1, 2024
    Publication date: September 19, 2024
    Inventors: Dongdong WANG, Feng YU, Tiecheng QU, Shun LI
  • Patent number: 12094948
    Abstract: A semiconductor device includes a plurality of active region structures that each protrude upwards in a vertical direction. The active region structures each extend in a first horizontal direction. The active region structures are separated from one another in a second horizontal direction different from the first horizontal direction. A gate structure is disposed over the active region structures. The gate structure extends in the second horizontal direction. The gate structure partially wraps around each of the active region structures. A conductive capping layer is disposed over the gate structure. A gate via is disposed over the conductive capping layer. A dimension of the conductive capping layer measured in the second horizontal direction is substantially greater than a maximum dimension of the gate via measured in the second horizontal direction.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Wei Chen, Wei Cheng Hsu, Hui-Chi Chen, Jian-Hao Chen, Kuo-Feng Yu, Shih-Hang Chiu, Wei-Cheng Wang, Kuan-Ting Liu, Yen-Ju Chen, Chun-Chih Cheng, Wei-Chen Hsiao
  • Patent number: 12083402
    Abstract: A flexible trainer stand for indoor cycling includes a bracket, a flat plate, a first guide portion, a second guide portion, and elastic devices. The first guide portion and the second guide portion can slide relative to each other, which is configured for simulating forward and backward movement of a bike generated when a user accelerates and sprints. The first guide portion and the second guide portion can be inclined under an action of the elastic device, which is configured for simulating left and right inclination of the bike generated when the user is cycling and exerting force. A lifting device is arranged on the flat plate, which is configured for simulating position changes of the bike in a vertical direction when a slope changes. Somatosensory feedback of the user during outdoor cycling is truly simulated, and a feedback force can be adjusted.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: September 10, 2024
    Assignee: QINGDAO MAGENE INTELLIGENCE TECHNOLOGY CO., LTD.
    Inventors: Feng Yu, Xigang Zhao
  • Patent number: 12085692
    Abstract: An antireflection film includes a plurality of convex structures formed on a light transmission surface included in an optical waveguide. A maximum radial length of a surface that is of each convex structure and that is close to the light transmission surface is less than a minimum value of a visible light wavelength. The maximum radial length of each convex structure gradually decreases in a direction away from the light transmission surface. A height of each convex structure is greater than or equal to 310 nm. A distance between geometric centers of surfaces that are of two adjacent convex structures and that are close to the light transmission surface is less than or equal to 220 nm.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: September 10, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Haishui Ye, Feng Yu, Jun Yuan
  • Patent number: 12074206
    Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: August 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Wei Chen, Chih-Yu Hsu, Hui-Chi Chen, Shan-Mei Liao, Jian-Hao Chen, Cheng-Hao Hou, Huang-Chin Chen, Cheng Hong Yang, Shih-Hao Lin, Tsung-Da Lin, Da-Yuan Lee, Kuo-Feng Yu, Feng-Cheng Yang, Chi On Chui, Yen-Ming Chen
  • Publication number: 20240284044
    Abstract: A flexible and intuitive system is disclosed, and is disposed to be coupled to at least one camera, at least one robotic arm and a host electronic device of an AVI system. During a normal operation of the system, a configuration parameter setting of the AVI system can be completed after at least one time of robotic arm setting operation and at least one time of camera setting operation are conducted. After that, a plurality of article images acquired from a specific article by the camera are upload to a remote electronic device by the system, such that the remote electronic device utilizes the article images to update (re-train) a defect recognition model. Consequently, after the system integrates the defect recognition model into a defect recognition program that is installed in the host electronic device, the AVI system is hence configured for conducting an appearance inspection of the article.
    Type: Application
    Filed: February 22, 2024
    Publication date: August 22, 2024
    Inventors: FENG-TSO SUN, YI-TING YEH, FENG-YU SUN, JYUN-TANG HUANG, RONG-HUA CHANG, MENG-TSE SHEN