Patents by Inventor Feng Yu

Feng Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230343712
    Abstract: Vias, along with methods for fabricating vias, are disclosed that exhibit reduced capacitance and resistance. An exemplary interconnect structure includes a first source/drain contact and a second source/drain contact disposed in a dielectric layer. The first source/drain contact physically contacts a first source/drain feature and the second source/drain contact physically contacts a second source/drain feature. A first via having a first via layer configuration, a second via having a second via layer configuration, and a third via having a third via layer configuration are disposed in the dielectric layer. The first via and the second via extend into and physically contact the first source/drain contact and the second source/drain contact, respectively. A first thickness of the first via and a second thickness of the second via are the same. The third via physically contacts a gate structure, which is disposed between the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 26, 2023
    Inventors: Shih-Che Lin, Po-Yu Huang, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang, Rueijer Lin, Wei-Jung Lin, Chen-Yuan Kao
  • Patent number: 11800469
    Abstract: This application provides a communication method and a communications device. One example method includes: receiving, by a first communications device, first information from a third communications device; and sending, by the third communications device, the first information to the first communications device.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: October 24, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Feng Yu, Bo Lin, Guangwei Yu, Jiangwei Ying
  • Publication number: 20230332762
    Abstract: Apparatus and methods for lighting. The apparatus may include an LED light source. The light source may be disposed in housing. The apparatus may include a circuit. The circuit may be configured to cause the LED light source to emit light at: a first intensity; and a second intensity that is different from the first intensity. The apparatus may include a mechanical power state selector. A user may use the power state selector to select between LED light sources that are arranged to illuminate in different directions. The apparatus may include a CCT state selector. A user may use the CCT state selector to select a CCT for one or more LED light sources. The CCT may be produced by combining light from one or more LEDs of different CCTs.
    Type: Application
    Filed: June 26, 2023
    Publication date: October 19, 2023
    Inventors: Basar Erdener, Voravit Puvanakijjakorn, Rong Feng Yu
  • Patent number: 11785542
    Abstract: A downlink scheduling data monitoring method, a downlink scheduling data sending method, and an apparatus are provided. The method includes: starting a timer; and after it is determined that the timer expires, monitoring, by using a first discontinuous reception DRX monitoring cycle, downlink scheduling data sent by a base station, where duration of the first DRX monitoring cycle is in a unit of minute or hour. After it is determined that the timer expires, the downlink scheduling data is monitored by using the first DRX monitoring cycle whose duration is in a unit of minute or hour. In this way, not only power consumption is reduced, but also the downlink scheduling data can be monitored.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: October 10, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yinghui Yu, Lei Liu, Feng Yu, Xiaolei Tie
  • Patent number: 11783765
    Abstract: A light emitting diode (LED) driver circuit is configured to drive plural LEDs which are respectively coupled to m scan-lines and n data-lines, wherein m and n are both integers greater than or equal to one. During a driving stage, each of the LEDs is controlled to emit light according to the electrical characteristics on the corresponding scan-line and on the corresponding data-line where the LED is coupled to. The LED driver circuit includes: a power saving control circuit which includes a storage capacitor; a pre-discharging circuit configured to pre-discharge the charges on the m scan-lines to the storage capacitor during a pre-discharging stage; and a pre-charging circuit configured to pre-charge the n data-lines by the charges stored in the storage capacitor during a pre-charging stage.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: October 10, 2023
    Inventors: Chia-Jung Chang, Shao-Ming Chang, Hsiang-Feng Yu, Tso-Yu Wu, Yu-Pin Tseng
  • Patent number: 11774935
    Abstract: In one aspect of the invention, a semiconductor packaging apparatus is provided and comprises: a bonding device for bonding a component to a substrate; a motor for driving the bonding device to operate according to a predetermined motion trajectory; a position sensor for detecting a position of the bonding device at a specific time point and generating a position signal; a motion control unit comprising a path planner for generating a position-time command for the bonding device according to a bonding process requirement, the motion control unit being configured to enable the path planner to update the position-time command based on a touch information between the component and the substrate. In a further aspect of the invention, a control algorithm for the semiconductor packaging apparatus to identify and generate the touch information is also provided, and the process control flow is optimized using the touch information.
    Type: Grant
    Filed: October 8, 2016
    Date of Patent: October 3, 2023
    Assignee: Capcon Limited
    Inventors: Hong Gang Wang, Feng Yu, Yang Li, Min Wang
  • Patent number: 11769817
    Abstract: A semiconductor structure includes a substrate, a semiconductor fin connected to the substrate, an epitaxial layer disposed over the semiconductor fin, and a silicide feature over and in contact with the epitaxial layer. The epitaxial layer including silicon germanium and further includes gallium in an upper portion of the epitaxial layer that is in contact with the silicide feature.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shahaji B. More, Chun Hsiung Tsai, Shih-Chieh Chang, Kuo-Feng Yu, Cheng-Yi Peng
  • Patent number: 11764284
    Abstract: A method of manufacturing a semiconductor device includes: providing a substrate comprising a surface; depositing a first dielectric layer and a second dielectric layer over the substrate; performing a first treatment by introducing a trap-repairing element on the first and second dielectric layers; forming a dummy gate electrode over the second dielectric layer; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; forming source/drain regions in the respective LDD regions; removing the dummy gate electrode to form a replacement gate; and forming an inter-layer dielectric (ILD) layer over the replacement gate and the source/drain regions.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: September 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Kuo-Feng Yu, Yu-Ming Lin, Clement Hsingjen Wann
  • Publication number: 20230290638
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate dielectric layer over a substrate. The method includes forming a work function metal layer over the gate dielectric layer. The method includes forming a glue layer over the work function metal layer. The glue layer is thinner than the gate dielectric layer. The method includes forming a gate electrode over the glue layer. The gate electrode includes fluorine. The method includes annealing the gate electrode. The fluorine diffuses from the gate electrode into the gate dielectric layer.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei CHEN, Chih-Yu HSU, Cheng-Hong YANG, Jian-Hao CHEN, Kuo-Feng YU
  • Patent number: 11757746
    Abstract: This application provides a communication method, wherein a user plane path between a terminal and a user plane gateway includes a first link and a second link, the first link is a link between the terminal and an access network device, and the second link is a link between the access network device and the user plane gateway. The method comprises: obtaining packet loss statuses of a service flow on the first link and the second link; determining a quantity of consecutive lost packets of the service flow on the user plane path based on the packet loss statuses of the service flow on the first link and the second link; and when the quantity of consecutive lost packets of the service flow on the user plane path reaches a first threshold, triggers enabling of a high-reliability transmission mechanism for the service flow.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: September 12, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Fang Yu, Feng Yu, Yan Li
  • Publication number: 20230268408
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a cap layer over the gate stack. The semiconductor device structure includes a protective layer over the cap layer, wherein a lower portion of the protective layer extends into the cap layer. The semiconductor device structure includes a contact structure passing through the protective layer and the cap layer.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 24, 2023
    Inventors: An-Hung TAI, Jian-Hao CHEN, Hui-Chi CHEN, Kuo-Feng YU
  • Patent number: 11735484
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: August 22, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Cheng Hong Yang, Shih-Hao Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 11734409
    Abstract: Examples of determining electronic component authenticity via electronic signal signature measurement are discussed. Reference pin identifiers corresponding to pins of a known authentic electronic component are determined. Measurement values corresponding to characteristics of pins of an electronic component are obtained, and pin identifiers based on the measurement values are generated. Accordingly, an indication that the electronic component is authentic can be provided based at least in part on a comparison of the pin identifiers and the reference pin identifiers.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: August 22, 2023
    Assignee: UNIVERSITY OF SOUTH FLORIDA
    Inventors: Yunghsiao Chung, Feng Yu, Stephen Edward Saddow
  • Publication number: 20230253256
    Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 10, 2023
    Inventors: Wen-Hung Huang, Kuo-Feng Yu, Jian-Hao Chen, Shan-Mei Liao, Jer-Fu Wang, Yung-Hsiang Chan
  • Patent number: 11718771
    Abstract: The present invention provides a polymer composition for fibers or non-woven fabrics, comprising a vinyl aromatic based copolymer and 0 to 30 wt % of an olefin based polymer based on the total weight of the polymer composition. The vinyl aromatic copolymer is represented by a formula A1-B-A2, wherein block A1 and block A2 are the same or different vinyl aromatic blocks, block A1 or block A2 having 3,800 to 4,800 of a peak molecular weight, and block B is a hydrogenated conjugated diene block. A vinyl structure content of a conjugated diene monomer content in the vinyl aromatic based copolymer is from 32 wt % to 50 wt %; and a melt flow index (MFI) of the vinyl aromatic based copolymer is 20 g/10 min˜60 g/10 min (230° C., 2.16 kg). The present invention also provides the fibers or the non-woven fabrics made from the polymer composition.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: August 8, 2023
    Assignee: TSRC Corporation
    Inventors: Tai-Yi Shiu, Feng-Yu Yang, Yu-Chuan Tsai, Der-Kai Sun, Ching Ting
  • Patent number: 11705758
    Abstract: A wireless power transmitting terminal and control method are disclosed. The wireless power transmitting terminal including an inverter circuit, a resonance circuit and a controller, wherein in a frequency detection state, an alternating current of the inverter circuit is controlled to switch between different candidate frequencies, so as to determine a resonance frequency and a maximum peak value of an electrical parameter of the alternating current at the resonance frequency, and determine an operating state of the power transmitting terminal according to the change of the maximum peak value. Therefore, the wireless power transmitting terminal can dynamically adjust in real time a preset operating state thereof, thereby improving the device adaptability, and avoiding the damage of the device to be charged.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: July 18, 2023
    Assignee: Ningbo Weie Electronics Technology Ltd.
    Inventors: Feng Yu, Lizhi Xu, Weiyi Feng, Min Fu
  • Publication number: 20230222380
    Abstract: An online continual learning method and system are provided. The online continual learning method includes: receiving a plurality of training data of a class under recognition; applying a discrete and deterministic augmentation operation on the plurality of training data of the class under recognition to generate a plurality of intermediate classes; generating a plurality of view data from the intermediate classes; extracting a plurality of characteristic vectors from the view data; and training a model based on the feature vectors.
    Type: Application
    Filed: May 20, 2022
    Publication date: July 13, 2023
    Inventors: Sheng-Feng YU, Wei-Chen CHIU
  • Publication number: 20230224838
    Abstract: The present disclosure provides a reliability assurance method and a related apparatus. A receiving end device (watchdog) detects a continuous packet loss state, and sends the continuous packet loss state to an access network device, so that the access network device adjusts differentiated scheduling and a reliability assurance policy based on the continuous packet loss state.
    Type: Application
    Filed: February 27, 2023
    Publication date: July 13, 2023
    Inventors: Zhengyang ZENG, Feng YU, Shikun LI, Yuqiao CHEN
  • Patent number: 11696970
    Abstract: Apparatus, methods and instructions for disinfecting air. The apparatus may include, and the methods may involve, a fixture. The fixture may include a germicidal light source. The fixture may include a fan. The fan may circulate air through a volume into which the germicidal light source propagates germicidal light. The light source may be configured to emit, upward from a horizontal plane, a beam that, absent reflection off an environmental object, does not cross the horizontal plane. The apparatus may include a shield that prevents light from the light source from crossing the horizontal plane. The sensor may face upward from the horizontal plane. The sensor may face downward from the horizontal plane.
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: July 11, 2023
    Assignee: Wangs Alliance Corporation
    Inventors: Shelley S. Wald, Voravit Puvanakijjakorn, Rong Feng Yu, David Xin Wang, Li Changyong, Zhou Tingting
  • Publication number: 20230215766
    Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: Yung-Hsiang Chan, Wen-Hung Huang, Shan-Mei Liao, Jian-Hao Chen, Kuo-Feng Yu, Kuei-Lun Lin