Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.

Abstract: A device includes: a stack of nanostructure channels over a substrate; a gate structure wrapping around the stack; and a source/drain region on the substrate. The source/drain region includes: a first epitaxial layer in direct contact with the channels; and a second epitaxial layer on the first epitaxial layer, the second epitaxial layer having higher germanium concentration than the first epitaxial layer. The device further includes a bottom isolation structure between the source/drain region and the substrate, the bottom isolation structure being a dielectric layer that is in direct contact with the source/drain region.

Abstract: A display panel, a method for fabricating the display panel and a display device are provided to improve reliability of the display panel. The display panel includes an array layer, one or more light-emitting devices arranged on the array layer, a first film layer at least partially arranged on the one or more light-emitting devices, and a first electrode arranged on the first film layer. Openings are formed on the first film layer, and at least part of the openings overlap the respective light-emitting devices. The display device including the display panel and the method for fabricating the display panel are further provided.

Abstract: Apparatus, methods and instructions for disinfecting air. The apparatus may include, and the methods may involve, a fixture. The fixture may include a germicidal light source. The fixture may include a fan. The fan may circulate air through a volume into which the germicidal light source propagates germicidal light. The light source may be configured to emit, upward from a horizontal plane, a beam that, absent reflection off an environmental object, does not cross the horizontal plane. The apparatus may include a shield that prevents light from the light source from crossing the horizontal plane. The sensor may face upward from the horizontal plane. The sensor may face downward from the horizontal plane.

Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.

Abstract: The invention provides a double-shaft hinge implemented with a flexible display. The double-shaft hinge includes a first shaft, a second shaft parallel to the first shaft and a shaft mounting base. The first shaft is provided with a first wheel. A first notch is formed in a periphery of the first wheel. The second shaft is provided with a second wheel. A second notch is formed in a periphery of the second wheel. Two supporting blocks are arranged at one side of the shaft mounting base facing the first wheel and the second wheel. An equal armed lever is mounted on the two supporting blocks. The equal armed lever takes the two supporting blocks as moving fulcrums. The equal armed lever selectively falls into the first notch or the second notch to switch between rotating the first shaft and rotating the second shaft.

Abstract: A voltage regulator includes a first portion with a first converter phase and a second portion with second and third converter phases, and a compensation inductor. The first converter phase receives an input voltage and provides an output voltage through a first inductor. The second converter phase receives the input voltage and provides the output voltage through a first primary winding of a first coupled inductor. The first coupled inductor includes a first secondary winding magnetically coupled to the first primary winding. The third converter phase receives the input voltage and provides the output voltage through a second primary winding of a second coupled inductor. The second coupled inductor includes a second secondary winding magnetically coupled to the second primary winding. The compensation inductor, first secondary winding, and of the second secondary winding are coupled in series between a ground plane.

Abstract: A method includes forming a dielectric layer on a semiconductor workpiece, forming a first patterned layer of a first dipole material on the dielectric layer, and performing a first thermal drive-in operation at a first temperature to form a diffusion feature in a first portion of the dielectric layer beneath the first patterned layer. The method also includes forming a second patterned layer of a second dipole material, where a first section of the second patterned layer is on the diffusion feature and a second section of the second patterned layer is offset from the diffusion feature. The method further includes performing a second thermal drive-in operation at a second temperature, where the second temperature is less than the first temperature. The method additionally includes forming a gate electrode layer on the dielectric layer.

Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.

Abstract: A heat exchanger includes first and second plates joined together with portions of the inner surfaces spaced apart to define a plurality of fluid flow passages for flow of a heat transfer fluid. A dividing rib separates the heat exchanger into an inlet section and an outlet section, each of which includes a plurality of fluid flow passages. Inlet and outlet ports are located near a first end of the heat exchanger, on opposite sides of the dividing rib. The heat transfer surface area of the inlet section is less than that of the outlet section due to the presence of one or more flow obstructions between the inlet port and first ends of the fluid flow passages in the inlet section. Each flow obstruction may be a dead channel including a continuous outer rib completely surrounding a depressed middle region.

Abstract: A direct-lit backlight module includes a substrate, an optical layer that forms an accommodating space with the substrate, first light emitting units in the accommodating space, second light emitting units in the accommodating space and a control unit electrically connected to the first light emitting units and the second light emitting units. The first light emitting units emit light towards the optical layer and have a first viewing angle. The second light emitting units emit light towards the optical layer and have a second viewing angle. The control unit provides a control signal to selectively drive the first light emitting units and the second light emitting units. The first light emitting units are adjacent to the second light emitting units. The first light emitting units and the second light emitting units are arranged alternately. The first viewing angle is larger than the second viewing angle.

Abstract: A cutting element includes a substrate and an ultrahard layer on an upper surface of the substrate, a top surface of the ultrahard layer having a ridge extending along a major dimension of the top surface from an edge of the top surface, where the ridge has a peak with at least two different roof radii of curvature, and at least two sidewalls sloping in opposite directions from the peak of the ridge at a roof angle, where a first roof angle of the ridge proximate the edge is smaller than a second roof angle in a central portion of the ridge around a longitudinal axis of the cutting element.

Abstract: Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output.

Abstract: A direct-lit backlight module includes a substrate, an optical layer that forms an accommodating space with the substrate, first light emitting units in the accommodating space, second light emitting units in the accommodating space and a control unit electrically connected to the first light emitting units and the second light emitting units. The first light emitting units emit light towards the optical layer and have a first viewing angle. The second light emitting units emit light towards the optical layer and have a second viewing angle. The control unit provides a control signal to selectively drive the first light emitting units and the second light emitting units. The first light emitting units are adjacent to the second light emitting units. The first light emitting units and the second light emitting units are arranged alternately. The first viewing angle is larger than the second viewing angle.

Abstract: In a method of manufacturing a semiconductor device, a fin structure is formed by patterning a semiconductor layer, and an annealing operation is performed on the fin structure. In the patterning of the semiconductor layer, a damaged area is formed on a sidewall of the fin structure, and the annealing operation eliminates the damaged area.

Abstract: An electromagnetic wave absorption structure includes at least two electromagnetic wave composite absorbing layers stacked and overlapped with each other. Each of the electromagnetic wave composite absorbing layers comprises a conductive composite layer and an insulating layer, and the insulating layer is stacked and overlapped with the conductive composite layer. The conductive composite layer comprises a plurality of conductive layers and a plurality of interlayer insulating layers, and the conductive layers and the interlayer insulating layers are stacked in a staggered manner. The ratio of a thickness of one of the plurality of insulating layers to a thickness of one of the plurality of interlayer insulating layers is greater than or equal to 20.

Abstract: Examples of determining electronic component authenticity via electronic signal signature measurement are discussed. Reference pin identifiers corresponding to pins of a known authentic electronic component are determined. Measurement values corresponding to characteristics of pins of an electronic component are obtained, and pin identifiers based on the measurement values are generated. Accordingly, an indication that the electronic component is authentic can be provided based at least in part on a comparison of the pin identifiers and the reference pin identifiers.

Abstract: A communication method includes determining that content of a to-be-sent second data packet is the same as content of a first data packet, and sending repetition indication information. The second data packet follows the first data packet. The repetition indication information is useable to indicate that the second data packet repeats a previous data packet.

Abstract: A peripheral component interconnect express (PCIe) device error reporting optimization method includes acquiring advanced error reporting data of a PCIe device, executing a removal detection process of the PCIe device for detecting if the PCIe device is plugged into a connector, transmitting error log data of the PCIe device to a baseboard management controller and an advanced configuration and power interface according to the advanced error reporting data if the PCIe device is plugged into the connector, and filtering the error log data of the PCIe device so that filtered error log data is received by the baseboard management controller and the advanced configuration and power interface if the PCIe device and the connector are electrically disconnected.