Patents by Inventor Feng Zhang

Feng Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250109466
    Abstract: Disclosed in the present invention is a non-oriented electrical steel plate with good magnetic performance. The non-oriented electrical steel plate contains Fe and inevitable impurities, and further contains the following chemical elements, in percentage by mass: 0<C?0.0015%, Si: 0.2-1.8%, Mn: 0.2-0.4%, Al: 0.2-0.6%, V: 0.002-0.005%, and N<0.002%. In addition, further disclosed in the present invention is a manufacturing method for the non-oriented electrical steel plate with good magnetic performance. The manufacturing method comprises the steps of: (1) smelting and casting: (2) hot rolling, wherein a steel coil obtained after the hot rolling is directly introduced to the next step without being subjected to normalizing annealing or cover annealing; (3) acid pickling; (4) cold rolling; and (5) continuous annealing, wherein the steel plate is heated to a target soaking temperature at a heating rate of 50-5000° C./s after the cold rolling.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 3, 2025
    Inventors: Guobao Li, Feng Zhang, Xianshi Fang, Bo Wang, Xuejun Lyu
  • Patent number: 12265236
    Abstract: The present disclosure relates to the field of display technology, and provides an optical module, a manufacturing method thereof, and a display device. The optical module includes: a substrate; a black matrix arranged on the substrate and a plurality of optical lenses spaced apart from each other, wherein an orthogonal projection of a gap between adjacent optical lenses onto the substrate is located within an orthogonal projection of the black matrix onto the substrate, and the black matrix is made of a ferrous metal oxide.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: April 1, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Kang Guo, Feng Zhang, Haitao Huang, Renquan Gu, Mengya Song, Duohui Li, Song Liu, Xin Gu, Guangcai Yuan, Xue Dong
  • Patent number: 12264106
    Abstract: A cerium-zirconium-aluminum-based composite material, a cGPF catalyst and a preparation method thereof are provided. The cerium-zirconium-aluminum-based composite material adopts a stepwise precipitation method, firstly preparing an aluminum-based pre-treated material, then coprecipitating the aluminum-based pre-treated material with zirconium and cerium sol, and finally roasting at high temperature to obtain the cerium-zirconium-aluminum-based composite material. The cerium-zirconium-aluminum-based composite material has better compactness and higher density, and when it is used in cGPF catalyst, it occupies a smaller volume of pores on the catalyst carrier, such that cGPF catalyst has lower back pressure and better ash accumulation resistance, which is beneficial to large-scale application of cGPF catalyst.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: April 1, 2025
    Assignee: SINOTECH COMPANY LIMITED
    Inventors: Dacheng Li, Jinfeng Wang, Li Lan, Hui Ye, Lan Yang, Feng Zhang, Yi Yang, Yongxiang Cheng, Tiantian Luo, Yinhua Dong, Yun Wang, Yun Li, Qizhang Chen
  • Patent number: 12264359
    Abstract: The invention provides for systems, methods, and compositions for targeting nucleic acids. In particular, the invention provides non-naturally occurring or engineered DNA-targeting systems comprising a novel DNA-targeting CRISPR effector protein and at least one targeting nucleic acid component like a guide RNA. Methods for making and using and uses of such systems, methods, and compositions and products from such methods and uses are also disclosed and claimed.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: April 1, 2025
    Assignees: THE BROAD INSTITUTE, INC., MASSACHUSETTS INSTITUTE OF TECHNOLOGY, PRESIDENT AND FELLOWS OF HARVARD COLLEGE
    Inventors: Feng Zhang, Bernd Zetsche, Jonathan S. Gootenberg, Omar O. Abudayyeh, Ian Slaymaker
  • Patent number: 12264367
    Abstract: Described herein are methods and uses thereof for in vivo evaluating functions of multiple genes in parallel by combining in utero genetic perturbation of progenitor cells and single-cell transcriptomic profiling of progeny cells in animals. These methods can be used, among other things, to reveal in vivo gene functions in a cell type-specific manner.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: April 1, 2025
    Assignees: The Broad Institute, Inc., Massachusetts Institute of Technology, President and Fellows of Harvard College
    Inventors: Xin Jin, Paola Arlotta, Aviv Regev, Feng Zhang, Sean Simmons
  • Publication number: 20250107156
    Abstract: Techniques are provided herein to form an integrated circuit having dielectric material formed in cavities beneath source or drain regions. The cavities may be formed within subfin portions of semiconductor devices. In one such example, a FET (field effect transistor) includes a gate structure extending around a fin or any number of nanowires of semiconductor material. The semiconductor material may extend in a first direction between source and drain regions while the gate structure extends over the semiconductor material in a second direction substantially orthogonal to the first direction. A dielectric fill may be formed in a recess beneath the source or drain regions, or a dielectric liner may be formed on sidewalls of the recess, to prevent epitaxial growth of the source or drain regions from the subfins. Removal of the semiconductor subfin from the backside may then be performed without causing damage to the source or drain regions.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 27, 2025
    Applicant: Intel Corporation
    Inventors: Chiao-Ti Huang, Robin Chao, Jaladhi Mehta, Tao Chu, Guowei Xu, Ting-Hsiang Hung, Feng Zhang, Yang Zhang, Chia-Ching Lin, Chung-Hsun Lin, Anand Murthy
  • Publication number: 20250101468
    Abstract: The invention provides for delivery, engineering and optimization of systems, methods, and compositions for manipulation of sequences and/or activities of target sequences. Provided are delivery systems and tissues of organ which are targeted as sites for delivery. Also provided are vectors and vector systems some of which encode one or more components of a CRISPR complex, as well as methods for the design and use of such vectors. Also provide dare methods of directing CRISPR complex formation in eukaryotic cells to ensure enhanced specificity for target recognition and avoidance of toxicity and to edit or modify a target site in a genomic locus of interest to alter or improve the status of a disease or a condition.
    Type: Application
    Filed: June 11, 2024
    Publication date: March 27, 2025
    Applicants: The Broad Institute, Inc., Massachusetts Institute of Technology, President and Fellows of Harvard College
    Inventors: Feng ZHANG, Le CONG, Fei RAN
  • Publication number: 20250103237
    Abstract: Systems and methods described herein relate to the efficient handling of data purge requests in the context of a distributed storage system. A plurality of data purge requests is stored in a first data structure. The data purge requests may be grouped into batches that are processed at least partially in parallel. A first data purge request from the plurality of data purge requests is successfully processed, and is moved from the first data structure to a second data structure. Processing of a second data purge request from the plurality of data purge requests is unsuccessful. The second data purge request is retained in the first data structure. Purge status data is generated based on the first data purge request being in the second data structure and the second data purge request being in the first data structure. The purge status data may be presented at a user device.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 27, 2025
    Inventors: Lei Wang, Fen Li, Haipeng Wu, Yunfeng Jiang, Lai Wei, Feng Zhang
  • Publication number: 20250106563
    Abstract: The present disclosure discloses a speaker comprising a frame, a vibration system, a magnetic circuit system, and a flexible circuit board embedded in the bottom end of the frame; the vibration system and the magnetic circuit system are respectively fixed at both ends of the frame and collectively enclosed into a sound producing cavity; the magnetic circuit system comprising a lower clamping plate and a main magnet; the lower clamping plate comprising a lower clamping body, two rectangular through-holes and two first flanges; each first flange having a shape and size matching the corresponding rectangular through-hole; each of two first flaps spaced from the main magnet and forming the magnetic gap collectively; the speaker further comprising two breathable isolators fixed to the lower clamping body and covering each of the rectangular through-holes. FPC alignment installation is convenient, cost savings; the acoustic performance of the speaker is good.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 27, 2025
    Inventors: Ke Li, Feng Zhang, Zhaoyu Yin, Daxiang Ding
  • Publication number: 20250101400
    Abstract: The present disclosure provides for systems, methods, and compositions for targeting nucleic acids. In particular, the invention provides mutated Cas13 proteins and their use in modifying target sequences as well as mutated Cas13 nucleic acid sequences and vectors encoding mutated Cas13 proteins and vector systems or CRISPR-Cas13 systems.
    Type: Application
    Filed: December 2, 2024
    Publication date: March 27, 2025
    Inventors: Feng Zhang, Ian Slaymaker, Soumya Kannan, Jonathan Gootenberg, Omar Abudayyeh
  • Publication number: 20250107175
    Abstract: Integrated circuit structures having reduced local layout effects, and methods of fabricating integrated circuit structures having reduced local layout effects, are described. For example, an integrated circuit structure includes an NMOS region including a first plurality of fin structures or vertical stacks of horizontal nanowires, and first alternating gate lines and trench contact structures over the first plurality of fin structures or vertical stacks of horizontal nanowires. The integrated circuit structure also includes a PMOS region including a second plurality of fin structures or vertical stacks of horizontal nanowires, and second alternating gate and trench contact structures over the second plurality of fin structures or vertical stacks of horizontal nanowires. A gate line is shared between the NMOS region and the PMOS region, and a trench contact structure is shared between the NMOS region and the PMOS region.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Inventors: Tao CHU, Minwoo JANG, Yanbin LUO, Paul PACKAN, Guowei XU, Chiao-Ti HUANG, Robin CHAO, Feng ZHANG, Ting-Hsiang HUNG, Chia-Ching LIN, Yang ZHANG, Chung-Hsun LIN, Anand S. MURTHY
  • Publication number: 20250107212
    Abstract: Techniques are provided to form an integrated circuit having an airgap spacer between at least a transistor gate structure and an adjacent source or drain contact. In one such example, a FET (field effect transistor) includes a gate structure that extends around a fin or any number of nanowires (or nanoribbons or nanosheets, as the case may be) of semiconductor material. The semiconductor material may extend in a first direction between source and drain regions while the gate structure extends over the semiconductor material in a second direction. Airgaps are provided in the regions between the gate structures and the adjacent source/drain contacts. The airgaps have a low dielectric constant (e.g., around 1.0) to reduce the parasitic capacitance between the conductive structures.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 27, 2025
    Applicant: Intel Corporation
    Inventors: Yang Zhang, Guowei Xu, Tao Chu, Robin Chao, Chiao-Ti Huang, Feng Zhang, Ting-Hsiang Hung, Chia-Ching Lin, Anand Murthy
  • Patent number: 12258595
    Abstract: The invention provides for systems, methods, and compositions for altering expression of target gene sequences and related gene products. Provided are structural information on the Cas protein of the CRISPR-Cas system, use of this information in generating modified components of the CRISPR complex, vectors and vector systems which encode one or more components or modified components of a CRISPR complex, as well as methods for the design and use of such vectors and components. Also provided are methods of directing CRISPR complex formation in eukaryotic cells and methods for utilizing the CRISPR-Cas system. In particular the present invention comprehends optimized functional CRISPR-Cas enzyme systems.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: March 25, 2025
    Assignees: THE BROAD INSTITUTE, INC., MASSACHUSETTS INSTIT JTE OF TECHNOLOGY, UNIVERSITY OF TOKYO, PRESIDENT AND FELLOWS OF HARVARD COLLEGE
    Inventors: Silvana Konermann, Alexandro Trevino, Mark Brigham, Fei Ran, Patrick Hsu, Chie-Yu Lin, Osamu Nureki, Hiroshi Nishimasu, Ryuichiro Ishitani, Feng Zhang
  • Patent number: 12258594
    Abstract: The present disclosure generally relates to systems, methods and compositions related to Clustered Regularly Interspaced Short Palindromic Repeats (CRISPR) and components thereof. The present disclosure also relates to methods, systems, and compostions modified to reduce immunogenicity. Additionally, the present disclosure relates to methods for developing or designing CRISPR-Cas system based therapy or therapeutics.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: March 25, 2025
    Assignees: THE BROAD INSTITUTE, INC., MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventor: Feng Zhang
  • Patent number: 12260107
    Abstract: Systems and methods described herein relate to the efficient handling of data purge requests in the context of a distributed storage system. A plurality of data purge requests is stored in a first data structure. The data purge requests may be grouped into batches that are processed at least partially in parallel. A first data purge request from the plurality of data purge requests is successfully processed, and is moved from the first data structure to a second data structure. Processing of a second data purge request from the plurality of data purge requests is unsuccessful. The second data purge request is retained in the first data structure. Purge status data is generated based on the first data purge request being in the second data structure and the second data purge request being in the first data structure. The purge status data may be presented at a user device.
    Type: Grant
    Filed: September 22, 2023
    Date of Patent: March 25, 2025
    Assignee: SAP SE
    Inventors: Lei Wang, Fen Li, Haipeng Wu, Yunfeng Jiang, Lai Wei, Feng Zhang
  • Publication number: 20250093105
    Abstract: Some embodiments of the present disclosure provide electric heating devices and methods for kilns of substrate glass, relating to the field of arrangements of electric heating structures for the kilns of substrate glass. To address the problem of insufficient melting in front zones of kilns of high-generation and large-tonnage substrate glass, a heating structure combining side-stack tin oxide electrode bricks and bottom-inserted molybdenum electrodes is designed. A comprehensive thermal efficiency of the kiln is determined by introducing an appropriate amount of gas and determining an energy consumption of glass melting and a thermal energy contribution of gas and electricity under an extraction volume. This leads to a novel electric heating device for the kiln of high-generation and large-feeding substrate glass and a method thereof, effectively solving the problem of insufficient melting and unstable convection in the front zone of the kiln.
    Type: Application
    Filed: December 5, 2024
    Publication date: March 20, 2025
    Applicant: CAIHONG DISPLAY DEVICES CO., LTD.
    Inventors: Longjiang ZHAO, Wei YANG, Jian XU, Dacheng WANG, Feng ZHANG
  • Publication number: 20250093325
    Abstract: Devices and methods for measuring erosion resistance of electrofused high zirconia bricks are provided. The devices include a crucible, a crucible cover, a positioning axis, a plurality of holes, and a plurality of fixing members. The crucible cover is installed on an opening of the crucible, the positioning axis is installed at a center of the crucible cover, the plurality of holes are uniformly disposed along a circumferential direction of the crucible cover, and the plurality of fixing members are installed on the plurality of holes.
    Type: Application
    Filed: December 3, 2024
    Publication date: March 20, 2025
    Applicant: CAIHONG DISPLAY DEVICES CO., LTD.
    Inventors: Longjiang ZHAO, Wei YANG, Jian XU, Dacheng WANG, Feng ZHANG
  • Publication number: 20250098260
    Abstract: Integrated circuit structures having patch spacers, and methods of fabricating integrated circuit structures having patch spacers, are described. For example, an integrated circuit structure includes a stack of horizontal nanowires. A gate structure is vertically around the stack of horizontal nanowires, the stack of horizontal nanowires extending laterally beyond the gate structure. An internal gate spacer is between vertically adjacent ones of the stack of horizontal nanowires and laterally adjacent to the gate structure. An external gate spacer is along sides of the gate structure and over the stack of horizontal nanowires, the external gate spacer having one or more patch spacers therein.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 20, 2025
    Inventors: Guowei XU, Feng ZHANG, Chiao-Ti HUANG, Robin CHAO, Tao CHU, Chung-Hsun LIN, Oleg GOLONZKA, Yang ZHANG, Ting-Hsiang HUNG, Chia-Ching LIN, Anand S. MURTHY
  • Publication number: 20250096114
    Abstract: Techniques to form semiconductor devices can include one or more via structures having substrate taps. A semiconductor device includes a gate structure around or otherwise on a semiconductor region (or channel region). The gate structure may extend over the semiconductor regions of any number of devices along a given direction. The gate structure may be interrupted, for example, between two transistors with a via structure that extends through an entire thickness of the gate structure and includes a conductive core. The via structure has a conductive foot portion beneath the gate structure and a conductive arm portion extending from the conductive foot portion along a height of the gate structure. The conductive foot portion has a greater width along the given direction than any part of the conductive arm portion. The via structure may further include one or more dielectric layers between the conductive arm portion and the gate structure.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 20, 2025
    Applicant: Intel Corporation
    Inventors: Robin Chao, Chiao-Ti Huang, Guowei Xu, Ting-Hsiang Hung, Tao Chu, Feng Zhang, Chia-Ching Lin, Yang Zhang, Anand Murthy, Conor P. Puls
  • Patent number: 12251450
    Abstract: The invention provides for delivery, engineering and optimization of systems, methods, and compositions for manipulation of sequences and/or activities of target sequences. Provided are delivery systems and tissues or organ which are targeted as sites for delivery. Also provided are vectors and vector systems some of which encode one or more components of a CRISPR complex, as well as methods for the design and use of such vectors. Also provided are methods of directing CRISPR complex formation in eukaryotic cells to ensure enhanced specificity for target recognition and avoidance of toxicity and to edit or modify a target site in a genomic locus of interest to alter or improve the status of a disease or a condition.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: March 18, 2025
    Assignees: THE BROAD INSTITUTE, INC., MASSACHUSETTS INSTITUTE OF TECHNOLOGY, THE ROCKEFELLER UNIVERSITY
    Inventors: Sangeeta Bhatia, Charles Rice, Feng Zhang, David Benjamin Turitz Cox, Vyas Ramanan, Robert Schwartz, Amir Shlomai