Patents by Inventor Fu Chu

Fu Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150065032
    Abstract: A media signal broadcasting method, a media signal broadcasting system, a host device and a peripheral device are provided. The media signal broadcasting method is provided. The media signal broadcasting method includes the following steps. A host device and a peripheral device are provided. A first radio signal is received by the peripheral device. The first radio signal is converted to be a second radio signal by the peripheral device. The second radio signal is transmitted to the host device by the peripheral device. The second radio signal is received and is converted to be a media signal by the host device. A third radio signal is received and converted to be the media signal by the host device. The media signal converted from the third radio signal or the second radio signal is played by the host device.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 5, 2015
    Applicant: HTC CORPORATION
    Inventors: Chih-Hao LIN, Fu-An CHU, Chien-Yen LI
  • Patent number: 8933467
    Abstract: A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: January 13, 2015
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung Tri Doan, Tien Wei Tan, Wen-Huang Liu, Chen-Fu Chu, Yung Wei Chen
  • Patent number: 8921204
    Abstract: A method for fabricating semiconductor dice includes the steps of providing a wafer assembly having a substrate and semiconductor structures on the substrate; and defining the semiconductor dice on the substrate. The method also includes the step of separating the substrate from the semiconductor structures by applying a first laser pulse to each semiconductor die on the substrate having first parameters selected to break an interface between the substrate and the semiconductor structures and then applying a second laser pulse to each semiconductor die on the substrate having second parameters selected to complete separation of the substrate from the semiconductor structures. The method can also include the steps of forming one or more intermediate structures between the semiconductor dice on the substrate configured to protect the semiconductor dice during the separating step.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: December 30, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Trung Tri Doan, Feng-Hsu Fan
  • Publication number: 20140366775
    Abstract: A composition includes polymer and dispersed infrared-reflective clusters of titanium dioxide primary particles. The titanium dioxide primary particles are cemented together with precipitated silica and/or alumina to form clusters. The titanium dioxide primary particles have an average particle diameter in the range of from about 0.15 to about 0.35 micron, while the clusters of titanium dioxide primary particles have an average cluster diameter in the range of from about 0.38 to about 5 microns and a geometric standard deviation (GSD) in the range of from about 1.55 to about 2.5.
    Type: Application
    Filed: July 29, 2014
    Publication date: December 18, 2014
    Applicant: Cristal USA Inc.
    Inventors: Fu-Chu Wen, Deborah E. Busch, Richard L. Fricker, Robert Provins, Brian David Kiessling, David Edwin Bell
  • Publication number: 20140339496
    Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Inventors: Chen-FU Chu, Hao-Chun Cheng, Feng-Hsu Fan, Wen-Huang Liu, Chao-Chen Cheng, David Trung Doan, Yang Po Wen
  • Patent number: 8871547
    Abstract: A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: October 28, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Wen-Huang Liu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Trung Tri Doan
  • Patent number: 8873280
    Abstract: A spin transfer torque random access memory includes a substance unit, a source line unit, an insulation unit, a transistor unit, a MTJ unit, and a bit line unit. The substance unit includes a substance layer. The source line unit includes a plurality of source lines formed inside the substance layer. The transistor unit includes a plurality of transistors respectively disposed on the source lines. Each transistor includes a source region formed on each corresponding source line, a drain region formed above the source region, a channel region formed between the source region and the drain region, and a surrounding gate region surrounding the source region, the drain region, and the channel region. The MTJ unit includes a plurality of MTJ structures respectively disposed on the transistors. The bit line unit includes at least one bit line disposed on the MTJ unit.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: October 28, 2014
    Assignee: Inotera Memories, Inc.
    Inventors: Tzung Han Lee, Chung-Lin Huang, Ron Fu Chu
  • Publication number: 20140308807
    Abstract: A method for fabricating a semiconductor memory includes the following steps. Active areas are defined in a substrate. An oxide layer is then formed on the active areas. The oxide layer is subjected to a surface treatment. A first polysilicon layer, a buffer layer and a hard mask are deposited. Recessed access devices are formed in an array region of the substrate. After the recessed access devices are formed, the hard mask and the buffer layer are removed to thereby form transistors in a peripheral region. A second polysilicon layer is deposited on the first polysilicon layer. The first and second polysilicon layers are then etched into a gate structure.
    Type: Application
    Filed: April 10, 2014
    Publication date: October 16, 2014
    Applicant: INOTERA MEMORIES, INC.
    Inventors: Yaw-Wen Hu, Ron Fu Chu, Tzung-Han Lee
  • Patent number: 8828519
    Abstract: A composition includes polymer and dispersed infrared-reflective clusters of titanium dioxide primary particles. The titanium dioxide primary particles are cemented together with precipitated silica and/or alumina to form clusters. The titanium dioxide primary particles have an average particle diameter in the range of from about 0.15 to about 0.35 micron, while the clusters of titanium dioxide primary particles have an average cluster diameter in the range of from about 0.38 to about 5 microns and a geometric standard deviation (GSD) in the range of from about 1.55 to about 2.5.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: September 9, 2014
    Assignee: Cristal USA Inc.
    Inventors: Fu-Chu Wen, Deborah E. Busch, Richard L. Fricker, Robert Provins, Brian David Kiessling, David Edwin Bell
  • Patent number: 8802465
    Abstract: Systems and methods for fabricating a light emitting diode include forming a multilayer epitaxial structure above a carrier substrate; depositing at least one metal layer above the multilayer epitaxial structure; removing the carrier substrate.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: August 12, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung Tri Doan, Chen-Fu Chu
  • Patent number: 8802469
    Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: August 12, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Trung Tri Doan, Hao-Chun Cheng, Feng-Hsu Fan, Fu-Hsien Wang
  • Patent number: 8779494
    Abstract: The instant disclosure relates to a high-k metal gate random access memory. The memory includes a substrate, a plurality of bit line units, source regions, gate structures, drain regions, word line units, and capacitance units. The substrate has a plurality of trenches, and the bit line units are arranged on the substrate. The source regions are disposed on the bit line units, and the gate structures are disposed on the source regions. Each gate structure has a metal gate and a channel area formed therein. The gate structures are topped with the drain regions. The word lines units are arranged between the source and drain regions. The capacitance units are disposed on the drain regions. Another memory is also disclosed, where each drain region and a portion of each gate structure are disposed in the respective capacitance unit, with the drain region being a lower electrode layer.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: July 15, 2014
    Assignee: Inotera Memories, Inc.
    Inventors: Tzung-Han Lee, Chung-Lin Huang, Ron-Fu Chu
  • Patent number: 8778780
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: July 15, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung-Tri Doan, Chen-Fu Chu, Hao-Chun Cheng, Feng-Hsu Fan
  • Publication number: 20140154821
    Abstract: A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.
    Type: Application
    Filed: February 10, 2014
    Publication date: June 5, 2014
    Applicant: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: CHEN-FU CHU, WEN-HUANG LIU, JIUNN-YI CHU, CHAO-CHEN CHENG, HAO-CHUN CHENG, FENG-HSU FAN, Trung Tri Doan
  • Publication number: 20140151630
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non-(or low) thermally conductive and/or non-(or low) electrically conductive carrier substrate that has been removed.
    Type: Application
    Filed: December 4, 2012
    Publication date: June 5, 2014
    Inventors: Feng-Hsu Fan, Trung Tri Doan, Chuong Anh Tran, Chen-Fu Chu, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Jui-Kang Yen
  • Publication number: 20140151635
    Abstract: A method for fabricating a light emitting diode die includes the steps of providing a carrier substrate and forming an epitaxial structure on the carrier substrate including a first type semiconductor layer, a multiple quantum well (MQW) layer on the first type semiconductor layer configured to emit light, and a second type semiconductor layer on the multiple quantum well (MQW) layer. The method also includes the steps of forming a plurality of trenches through the epitaxial structure, forming a reflector layer on the second type semiconductor layer, forming a seed layer on the reflector layer and in the trenches, and forming a substrate on the seed layer having an area configured to protect the epitaxial structure.
    Type: Application
    Filed: February 7, 2014
    Publication date: June 5, 2014
    Applicant: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: JIUNN-YI CHU, Chen-Fu Chu, Chao-Chen Cheng
  • Patent number: 8723160
    Abstract: A light emitting diode (LED) die includes a first-type semiconductor layer, a multiple quantum well (MQW) layer and a second-type semiconductor layer. The light emitting diode (LED) die also includes a peripheral electrode on the first-type semiconductor layer located proximate to an outer periphery of the first-type semiconductor layer configured to spread current across the first-type semiconductor layer. A method for fabricating the light emitting diode (LED) die includes the step of forming an electrode on the outer periphery of the first-type semiconductor layer at least partially enclosing and spaced from the multiple quantum well (MQW) layer configured to spread current across the first-type semiconductor layer.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: May 13, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Feng-Hsu Fan, Hao-Chun Cheng, Trung Tri Doan
  • Patent number: 8716041
    Abstract: A method for fabricating a light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: May 6, 2014
    Assignee: SemiLEDS Optoelectrics Co., Ltd.
    Inventors: Trung Tri Doan, Chen-Fu Chu, Wen-Huang Liu, Feng-Hsu Fan, Hao-Chun Cheng, Fu-Hsien Wang
  • Patent number: 8703562
    Abstract: A manufacturing method of a random access memory includes the following steps: providing a semiconductor structure having an array region and a peripheral region; forming a plurality of first trenches in the array region, and concurrently, a plurality of second trenches on the peripheral region; forming a polysilicon layer to cover the array region and the peripheral region, and the first and the second trenches are filled up with the polysilicon layer; planarizing the polysilicon layer so the remaining polysilicon layer only resides in the first and the second trenches; forming a conductive layer on the semiconductor structure; patterning the conductive layer to form a plurality of landing pads on the array region, and a plurality of bit line units on the peripheral region; and forming a plurality of capacitor units which is in electrical connection to the landing pads.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: April 22, 2014
    Assignee: Inotera Memories, Inc.
    Inventors: Tzung-Han Lee, Chung-Lin Huang, Ron-Fu Chu
  • Patent number: D715234
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: October 14, 2014
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Hsun-Cheng Chan, Hao-Chun Cheng, Chen-Fu Chu