Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.

Abstract: A method of forming an integrated circuit is disclosed. The method includes providing a substrate and forming on the substrate a shield structure comprising a shield member and a ground strap. The shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion.

Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

Abstract: A high-brightness vertical light emitting diode (LED) device having an outwardly located metal electrode. The LED device is formed by: forming the metal electrode on an edge of a surface of a LED epitaxy structure using a deposition method, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), evaporation, electro-plating, or any combination thereof; and then performing a packaging process. The composition of the LED may be a nitride, a phosphide or an arsenide. The LED of the invention has the following advantages: improving current spreading performance, reducing light-absorption of the metal electrode, increasing brightness, increasing efficiency, and thereby improving energy efficiency. The metal electrode is located on the edge of the device and on the light emitting side. The metal electrode has two side walls, among which one side wall can receive more emission light from the device in comparison with the other one.

Abstract: The invention relates to a vertical light emitting diode (VLED) having an outwardly disposed electrode, the vertical light emitting diode comprises a conductive base, a semiconductor epitaxial structure formed on the conductive base, a passivation layer formed at the periphery of the semiconductor epitaxial structure, and a conductive frame formed on the passivation layer and contacting with the edge of the upper surface of the semiconductor epitaxial structure such that the conductive frame is electrically connected to the semiconductor epitaxial structure.

Abstract: Systems and methods are disclosed for fabricating a semiconductor light-emitting diode (LED) device by forming an n-doped gallium nitride (n-GaN) layer on the LED device and roughening the surface of the n-GaN layer to extract light from an interior of the LED device.

Abstract: Systems and methods are disclosed for fabricating a semiconductor light-emitting diode (LED) device by forming an n-doped gallium nitride (n-GaN) layer on the LED device and roughening the surface of the n-GaN layer to extract light from an interior of the LED device.

Abstract: A method for fabricating a through interconnect on a semiconductor substrate includes the steps of forming a via on a first side of the substrate part way through the substrate, forming an electrically insulating layer on the first side and in the via, forming an electrically conductive layer at least partially lining the via, forming a first contact on the conductive layer in the via, and thinning the substrate from a second side at least to the insulating layer in the via. The method can also include the step of forming a second contact on a second side of the substrate in electrical contact with the first contact. The method can be performed on a semiconductor wafer to form a wafer scale interconnect component. In addition, the interconnect component can be used to construct semiconductor systems such as a light emitting diode (LED) systems.

Abstract: Techniques for dicing wafer assemblies containing multiple metal device dies, such as vertical light-emitting diode (VLED), power device, laser diode, and vertical cavity surface emitting laser device dies, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, such techniques are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

Abstract: A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC) on the substrate, and at least one light emitting diode (LED) on the substrate in electrical communication with the application specific integrated circuit (ASIC). The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated system having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.

Abstract: A flexible printed circuit and fabrication method thereof is provided. At least one signal wire is disposed on a plastic substrate. Two ground lines are disposed at both sides of the signal wire in parallel. A shielding layer is provided, contacting the plastic substrate to form a chamber, wherein the signal wire and ground lines are wrapped therein. A flexible dielectric layer is implemented between the signal wire and the shielding layer to provide electricity isolation.

Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, a seed metal layer may be used to grow hard metal layers above it for handling. Metal may be plated above these metal layers everywhere except where a block of stop electroplating (EP) material exists. The stop EP material may be obliterated, and a barrier layer may be formed above the entire remaining structure. The substrate may be removed, and the individual dies may have any desired bonding pads and/or patterned circuitry added to the semiconductor surface. The remerged hard metal after laser cutting and heating should be strong enough for handling. Tape may be added to the wafer, and a breaker may be used to break the dies apart. The resulting structure may be flipped over, and the tape may be expanded to separate the individual dies.

Abstract: The invention discloses an anti-bacterial composition and method for producing the same. The anti-bacterial composition of the invention includes an organic siloxane material which comprises an amino group, and a plurality of silver atoms. Particularly, the organic siloxane material has a meshed structure, and the plurality of silver atoms are bonded to the amino group and are well dispersed in the meshed structure.

Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.

Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.

Abstract: A method of cleaning a reaction chamber having a wafer holder is provided. First, the reaction chamber is cleaned by a cleaning gas. Next, a protection film is formed on the inner surface of the reaction chamber, wherein a gap is formed between the protection wafer and the wafer holder, and a cooling gas is guided therebetween simultaneously.

Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

Abstract: A method of forming an integrated circuit is disclosed. The method includes providing a substrate and forming on the substrate a shield structure comprising a shield member and a ground strap. The shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion.

Abstract: In various embodiments, methods and compositions are provided comprising titanium dioxide and silica spacers having improved light stability for use in paper, plastic and paints.