Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.

Abstract: The instant disclosure relates to a method of forming an isolation area. The method includes the steps of: providing a substrate having a first type of ion dopants, where the substrate has a plurality of trenches formed on the cell areas and the isolation area between the cell areas of the substrate, with the side walls of the trenches having an oxidation layer formed thereon and the trenches are filled with a metallic structure; removing the metallic structure from the trenches of the isolation area; implanting a second type of ions into the substrate under the trenches of the isolation area; and filling all the trenches with an insulating structure, where the trenches of the isolation area are filled up fully by the insulating structure to form a non-metallic isolation area.

Abstract: Techniques for fabricating contacts on inverted configuration surfaces of GaN layers of semiconductor devices are provided. An n-doped GaN layer may be formed with a surface exposed by removing a substrate on which the n-doped GaN layer was formed. The crystal structure of such a surface may have a significantly different configuration than the surface of an as-deposited p-doped GaN layer.

Abstract: A light emitting diode (LED) die includes a first substrate having a first surface and an opposing second surface; a second substrate on the second surface of the first substrate; a p-type semiconductor layer on the first surface of the first substrate; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer.

Abstract: Systems and methods for fabricating a light emitting diode include forming a multilayer epitaxial structure above a carrier substrate; depositing at least one metal layer above the multilayer epitaxial structure; removing the carrier substrate.

Abstract: A method for fabricating light emitting diode (LED) dice includes the step of forming a light emitting diode (LED) die having a multiple quantum well (MQW) layer configured to emit electromagnetic radiation, and a confinement layer on the multiple quantum well (MQW) layer having a wire bond pad. The method also includes the steps of forming a dam on the wire bond pad configured to protect a wire bond area on the wire bond pad, forming an adhesive layer on the confinement layer and the wire bond pad with the dam protecting the wire bond area, and forming a wavelength conversion layer on the adhesive layer. A light emitting diode (LED) die includes the dam on the wire bond pad, the adhesive layer on the confinement layer and the wavelength conversion layer on the adhesive layer configured to convert the electromagnetic radiation to a second spectral region.

Abstract: A method for fabricating a vertical light emitting diode (VLED) die includes the steps of: providing a substrate; forming an epitaxial structure on the substrate; forming an electrically insulative insulation layer covering the lateral surfaces of the epitaxial structure; forming an electrically non-conductive material on the electrically insulative insulation layer; and forming a mirror on the p-doped layer, with the electrically insulative insulation layer configured to protect the epitaxial structure during formation of the mirror.

Abstract: The invention relates to a wafer-type light emitting device having a substrate, one or more light emitting semiconductors formed on the substrate, one or more frames provided over the one or more light emitting semiconductors, and one or more wavelength-converting layers applied on the one or more light emitting semiconductors and confined by the one or more frames, wherein the wafer-type light emitting device is diced into a plurality of separate light emitting units.

Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

Abstract: A method for fabricating a light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.

Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.

Abstract: The present invention provides a semiconductor structure having a lateral TSV and a manufacturing method thereof. The semiconductor structure includes a chip having an active side, a back side disposed opposite to the active side, and a lateral side disposed between the active side and the back side. The chip further includes a contact pad, a lateral TSV and a patterned conductive layer. The contact pad is disposed on the active side. The lateral TSV is disposed on the lateral side. The patterned conductive layer is disposed on the active side and is electrically connected to the lateral TSV and the contact pad.

Abstract: A method for fabricating semiconductor dice includes the steps of providing a wafer assembly having a substrate and semiconductor structures on the substrate; and defining the semiconductor dice on the substrate. The method also includes the step of separating the substrate from the semiconductor structures by applying a first laser pulse to each semiconductor die on the substrate having first parameters selected to break an interface between the substrate and the semiconductor structures and then applying a second laser pulse to each semiconductor die on the substrate having second parameters selected to complete separation of the substrate from the semiconductor structures. The method can also include the steps of forming one or more intermediate structures between the semiconductor dice on the substrate configured to protect the semiconductor dice during the separating step.

Abstract: A high-brightness vertical light emitting diode (LED) device includes an outwardly located metal electrode having a low illumination side and a high illumination side. The LED device is formed by: forming the metal electrode on an edge of a surface of a LED epitaxy structure using a deposition method, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), evaporation, electro-plating, or any combination thereof; and then performing a packaging process. The composition of the LED may be a nitride, a phosphide or an arsenide. The LED has the following advantages: improving current spreading performance, reducing light-absorption of the metal electrode, increasing brightness, increasing efficiency, and thereby improving energy efficiency. The metal electrode is located on the edge of the device and on the light emitting side. The metal electrode has two side walls, among which one side wall can receive more emission light from the device in comparison with the other one.

Abstract: A light emitting diode includes a thermal conductive substrate having at least one electrical isolation layer configured to provide vertical electrical isolation and a heat transfer path through the substrate from a front side (first side) to a back side (second side) thereof. The light emitting diode includes an anode having a through interconnect, and a cathode having a through interconnect, which are arranged side by side on the substrate. The light emitting diode also includes a LED chip mounted to the substrate between the anode and the cathode.

Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.

Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.