Abstract: An optical fiber module rack system includes a rack including multiple accommodation chambers, opposing first and second sliding grooves located in each accommodation chamber, and a stop block located at each of opposing front and rear ends of each first sliding groove, and optical fiber storage boxes each including a box body mounted in one respective accommodation chamber, a first optical fiber module and second optical fiber module mounted in opposing front and rear sides of box body and connected together, two guide rails located at two opposite lateral sidewalls of box body and respectively coupled to first sliding groove and second sliding groove of respective accommodation chamber, two elastic retainer strips respectively extended from opposite ends of one guide rail and provided with a respective hook block for engagement with one respective stop block, and elongated press member extended from other guide rail for pressing by external force to disengage hook blocks from respective stop blocks for allo

Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate having a metal-oxide semiconductor (MOS) transistor thereon, and an oxide semiconductor transistor adjacent to the MOS transistor. Preferably, the MOS transistor includes a first gate structure and a source/drain region adjacent to two sides of the gate structure, and the oxide semiconductor transistor includes a channel layer and the top surface of the channel layer is lower than the top surface of the first gate structure of the MOS transistor.

Abstract: A semiconductor process includes the following step. A metal gate strip and a cap layer are sequentially formed in a trench of a dielectric layer. The cap layer and the metal gate strip are cut off to form a plurality of caps on a plurality of metal gates, and a gap isolates adjacent caps and adjacent metal gates. An isolation material fills in the gap. The present invention also provides semiconductor structures formed by said semiconductor process. For example, the semiconductor structure includes a plurality of stacked structures in a trench of a dielectric layer, where each of the stacked structures includes a metal gate and a cap on the metal gate, where an isolation slot isolates and contacts adjacent stacked structures at end to end, and the isolation slot has same level as the stacked structures.

Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a metal-oxide-semiconductor (MOS) transistor, a plug, a hydrogen blocking layer and an oxide semiconductor (OS) structure. The MOS transistor is disposed on the substrate, and the plug is disposed on the MOS transistor to electrically connect thereto. The hydrogen blocking layer is disposed only on sidewalls of the plug, wherein the hydrogen blocking layer includes a high-k dielectric layer. The OS structure is disposed on the substrate, wherein the OS structure includes an oxide semiconductor layer.

Abstract: The present invention provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a first transistor and a second transistor. The first transistor and the second transistor are disposed on the substrate. The first transistor includes a first channel and a first work function layer. The second transistor includes a second channel and a second work function layer, where the first channel and the second channel include different dopants, and the second work function layer and the first work function layer have a same conductive type and different thicknesses.

Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate having a metal-oxide semiconductor (MOS) transistor thereon, and an oxide semiconductor transistor adjacent to the MOS transistor. Preferably, the MOS transistor includes a first gate structure and a source/drain region adjacent to two sides of the gate structure, and the oxide semiconductor transistor includes a channel layer and the top surface of the channel layer is lower than the top surface of the first gate structure of the MOS transistor.

Abstract: A module structure of touch display panel is provided. The module structure comprises a backlight module, a liquid crystal panel, a touch layer, a first circuit board, a second circuit board, and a protection layer. The liquid crystal panel is disposed above the backlight module; the touch layer is disposed on the liquid crystal panel. The first circuit board is disposed on the liquid crystal panel, and is further disposed with a first side of the liquid crystal panel and a first side of the touch layer. The second circuit board is disposed on the liquid crystal panel, and is further disposed with a second side of the liquid crystal panel and a second side of the touch layer. Additionally, the protection layer is disposed above the touch layer, the first circuit board, and the second circuit board.

Abstract: A back side illumination image sensor pixel structure includes a substrate having a front side and a back side opposite to the front side, a sensing device formed in the substrate to receive an incident light through the back side of the substrate, two oxide-semiconductor field effect transistor (OS FET) devices formed on the front side of the substrate, and a capacitor formed on the front side of the substrate. The two OS FET devices are directly stacked on the sensing device and the capacitor is directly stacked on the OS FET devices. The two OS FET devices overlap the sensing device, and the capacitor overlaps both of the OS FET devices and the sensing device.

Abstract: A touch panel includes a cover glass, a flexible substrate, and a touch-sensing electrode structure. The flexible substrate is connected to the cover glass via a bonding layer, and the touch-sensing electrode structure is formed on the flexible substrate. The cover glass, the bonding layer, the flexible substrate and the touch-sensing electrode structure are arranged in order, with the flexible substrate being located between the touch-sensing electrode structure and the bonding layer.

Abstract: A touch control device includes a touch area, a border area, a inductive coil, a proximity sensing unit, a near field communication unit, and a switch module. The touch area is for sensing touch input. The border area is located at periphery of the touch area. The inductive coil is located on the border area. The proximity sensing unit is for transmitting a driving signal to the inductive coil when being coupled to a first end of the inductive coil, and determining whether the inductive coil is close to an object according to a sensing signal generated by the inductive coil. The near field communication unit is for performing near field communication when being coupled to the first end and a second end of the inductive coil. The switch module is for controlling coupling statuses of the proximity sensing unit and the near field communication unit to the inductive coil.

Abstract: A manufacturing method of an oxide semiconductor device includes the following steps. A barrier layer is formed on a substrate. An annealing process is performed after the step of forming the barrier layer. A first oxygen treatment is performed on the barrier layer after the annealing process for forming a first oxygen provider layer on the barrier layer. An oxide semiconductor layer is then formed on the first oxygen provider layer.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming an interfacial layer on the substrate; forming a high-k dielectric layer on the interfacial layer; forming a first bottom barrier metal (BBM) layer on the high-k dielectric layer; performing a thermal treatment; removing the first BBM layer; and forming a second BBM layer on the high-k dielectric layer.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate, a gate structure on the substrate, and a spacer adjacent to the gate structure, in which the bottom of the spacer includes a tapered profile and the tapered profile comprises a convex curve.

Abstract: The present invention provides a method of forming an integrated circuit including a substrate, a first transistor, a second transistor and a third transistor. The first transistor has a first metal gate including a first bottom barrier layer, a first work function metal layer and a first metal layer. The second transistor has a second metal gate including a second bottom barrier layer, a second work function metal layer and a second metal layer. The third transistor has a third metal gate including a third bottom barrier layer, a third work function metal layer and a third metal layer. The first transistor, the second transistor and the third transistor has the same conductive type. A nitrogen concentration of the first bottom barrier layer>a nitrogen concentration of the second bottom barrier layer>a nitrogen concentration of the third bottom barrier layer.

Abstract: In a backlight module, a diffusive structure and a prism structure are replaced by a diffusive prism film formed on a substrate and transferred via In-Mold Decoration by Roller (IMR) to a light guide body via injection molding. A reflection film is also transferred to an opposite side of the light guide body via the same way. In such way, optical films may be readily transferred to the light guide body via two-side IMR during the process of injection molding of the light guide body, saving room taken by substrates of the optical components.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having an interlayer dielectric (ILD) layer thereon; forming a first recess, a second recess, and a third recess in the ILD layer; forming a material layer on the ILD layer and in the first recess, the second recess, and the third recess; performing a first treatment on the material layer in the first recess; and performing a second treatment on the material layer in the first recess and second recess.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a metal-oxide semiconductor (MOS) transistor thereon and a first interlayer dielectric (ILD) layer surrounding the MOS transistor; forming a source layer, a drain layer, a first opening between the source layer and the drain layer, and a second ILD layer on the MOS transistor and the first ILD layer, wherein the top surfaces of the source layer, the drain layer, and the second ILD layer are coplanar; forming a channel layer on the second ILD layer, the source layer, and the drain layer and into the first opening; and performing a first planarizing process to remove part of the channel layer so that the top surface of the channel layer is even with the top surfaces of the source layer and the drain layer.

Abstract: The present invention provides an integrated circuit including a substrate, a first transistor, a second transistor and a third transistor. The first transistor has a first metal gate including a first bottom barrier layer, a first work function metal layer and a first metal layer. The second transistor has a second metal gate including a second bottom barrier layer, a second work function metal layer and a second metal layer. The third transistor has a third metal gate including a third bottom barrier layer, a third work function metal layer and a third metal layer. The first transistor, the second transistor and the third transistor has the same conductive type. A nitrogen concentration of the first bottom barrier layer>a nitrogen concentration of the second bottom barrier layer>a nitrogen concentration of the third bottom barrier layer.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having an interlayer dielectric (ILD) layer thereon; forming a first recess, a second recess, and a third recess in the ILD layer; forming a material layer on the ILD layer and in the first recess, the second recess, and the third recess; performing a first treatment on the material layer in the first recess; and performing a second treatment on the material layer in the first recess and second recess.

Abstract: A touch system, a stylus, a touch apparatus, and a control method of the touch apparatus are provided. The control method includes following steps. At least one characteristic data of at least one input tool is obtained. An identifier of the input tool is generated according to the characteristic data. If a touch operation on the touch panel is performed with the input tool, a specific function of the touch apparatus is determined according to the identifier of the input tool.