Abstract: A shooting equipment shooting direction control system includes a base unit including a circuit module, a transmission mechanism and a driver controllable by a first micro switch and a second micro switch of the circuit module to rotate the transmission mechanism horizontally left and right, a rotary holder shell coupled and rotatable by the transmission mechanism to move a baffle between the first micro switch and the second micro switch, and a shooting equipment including an equipment base, a power drive unit controllable by the circuit module through a third micro switch and a fourth micro switch in the rotary holder shell to rotate the equipment base vertically up and down relative to the rotary holder shell and a dogleg-shaped trigger movable with the equipment base relative to the rotary holder shell between the third micro switch and the fourth micro switch.

Abstract: A broadcasting device with communication mechanism applied to a handheld device includes a body, a control module, a sound broadcasting module, and a communication module; an upper portion of the body has an interchangeable connecting member electrically connecting with the handheld device; the control module is in the body and electrically connects with the connecting member; the sound broadcasting module is at the lateral portion of the body and electrically connects with the control module, and broadcasts the sound from the handheld device; the communication module is at the lateral portion of the body and electrically connects with the control module, and broadcasts sound through the sound broadcasting module.

Abstract: A semiconductor structure includes a work function metal layer, a (work function) metal oxide layer and a main electrode. The work function metal layer is located on a substrate. The (work function) metal oxide layer is located on the work function metal layer. The main electrode is located on the (work function) metal oxide layer. Moreover a semiconductor process forming said semiconductor structure is also provided.

Abstract: A method for fabricating FinFETs is described. A semiconductor substrate is patterned to form odd fins. Spacers are formed on the substrate and on the sidewalls of the odd fins, wherein each spacer has a substantially vertical sidewall. Even fins are then formed on the substrate between the spacers. A semiconductor structure for forming FinFETs is also described, which is fabricated using the above method.

Abstract: A through-silicon via forming method includes the following steps. Firstly, a semiconductor substrate is provided. Then, a through-silicon via conductor is formed in the semiconductor substrate, and a topside of the through-silicon via conductor is allowed to be at the same level as a surface of the semiconductor substrate. Afterwards, a portion of the through-silicon via conductor is removed, and the topside of the through-silicon via conductor is allowed to be at a level lower than the surface of the semiconductor substrate, so that a recess is formed over the through-silicon via conductor.

Abstract: An ALD method includes providing a substrate in an ALD reactor, performing a pre-ALD treatment to the substrate in the ALD reactor, and performing one or more ALD cycles to form a dielectric layer on the substrate in the ALD reactor. The pre-ALD treatment includes providing a hydroxylating agent to the substrate in a first duration, and providing a precursor to the substrate in a second duration. Each of the ALD cycles includes providing the hydroxylating agent to the substrate in a third duration, and providing the precursor to the substrate in a fourth duration. The first duration is longer than the third duration.

Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.

Abstract: A method and circuit with minimized clock skews in an IC.

Abstract: Mechanisms to calibrate a digital to analog converter (DAC) of an SDM (sigma delta modulator) are disclosed. An extra DAC element in addition to the DAC is used to function in place of a DAC element under calibration. A signal (e.g., a random sequence of ?1 and +1) is injected to the DAC element under calibration, and the estimated error and compensation are acquired.

Abstract: A circuit protection apparatus is disclosed. A peripheral interface includes a first power node and a second power node. The circuit protection apparatus includes an auxiliary power supply circuit, a power converter, a first switch, a second switch, a power switch circuit, a warning circuit, and a controller. When a load is plugged to the peripheral interface, the first switch turns on, and the controller is enabled and outputs a control signal, so as to drive the power converter to output power. When the current between input terminal and output terminal of the power switch circuit is larger than a predetermined current, the controller receives the error flag logical voltage outputted by the power switch circuit, cuts off the current between input terminal and output terminal of the power switch circuit, and stops the operations of the power converter.

Abstract: A positioning insert for two adjacent vertebral bodies includes a plate like insert adapted to fix relative positions of the two adjacent vertebral bodies and provided with a sharp edge oppositely formed relative to the dull side and first holes defined through a side face of the plate like insert, wherein the sharp edge is formed to have an angle between 5 to 15 degrees; and an annular insert adapted to be inserted into a space between the two adjacent vertebral bodies and having second holes and a slot defined in a peripheral side face thereof to accommodate the plate like insert so as to have the plate like insert received in the slot.

Abstract: A method for forming an isolation structure includes the following steps. A hard mask layer is formed on a substrate and a trench is formed in the substrate and the hard mask layer. A protective layer is formed to cover the trench and the hard mask layer. A first isolation material is filled into the trench. An etching process is performed to etch back part of the first isolation material.

Abstract: The present invention provides a method of forming a chip with TSV electrode. A substrate with a first surface and a second surface is provided. A thinning process is performed from a side of the second surface so the second surface becomes a third surface. Next, a penetration via which penetrates through the first surface and the third surface is formed in the substrate. A patterned material layer is formed on the substrate, wherein the patterned material layer has an opening exposes the penetration via. A conductive layer is formed on the third surface thereby simultaneously forming a TSV electrode in the penetration via and a surface conductive layer in the opening.

Abstract: Embodiments include but are not limited to apparatuses and systems including a die or a preform including at least one groove configured to extend from at least one via of the die to an edge of the die. Other embodiments may be described and claimed.

Abstract: A non-planar semiconductor structure includes a substrate, at least two fin-shaped structures, at least an isolation structure, and a plurality of epitaxial layers. The fin-shaped structures are located on the substrate. The isolation structure is located between the fin-shaped structures, and the isolation structure has a nitrogen-containing layer. The epitaxial layers respectively cover a part of the fin-shaped structures and are located on the nitrogen-containing layer. A non-planar semiconductor process is also provided for forming the semiconductor structure.

Abstract: An electrolytic copper foil is provided. The electrolytic copper foil has a shiny side and a matte side opposing to the shiny side, wherein the difference in roughness between the shiny side and the matte side is 0.5 ?m or less. The electrolytic copper foil has a tensile strength of 45 kg/mm2 or above, and is particularly suitable for applications in a lithium ion secondary battery.

Abstract: A driving circuit of a light emitting diode (LED) and a ghost phenomenon elimination circuit thereof are disclosed. The ghost phenomenon elimination circuit which includes a ghost phenomenon elimination unit and a counter unit may determine a black insertion period according to a gray scale clock signal, and output an enable signal to the ghost phenomenon elimination unit during the black insertion period. The ghost phenomenon elimination unit may pull up the voltage levels at current driving terminals of the driving circuit so as to prevent the ghost phenomenon from occurring.

Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

Abstract: A thermal exchange food processing device is comprised of a thermal conductive body, thermal insulation layer and phase change material. The thermal conductive body consists of an acting region and an inner thermal conductive region disposed in accordance to and in thermal connection to the acting region. The thermal insulation layer has a lower thermal conductivity coefficient compared with the thermal conductive body and encapsulates at least in part the thermal conductive body, so that the acting region of the thermal conductive body is exposed while remaining regions of the thermal conductive body other than the acting region are thermally insulated from ambient temperature; wherein the thermal conductive body alone or together with the thermal insulation layer defines an accommodation space and the inner thermal conductive region is disposed to face the accommodation space; and the phase change material disposed within the accommodation space.