Patents by Inventor Fu Tsai

Fu Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250138345
    Abstract: An electro-optical device includes a waveguide and a first electrode and a second electrode. The first electrode and the second electrode at first and second sides of the waveguide, wherein the first electrode and the second electrode directly contact and extend beyond the first and second sides of the waveguide respectively.
    Type: Application
    Filed: October 25, 2023
    Publication date: May 1, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuen-Shin Liang, Tsung-Fu Tsai, Szu-Wei Lu, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20250122985
    Abstract: A light string includes a housing, a light cap, and a light assembly. The light cap has a cap body, an upper tip at an upper end of the cap body, and a peripheral visibility ring extending outwardly from the cap body opposite the upper tip. The light cap is coupled to and extends from the housing such that the peripheral visibility ring seats adjacent to an end of the housing proximate the light aperture. The light assembly includes a light emitting source that is positioned such that when energized, light is emitted that is visible from outside the light cap. Moreover, the peripheral visibility ring reflects light in a direction different from the light emitted by the light emitting source such that the light emitted by the light emitting source is visible when an observer is looking at a side view of the cap body.
    Type: Application
    Filed: August 21, 2024
    Publication date: April 17, 2025
    Inventor: Chang Fu Tsai
  • Patent number: 12272568
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: April 8, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
  • Publication number: 20250096035
    Abstract: A composite wafer may be provided by: forming a layer stack including a carrier layer, an ion implantation layer, and a transfer material layer by implanting ions into a donor wafer; forming intersecting trenches through the transfer material layer, the ion implantation layer, and an upper portion of the carrier layer; attaching the layer stack to an acceptor wafer including a stack of a handle substrate and a first dielectric oxide layer by bonding the layer stack to the first dielectric oxide layer; and cleaving the layer stack at the ion implantation layer, whereby a composite wafer including the acceptor wafer and patterned portions of the transfer material layer is formed.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 20, 2025
    Inventors: Chen-Chiang Yu, Tsung-Fu Tsai, Szu-Wei Lu, Jih-Churng Twu, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20250076599
    Abstract: A device structure includes: an interposer including metal wiring structures and optical waveguides that are embedded in interlayer dielectric layers, wherein the interposer includes a stepped outer sidewall including an outermost vertical surface segment, a laterally-recessed sidewall segment that is laterally recessed relative to the outermost vertical surface segment, and a connecting horizontal surface segment that connects the outermost vertical surface segment and the laterally-recessed vertical sidewall segment; and a fiber access unit having a first end that is optically coupled to a subset of the optical waveguides through at least one optical glue portion that is interposed between the fiber access unit and the laterally-recessed sidewall segment of the stepped outer sidewall.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 6, 2025
    Inventors: Tsung-Fu Tsai, Chao-Jen Wang, Szu-Wei Lu, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20250076594
    Abstract: Optical devices and methods of manufacture are presented in which a multi-tier connector is utilized to transmit and receive optical signals to and from an optical device. In embodiments a multi-tier connection unit receives optical signals from outside of an optical device, wherein the optical signals are originally in multiple levels. The multi-tier connection unit then routes the optical signals into a single level of optical components.
    Type: Application
    Filed: December 18, 2023
    Publication date: March 6, 2025
    Inventors: Chen-Hua Yu, Tung-Liang Shao, Yi-Jan Lin, Yu-Sheng Huang, Tsung-Fu Tsai, Chao-Jen Wang, Szu-Wei Lu
  • Publication number: 20250060724
    Abstract: An inductor driving device includes multiple switching elements and a control circuit, wherein an inductor is driven according to switching of the multiple switching elements. The control circuit is arranged to generate a control signal for controlling the multiple switching elements. In a first mode, the control signal has a constant frequency. In a second mode, the control circuit adjusts a frequency of the control signal and continuously changes a current direction of the inductor, to generate one of multiple audio signals through the inductor.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 20, 2025
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Ming-Fu Tsai, Sheng-Hung Hsu
  • Publication number: 20250044517
    Abstract: A package includes an optical engine attached to a package substrate, wherein the optical engine includes a first waveguide; and a waveguide structure attached to the package substrate adjacent the optical engine, wherein the waveguide structure includes a second waveguide within a transparent block, wherein a first end of the second waveguide is optically coupled to the first waveguide, wherein the waveguide structure is configured to be connected to an optical fiber component such that a second end of the second waveguide is optically coupled to an optical fiber of the optical fiber component.
    Type: Application
    Filed: August 3, 2023
    Publication date: February 6, 2025
    Inventors: Chao-Jen Wang, Szu-Wei Lu, Tsung-Fu Tsai, Chen-Hua Yu
  • Patent number: 12182601
    Abstract: Systems and methods for fast merging of panelist activity are disclosed. The system can maintain a plurality of panelist identifiers each stored with a respective plurality of offline content events, and identify, from the plurality of panelist identifiers, a subset of panelist identifiers that are stored with a respective offline content event that matches a target offline content event. The system can map each of the subset to a respective plurality of unique identifiers corresponding to virtual devices having virtual device attributes. The system can reduce, for each of the subset, the respective plurality of unique identifiers to a sketch that represents the respective plurality of unique identifiers. The system can combine the sketch of each of the subset of panelist identifiers into an aggregated sketch, and transmit the aggregated sketch to a computing device for analysis with an aggregated sketch representing online content events.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: December 31, 2024
    Assignee: GOOGLE LLC
    Inventors: Evgeny Skvortsov, Shen-fu Tsai
  • Publication number: 20240393549
    Abstract: Optical devices and methods of manufacture are presented in which an optical device and other devices such as laser dies are attached prior to bonding of the optical device and laser die to other device. The optical device and laser die are separated by no more than about 10 ?m.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 28, 2024
    Inventors: Tung-Liang Shao, Yu-Sheng Huang, Tsung-Fu Tsai, Chen-Hua Yu
  • Publication number: 20240385378
    Abstract: A package includes a laser diode includes a bonding layer; a first dielectric layer over the laser diode, wherein the first dielectric layer is directly bonded to the bonding layer of the laser diode; a first silicon nitride waveguide in the first dielectric layer, wherein the first silicon nitride waveguide extends over the laser diode; a second dielectric layer over the first silicon nitride waveguide; a silicon waveguide in the second dielectric layer; an interconnect structure over the silicon waveguide; and conductive features extending through the first dielectric layer and the second dielectric layer to electrically contact the interconnect structure.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 21, 2024
    Inventors: Tsung-Fu Tsai, Hsing-Kuo Hsia, Szu-Wei Lu, Chen-Hua Yu
  • Publication number: 20240387432
    Abstract: A package structure includes a semiconductor die, a first insulating encapsulant, a plurality of first conductive features, an interconnect structure and bump structures. The semiconductor die includes a plurality of conductive pillars made of a first material. The first insulating encapsulant is encapsulating the semiconductor die. The first conductive features are disposed on the semiconductor die and electrically connected to the conductive pillars. The first conductive features include at least a second material different from the first material. The interconnect structure is disposed on the first conductive features, wherein the interconnect structure includes a plurality of connection structures made of the second material. The bump structures are electrically connecting the first conductive features to the connection structures, wherein the bump structures include a third material different from the first material and the second material.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Ying-Ching Shih, Szu-Wei Lu
  • Publication number: 20240387206
    Abstract: A pickup apparatus for separating a semiconductor die adhered on an adhesive film therefrom includes a frame, an UV light emitting element, and a collector element. The frame is configurated to hold the adhesive film adhered with the semiconductor die thereon. The UV light emitting element is disposed inside the frame, where the adhesive film is disposed between the semiconductor die and the UV light emitting element. The collector element is disposed over the frame.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jung Chen, Tsung-Fu Tsai, Szu-Wei Lu
  • Publication number: 20240385388
    Abstract: Devices and methods of manufacture and use of a fiber bundle is presented. In embodiments the fiber bundle comprises a substrate material and optical fiber openings that extend from a first side of the substrate material to a second side of the substrate material, wherein the optical fiber openings at the first side of the substrate material are shifted either horizontally or vertically from the second side of the substrate material.
    Type: Application
    Filed: May 18, 2023
    Publication date: November 21, 2024
    Inventors: Chen-Hua Yu, Szu-Wei Lu, Tsung-Fu Tsai, Chao-Jen Wang
  • Publication number: 20240387197
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
  • Publication number: 20240387507
    Abstract: A method of making a semiconductor device includes manufacturing lines extending in a first direction over doped zones in a substrate, wherein each of the lines has a line width measured along a first direction. The method further includes trimming the lines into line segments having ends over an isolation structure. The method further includes etching a transistor gate electrode over the substrate, wherein transistor gate electrode has a gate electrode width measured along the first direction, and the line width is substantially similar to the gate electrode width.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Li-Wei CHU, Wun-Jie LIN, Yu-Ti SU, Ming-Fu TSAI, Jam-Wem LEE
  • Patent number: 12142579
    Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. At least one of the reinforcement pattern layers is embedded in the insulating encapsulation. The reinforcement structure is electrically floating.
    Type: Grant
    Filed: July 18, 2023
    Date of Patent: November 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
  • Patent number: D1059987
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: February 4, 2025
    Assignee: KE M.O.HOUSE CO., LTD
    Inventor: Mou-Fu Tsai
  • Patent number: D1071116
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: April 15, 2025
    Assignee: AIRMATE ELECTRICAL (JIUJIANG) CO., LTD
    Inventors: Cheng-Fu Tsai, Jiaxin Zheng
  • Patent number: D1071117
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: April 15, 2025
    Assignee: AIRMATE ELECTRICAL (JIUJIANG) CO., LTD
    Inventors: Cheng-Fu Tsai, Jiaxin Zheng