Patents by Inventor Gamal Refai-Ahmed
Gamal Refai-Ahmed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10529645Abstract: Methods and apparatus are described for heat management in an integrated circuit (IC) package using a lid with recessed areas in the inner surfaces of the lid. The recessed areas (e.g., trenches) provide receptacles for accepting a portion of a thermal interface material (TIM) that may be forced out when the lid is positioned on the TIM above one or more integrated circuit (IC) dies during fabrication of the IC package. In this manner, the TIM bond line thickness (BLT) between the lid and the IC die(s) may be reduced for decreased thermal resistance, but sufficient interfacial adhesion is provided for the IC package with such a lid to avoid TIM delamination.Type: GrantFiled: June 8, 2017Date of Patent: January 7, 2020Assignee: XILINX, INC.Inventors: Jaspreet Singh Gandhi, Henley Liu, Tien-Yu Lee, Gamal Refai-Ahmed, Myongseob Kim, Ferdinand F. Fernandez, Ivor G. Barber, Suresh Ramalingam
-
Publication number: 20200006186Abstract: A method and apparatus are provided that includes an integrated circuit die having an in-chip heat sink, along with an electronic device and a chip package having the same, and methods for fabricating the same. In one example, an integrated circuit die has an in-chip heat sink that separates a high heat generating integrated circuit from another integrated circuit disposed within the die. The in-chip heat sink provides a highly conductive heat transfer path from interior portions of the die to at least one exposed die surface.Type: ApplicationFiled: June 29, 2018Publication date: January 2, 2020Applicant: Xilinx, Inc.Inventors: Hong-Tsz Pan, Jonathan Chang, Nui Chong, Henley Liu, Gamal Refai-Ahmed, Suresh Ramalingam
-
Publication number: 20190318975Abstract: Examples of the present disclosure provide example Chip Scale Packages (CSPs). In some examples, a structure includes a first integrated circuit die, a shim die that does not include active circuitry thereon, an encapsulant at least laterally encapsulating the first integrated circuit die and the shim die, and a redistribution structure on the first integrated circuit die, the shim die, and the encapsulant. The redistribution structure includes one or more metal layers electrically connected to the first integrated circuit die.Type: ApplicationFiled: April 12, 2018Publication date: October 17, 2019Applicant: Xilinx, Inc.Inventors: Hong Shi, Suresh Ramalingam, Siow Chek Tan, Gamal Refai-Ahmed
-
Patent number: 10262920Abstract: Chip packages and electronic devices are provided that include a thermal capacitance element that improves the operation of IC dies at elevated temperatures. In one example, a chip package is provided that includes an integrated circuit (IC) die, a lid thermally connected to the IC die, and a thermal capacitance element thermally connected to the lid. The thermal capacitance element includes a container and a capacitance material sealingly disposed in the container. The capacitance material has a phase transition temperature that is between 80 and 100 percent of a maximum designed operating temperature in degrees Celsius of the IC die.Type: GrantFiled: December 5, 2016Date of Patent: April 16, 2019Assignee: XILINX, INC.Inventors: Gamal Refai-Ahmed, Suresh Ramalingam, Brian D. Philofsky, Anthony Torza
-
Publication number: 20180358280Abstract: Methods and apparatus are described for heat management in an integrated circuit (IC) package using a lid with recessed areas in the inner surfaces of the lid. The recessed areas (e.g., trenches) provide receptacles for accepting a portion of a thermal interface material (TIM) that may be forced out when the lid is positioned on the TIM above one or more integrated circuit (IC) dies during fabrication of the IC package. In this manner, the TIM bond line thickness (BLT) between the lid and the IC die(s) may be reduced for decreased thermal resistance, but sufficient interfacial adhesion is provided for the IC package with such a lid to avoid TIM delamination.Type: ApplicationFiled: June 8, 2017Publication date: December 13, 2018Applicant: Xilinx, Inc.Inventors: Jaspreet Singh Gandhi, Henley Liu, Tien-Yu Lee, Gamal Refai-Ahmed, Myongseob Kim, Ferdinand F. Fernandez, Ivor G. Barber, Suresh Ramalingam
-
Patent number: 10147664Abstract: Chip packages and electronic devices are provided that include a heat sink flexibly interfaced with a die for enhanced temperature control. In one example, a solid state electronic assembly is provided that includes a first integrated circuit (IC) die mounted to a substrate and a heat sink mounted over the first IC die. The heat sink includes a thermally conductive plate and a first thermal carrier. The first thermal carrier has a first end mechanically fixed to the conductive plate. The first thermal carrier has a second end cantilevered from the conductive plate. The second end is in conductive contact with a top surface of the first IC die.Type: GrantFiled: April 24, 2017Date of Patent: December 4, 2018Assignee: XILINX, INC.Inventors: Gamal Refai-Ahmed, Suresh Ramalingam, Daniel Elftmann, Brian D. Philofsky, Anthony Torza
-
Publication number: 20180308783Abstract: Chip packages and electronic devices are provided that include a heat sink flexibly interfaced with a die for enhanced temperature control. In one example, a solid state electronic assembly is provided that includes a first integrated circuit (IC) die mounted to a substrate and a heat sink mounted over the first IC die. The heat sink includes a thermally conductive plate and a first thermal carrier. The first thermal carrier has a first end mechanically fixed to the conductive plate. The first thermal carrier has a second end cantilevered from the conductive plate. The second end is in conductive contact with a top surface of the first IC die.Type: ApplicationFiled: April 24, 2017Publication date: October 25, 2018Applicant: Xilinx, Inc.Inventors: Gamal Refai-Ahmed, Suresh Ramalingam, Daniel Elftmann, Brian D. Philofsky, Anthony Torza
-
Patent number: 10096502Abstract: An example clamping assembly tray for packaging a semiconductor device includes a frame having a bottom surface and side walls extending from the bottom surface that define a cavity; and a compressible member disposed on the bottom surface of the frame within the cavity, where a top portion of the compressible member provides a support surface for supporting the semiconductor device, the support surface being between the bottom surface and a top edge of the side walls.Type: GrantFiled: November 23, 2016Date of Patent: October 9, 2018Assignee: XILINX, INC.Inventors: Gamal Refai-Ahmed, Suresh Ramalingam, Mohsen H. Mardi, Tien-Yu Lee, Ivor G. Barber, Cheang-Whang Chang, Jaspreet Singh Gandhi
-
Publication number: 20180284187Abstract: Integrated (IC) package testing systems and methods for testing an IC package are provided herein that accommodate IC packages having different die heights. In one example, the IC package testing system includes a test fixture base, a socket, and a test fixture head. The socket is disposed on the test fixture base and configured to receive an IC package for testing. The test fixture head is movable towards and away from the base. The test fixture head includes a base plate and a plurality of independently movable pushers. The plurality of pushers are configured to engage the IC package disposed the socket.Type: ApplicationFiled: March 28, 2017Publication date: October 4, 2018Applicant: Xilinx, Inc.Inventors: Gamal Refai-Ahmed, Ivor G. Barber, Suresh Ramalingam, Jaspreet Singh Gandhi, Tien-Yu Lee, Henley Liu, David M. Mahoney, Mohsen H. Mardi
-
Patent number: 10085363Abstract: A thermal management system that provides cooling to an electronic device is disclosed. The thermal management system includes a surface having a plurality of extended elements thermally coupled to the surface, a plurality of vibrator assemblies configured to generate a cooling flow across the surface, and a mounting structure disposed atop the plurality of extended elements of the surface to position the plurality of vibrator assemblies relative to the surface. The mounting structure is configured to orient each of the plurality of vibrator assemblies to the surface at an angel, such that the cooling flow generated by the plurality of vibrator assemblies impinges on the extended elements at an angle.Type: GrantFiled: May 22, 2014Date of Patent: September 25, 2018Assignee: General Electric CompanyInventors: Gamal Refai-Ahmed, Hendrik Pieter Jacobus de Bock, Yogen Vishwas Utturkar, Matthew A. Ferguson, Bryan Patrick Whalen, Christian M. Giovanniello
-
Patent number: 10054575Abstract: There are provided methods and devices for sensing hydrogen gas. For example, there is provided a method that includes drawing a sample into a channel. The method includes passing the sample over a collection plate to remove an extraneous gas in the sample, thus yielding a purified sample. The method further includes passing the purified sample on a sensing plate and measuring a concentration of hydrogen in the purified sample using the sensing plate. The measuring can include heating the sensing plate and correlating a change in resistance of the sensing plate with a specified concentration of hydrogen. Furthermore, the method can include regenerating the collection plate following the measuring.Type: GrantFiled: September 25, 2015Date of Patent: August 21, 2018Assignee: General Electric CompanyInventors: Gamal Refai-Ahmed, David Peter Robinson
-
Patent number: 10043730Abstract: A method and apparatus are provided which improve heat transfer between a lid and an IC die of an IC (chip) package. In one embodiment, a chip package is provided that includes a first IC die, a package substrate, a lid and a stiffener. The first IC die is coupled to the package substrate. The stiffener is coupled to the package substrate and circumscribes the first IC die. The lid has a first surface and a second surface. The second surface faces away from the first surface and towards the first IC die. The second surface of the lid is conductively coupled to the IC die, while the lid is mechanically decoupled from the stiffener.Type: GrantFiled: September 28, 2015Date of Patent: August 7, 2018Assignee: XILINX, INC.Inventors: Gamal Refai-Ahmed, Tien-Yu Lee, Ferdinand F. Fernandez, Suresh Ramalingam, Ivor G. Barber, Inderjit Singh, Nael Zohni
-
Publication number: 20180144963Abstract: An example clamping assembly tray for packaging a semiconductor device includes a frame having a bottom surface and side walls extending from the bottom surface that define a cavity; and a compressible member disposed on the bottom surface of the frame within the cavity, where a top portion of the compressible member provides a support surface for supporting the semiconductor device, the support surface being between the bottom surface and a top edge of the side walls.Type: ApplicationFiled: November 23, 2016Publication date: May 24, 2018Applicant: Xilinx, Inc.Inventors: Gamal Refai-Ahmed, Suresh Ramalingam, Mohsen H. Mardi, Tien-Yu Lee, Ivor G. Barber, Cheang-Whang Chang, Jaspreet Singh Gandhi
-
Patent number: 9951767Abstract: A vibrational fluid mover includes a housing having at least one actuator element positioned thereon that vibrates responsive to a wave shape voltage applied thereto, such that a volume of a chamber in the housing increases and decreases to entrain and eject fluid into/out from the chamber. A control system is operably connected to the actuator element to cause the voltage to be provided thereto so as to actively control the movement of the actuator element. The control system is programmed to set a baseline value for an operational parameter of the vibrational fluid mover generated responsive to a target voltage and frequency being provided, monitor operation of the vibrational fluid mover during operation at the target voltage and frequency, identify a deviation of the operational parameter from the baseline value, and modify the voltage and frequency provided to the actuator element based on any deviation of the operational parameter.Type: GrantFiled: May 22, 2014Date of Patent: April 24, 2018Assignee: General Electric CompanyInventors: Gamal Refai-Ahmed, John Anthony Vogel, Christian M. Giovanniello
-
Patent number: 9947560Abstract: An integrated circuit (IC) package, assembly tool and method for assembling an IC package are described herein. In a first example, an IC package is provided that includes a package substrate, at least a first integrated circuit (IC) die and a cover. The first integrated circuit (IC) die is mechanically and electrically coupled to the package substrate via solder connections. The cover is bonded to the package substrate. The cover encloses the first IC die and is laterally offset from a peripheral edge of the package substrate.Type: GrantFiled: November 22, 2016Date of Patent: April 17, 2018Assignee: XILINX, INC.Inventors: Mohsen H. Mardi, David Tan, Gamal Refai-Ahmed
-
Patent number: 9879661Abstract: A vibrational fluid mover assembly having an active damping mechanism is disclosed. The vibrational fluid mover assembly includes a vibrational fluid mover having a first plate, a second plate spaced apart from the first plate, a spacer element having an orifice formed therein and being positioned between the first and second plates to maintain the first and second plates in a spaced apart relationship, and an actuator element coupled to at least one of the first and second plates to selectively cause deflection thereof such that a fluid flow is generated and projected out from the orifice. The vibrational fluid mover assembly also includes an absorber system connected to the vibrational fluid mover and providing active damping to the vibrational fluid mover, with the absorber system having suspension tabs coupled to the vibrational fluid mover and spring components configured to mount the vibrational fluid mover in a suspended arrangement.Type: GrantFiled: August 29, 2014Date of Patent: January 30, 2018Assignee: General Electric CompanyInventors: Gamal Refai-Ahmed, John Anthony Vogel, Christian M. Giovanniello
-
Patent number: 9812374Abstract: Methods and apparatus are described for heat management in an integrated circuit (IC) package using a device with a textured surface having multiple grooves in an otherwise relatively flat surface. The textured surface of the heat management device is designed, in conjunction with a thermal interface material (TIM), to push gas bubbles out of the flat areas such that the gas bubbles are trapped in the grooves or driven out of the interface between the device and the TIM altogether. The area of the grooves is small relative to the ungrooved areas (i.e., the flat areas), such that when the gas bubbles are trapped in the grooved areas, the ungrooved areas work even better for heat transfer. With the area of the regions for the flat portions being substantially greater than the area of the regions for the grooves, the textured heat management device is designed to lower thermal resistance, increase thermal conductivity, and increase heat transfer from one or more IC dies to a heat sink assembly in an IC package.Type: GrantFiled: March 22, 2017Date of Patent: November 7, 2017Assignee: XILINIX, INC.Inventors: Gamal Refai-Ahmed, Suresh Ramalingam, Brian D. Philofsky
-
Patent number: 9793191Abstract: A semiconductor device packaging system includes a substrate, a heat spreader, a stiffener attached to the substrate, and at least one die electrically coupled to the substrate and thermally coupled to the heat spreader. The semiconductor device packaging system further includes at least one stud coupled to one of the stiffener and the heat spreader and at least one orifice formed through one of the stiffener and the heat spreader. In addition, the at least one orifice is aligned with the at least one stud.Type: GrantFiled: November 8, 2016Date of Patent: October 17, 2017Assignee: General Electric CompanyInventor: Gamal Refai-Ahmed
-
Patent number: 9668334Abstract: An electronic device includes an outer case defining an internal volume, a circuit board positioned within the internal volume and having a first surface and a second surface, one or more active components mounted on the first surface of the circuit board, and a thermal management system to provide cooling for the active components. The thermal management system includes a first heat spreader in thermal contact with an active component, a second heat spreader in thermal contact with the second surface of the circuit board, thermal carriers coupled to the first and second heat spreaders to remove thermal energy therefrom, and a heat exchanger coupled to the thermal carriers to receive thermal energy therefrom and dissipate the thermal energy, wherein one thermal carrier is routed between the first heat spreader and the heat exchanger and the other thermal carrier is routed between the second heat spreader and the heat exchanger.Type: GrantFiled: May 23, 2014Date of Patent: May 30, 2017Assignee: General Electric CompanyInventors: Gamal Refai-Ahmed, Hendrik Pieter Jacobus de Bock, Yogen Vishwas Utturkar, Christian M. Giovanniello
-
Patent number: 9627281Abstract: A method of manufacturing is provided that includes applying a thermal interface tape to a side of a semiconductor wafer that includes at least one semiconductor chip. The thermal interface material tape is positioned on the at least one semiconductor chip. The at least one semiconductor chip is singulated from the semiconductor wafer with at least a portion of the thermal interface tape still attached to the semiconductor chip.Type: GrantFiled: August 20, 2010Date of Patent: April 18, 2017Assignees: Advanced Micro Device, Inc., ATI Technologies ULCInventors: Seth Prejean, Dales Kent, Ronnie Brandon, Gamal Refai-Ahmed, Michael Z. Su, Michael Bienek, Joseph Siegel, Bryan Black