Patents by Inventor Guo Cheng

Guo Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Publication number: 20240130156
    Abstract: A light-emitting element includes a pair of electrodes, a first light-emitting unit, a second light-emitting unit, and a charge generation layer. The first light-emitting unit, between the pair of electrodes, and the first light-emitting unit, includes a first light-emitting layer. The second light-emitting unit, between the pair of electrodes, includes a second light-emitting layer. A first luminescent layer includes a first main body material, a second main body material, a first guest material, and a first auxiliary material, and the first main body material forms a first excimer complex with the second main body material. A first excited triplet state energy level of the first auxiliary material is lower than a first excited triplet state energy level of the first excimer complex, and the first excited triplet state energy level of the first auxiliary material is higher than that of the first guest material.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 18, 2024
    Applicant: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Yu ZHANG, Li YUAN, Munjae LEE, Wenxu XIANYU, Jie YANG, Huizhen PIAO, Mugyeom KIM, Xianjie LI, Jing HUANG, Fang WANG, Kailong WU, Lin YANG, Yu GU, Mingzhou WU, Jingyao SONG, Danhua SHEN, Guo CHENG
  • Publication number: 20240118284
    Abstract: The present disclosure relates generally to methods for preparing a tissue sample for detection of the expression of a transmembrane protein in the tissue sample. The present disclosure also provides antibodies and treatments targeting tumor samples expressing the PLXDC1 or the PLXDC2 proteins.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 11, 2024
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Hui SUN, Adrian Chichuen AU, Guo Cheng
  • Publication number: 20240101965
    Abstract: The present disclosure relates generally to ex vivo primary tumor models prepared from fresh tumor tissues which are useful for screening anti-cancer agents. The fresh tumor tissues are prepared and cultured under suitable conditions to grow an outgrowth of endothelial cells Killing of these endothelial cells by a candidate agent indicates the efficacy of the agent in inhibiting tumor angiogenesis.
    Type: Application
    Filed: October 16, 2020
    Publication date: March 28, 2024
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Hui SUN, Adrian Chichuen AU, Guo CHENG
  • Patent number: 11934340
    Abstract: In accordance with implementations of the subject matter described herein, there provides a solution for multi-path RDMA transmission. In the solution, at least one packet is generated based on an RDMA message to be transmitted from a first device to a second device. The first device has an RDMA connection with the second device via a plurality of paths. A first packet in the at least one packet includes a plurality of fields, which include information for transmitting the first packet over a first path of the plurality of paths. The at least one packet is transmitted to the second device over the plurality of paths via an RDMA protocol. The first packet is transmitted over the first path. The multi-path RDMA transmission solution according to the subject matter described herein can efficiently utilize rich network paths while maintaining a low memory footprint in a network interface card.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 19, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Guo Chen, Thomas Moscibroda, Peng Cheng, Yuanwei Lu, Yongqiang Xiong
  • Patent number: 11884647
    Abstract: The disclosure provides compounds, and compositions, including pharmaceutical compositions, kits that include the compounds, and methods of using (or administering) and making the compounds. The disclosure further provides compounds or compositions thereof for use in a method of modulating PLXDC1 (TEM7) and/or PLXDC2 or killing pathogenic blood vessles. The disclosure further provides compounds or compositions thereof for use in a method of treating a disease, disorder, or condition that is mediated, at least in part, by PEDF receptors or by angiogenesis.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: January 30, 2024
    Assignees: The Regents of the University of California, Atengen, Inc.
    Inventors: Hui Sun, Pu Sun, Guo Cheng, Adrian Chichuen Au, Ming Zhong
  • Publication number: 20230402738
    Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Guo-Cheng LIAO, Yi Chuan DING
  • Publication number: 20230290863
    Abstract: Multiple-patterning techniques described herein enable forming fin structures of a semiconductor device in a manner that enables decreased fin-to-fin spacing of the fin structures while providing precise control over etching depth of the fin structures. In some implementations, an etch operation is performed to form a pattern in one or more mask layers that is used to etch a substrate to form the fin structures. The etch operation includes an advanced pulsing technique, in which a high-frequency radio frequency (RF) source and a low-frequency RF source are pulsed. Pulsing the high-frequency RF source and the low-frequency RF source in the etch operation reduces consumption of a thickness of the one or more mask layers which increases the aspect ratio of the pattern. This enables deeper etching of the substrate when forming the fin structures, which reduces the likelihood of under etching.
    Type: Application
    Filed: March 9, 2022
    Publication date: September 14, 2023
    Inventors: Guo-Cheng LYU, Kun-Yu LIN, Yu-Ling KO, Chih-Teng LIAO
  • Patent number: 11721884
    Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: August 8, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Guo-Cheng Liao, Yi Chuan Ding
  • Patent number: 11670836
    Abstract: A semiconductor device package includes a substrate, an air cavity, a radiator, and a director. The substrate has a top surface. The air cavity is disposed within the substrate. The air cavity has a first sidewall and a second sidewall opposite to the first sidewall. The radiator is disposed adjacent to the first sidewall of the air cavity. The director is disposed adjacent to the second sidewall of the air cavity.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: June 6, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ting Ruei Chen, Hung-Hsiang Cheng, Guo-Cheng Liao, Yun-Hsiang Tien
  • Patent number: 11409804
    Abstract: The present disclosure relates to a data analysis method and a data analysis system thereof. The data analysis method includes steps of: receiving a first learning content data, and adding multiple first segmentation marks to the first learning content data to divide multiple first learning sections on the first learning content data. The first learning sections are arranged according to a time axis. Searching a first keyword string corresponding to each first learning section from the first learning sections. Receiving a analysis command, and analyzing the analysis command with the first keyword string of each of the first learning content data to obtain multiple first similarities, corresponding to the analysis command and each of the first learning sections. Finally, searching for the first learning section with the highest similarity.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: August 9, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Gong Li, Shih-Han Chan, Chao-Hsuan Ko, Guo-Cheng Lan
  • Patent number: 11404799
    Abstract: A semiconductor device package includes a substrate, a support structure and a first antenna. The substrate has a first surface and a second surface opposite to the first surface. The support structure is disposed on the first surface of the substrate. The first antenna is disposed on the support structure. The first antenna has a first surface facing the substrate, a second surface opposite to the first surface and a lateral surface extending between the first surface and a second surface of the first antenna. The lateral surface of the first antenna is exposed to the external of the semiconductor device package. The first antenna includes a dielectric layer and an antenna pattern disposed within the dielectric layer and penetrating the dielectric layer.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: August 2, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ting Ruei Chen, Guo-Cheng Liao
  • Patent number: 11386163
    Abstract: The present disclosure relates to a data search method and a data search system thereof. The data search method includes steps of: receiving a first learning content data, wherein the first learning content data includes multiple first learning sections; analysing the first learning content data by a way of Natural Language Processing to search multiple first keyword strings corresponding to each of the first learning content data; receiving a search message; analysing the search message by the way of Natural Language Processing to generate a search string; comparing the search string with the first keyword strings; and generating a search list according to the first learning section, which corresponding to the first keyword string that matches the search string.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: July 12, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Han Chan, Chao-Hsuan Ko, Guo-Cheng Lan
  • Patent number: 11362049
    Abstract: A semiconductor device package includes a first surface and a second surface opposite to the first surface. The semiconductor device package further includes a first supporting structure disposed on the first surface of the substrate and a second supporting structure disposed on the first surface of the substrate. The first supporting structure has a first surface spaced apart from the first surface of the substrate by a first distance. The second supporting structure has a first surface spaced apart from the first surface of the substrate by a second distance. The second distance is different from the first distance. The semiconductor device package further includes a first antenna disposed above the first surface of the substrate. The first antenna is supported by the first surface of the first supporting structure and the first surface of the second supporting structure.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: June 14, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Guo-Cheng Liao, Yi Chuan Ding
  • Publication number: 20220140467
    Abstract: A semiconductor device package includes a substrate, an air cavity, a radiator, and a director. The substrate has a top surface. The air cavity is disposed within the substrate. The air cavity has a first sidewall and a second sidewall opposite to the first sidewall. The radiator is disposed adjacent to the first sidewall of the air cavity. The director is disposed adjacent to the second sidewall of the air cavity.
    Type: Application
    Filed: October 29, 2020
    Publication date: May 5, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ting Ruei CHEN, Hung-Hsiang CHENG, Guo-Cheng LIAO, Yun-Hsiang TIEN
  • Patent number: 11296001
    Abstract: A package substrate includes a first dielectric layer, a first patterned conductive layer and a first set of alignment marks. The first patterned conductive layer is disposed on the first dielectric layer. The first set of alignment marks is disposed on the first dielectric layer and adjacent to a first edge of the first dielectric layer. The first set of alignment marks includes a plurality of alignment marks. Distances between the alignment marks of the first set of alignment marks and the first edge are different from each other.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: April 5, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Guo-Cheng Liao, Yi Chuan Ding
  • Patent number: 11217509
    Abstract: Present disclosure provides a lead frame, including a die paddle and a plurality of leads surrounding the die paddle. Each of the leads including a finger portion proximal to the die paddle and a lead portion distal from the die paddle. The finger portion includes a main body and at least one support structure. The respective support structures on adjacent leads are mutually isolated, and a distance between the support structure and the die paddle is smaller than a distance between the lead portion and the die paddle. A semiconductor package structure including the lead frame described herein and a semiconductor package assembly including the semiconductor package structure described herein are also provided.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: January 4, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jyun-Chi Jhan, Guo-Cheng Liao
  • Publication number: 20210337644
    Abstract: The disclosure provides a light emitting device including a power conversion circuit configured to provide a power voltage, a light source module receives the power voltage, a driving circuit, and a control circuit. The driving circuit is configured to drive a plurality of light emitting units in the light source module and detect a current value flowing through each light emitting unit to generate a current signal. The control circuit is coupled to the power conversion circuit, the light source module, and the driving circuit and is configured to detect a cross-voltage of at least one of the light emitting units. The control circuit calculates a voltage offset value according to a difference between the cross-voltage and the power voltage to generate a control signal according to the voltage offset value and the current signal to accordingly control the power conversion circuit to adjust the power voltage.
    Type: Application
    Filed: March 21, 2021
    Publication date: October 28, 2021
    Applicant: Coretronic Corporation
    Inventors: Guo-Cheng Hung, Ho-Yi Yeh, Nan-Jiun Yin
  • Patent number: 11128904
    Abstract: A system for recommending multimedia data includes a storage device and a processor. The storage device includes a first storage unit and a second storage unit. The first storage unit is configured to store multimedia data segments. The second storage unit is connected to at least one client device through network, and configured to store operation data generated by the interaction between the at least one client device and the system. The processor coupled to the storage device is configured to analyze the multimedia data segments in the first storage unit in order to generate relevance links between the multimedia data segments, analyze the operation data in the second storage unit, and to generate, based on the relevance links and the operation data, a corresponding recommended list, wherein the recommended list records the multimedia data segments.
    Type: Grant
    Filed: August 4, 2019
    Date of Patent: September 21, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Han Chan, Chao-Hsuan Ko, Guo-Cheng Lan
  • Patent number: 11107777
    Abstract: A substrate structure includes a substrate body, a bottom circuit layer, a first bottom protection structure and a second bottom protection structure. The substrate body has a top surface and a bottom surface opposite to the top surface. The bottom circuit layer is disposed adjacent to the bottom surface of the substrate body, and includes a plurality of pads. The first bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. The second bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. A second thickness of the second bottom protection structure is greater than a first thickness of the first bottom protection structure.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: August 31, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Guo-Cheng Liao, Yi Chuan Ding