Patents by Inventor Han Peng

Han Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180196129
    Abstract: An ultrasound pulse generator circuit includes a first gate driver electrically coupled to a first gallium nitride (GaN) transistor, a second gate driver electrically coupled to a second GaN transistor, a first snubber circuit, a second snubber circuit, and a transformer. The first snubber circuit and the second snubber circuit each include a respective capacitor and resistor and each snubber circuit is configured to clamp a voltage overshoot when present. Further, the transformer generates an output signal when operated and the third transformer is electrically connected downstream of the first GaN transistor, the second GaN transistor, the first snubber circuit, and the second snubber circuit. In addition, the transformer includes multiple windings.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 12, 2018
    Inventors: Han Peng, Juan Antonio Sabate, Kieran Andrew Wall
  • Publication number: 20180191338
    Abstract: Systems and methods provided herein relate to a gate drive circuit for controlling operation of a wide bandgap semiconductor switch. The systems and methods receive a control signal and configuring an operation signal configured to activate a wide bandgap switch (WBG switch). A profile of the operation signal being based on electrical characteristics of first and second shaping circuits. The systems and methods further deliver the operation signal to the WBG switch.
    Type: Application
    Filed: January 3, 2017
    Publication date: July 5, 2018
    Inventors: Ramamujam Ramabhadran, Sayan Acharya, Han Peng, Maja Harfman Todorovic, Ahmed Elasser, Robert Thomas
  • Patent number: 9972746
    Abstract: A substrate with a lithium imide layer, a LED with a lithium imide layer and a manufacturing method of the LED are provided. The substrate includes a lithium niobate layer and a lithium imide layer. The lithium imide layer is formed on a surface of the lithium niobate layer.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: May 15, 2018
    Assignee: OPTO TECH CORPORATION
    Inventors: Lung-Han Peng, Jiun-Yun Li, Jun-Wei Peng, Po-Yuan Chiu
  • Patent number: 9923119
    Abstract: A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: March 20, 2018
    Assignee: OPTO TECH CORPORATION
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
  • Publication number: 20180062024
    Abstract: A substrate with a lithium imide layer, a LED with a lithium imide layer and a manufacturing method of the LED are provided. The substrate includes a lithium niobate layer and a lithium imide layer. The lithium imide layer is formed on a surface of the lithium niobate layer.
    Type: Application
    Filed: February 2, 2017
    Publication date: March 1, 2018
    Inventors: LUNG-HAN PENG, JIUN-YUN LI, JUN-WEI PENG, PO-YUAN CHIU
  • Patent number: 9853555
    Abstract: A universal power adapter includes a power converter configured to generate an output power based on a switching frequency of the power converter. The universal power adapter also includes a frequency controller operatively coupled to the power converter and configured to control the switching frequency of the power converter. The universal power adapter further includes a switch capacitor circuit having a plurality of capacitive elements, operatively coupled to the power converter. The switch capacitor circuit is configured to switch between the plurality of capacitive elements. The universal power adapter also includes a capacitance controller operatively coupled to the switch capacitor circuit and configured to control the switch capacitor circuit to control switching between the plurality of capacitive elements to maintain a control parameter within a threshold range of.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: December 26, 2017
    Assignee: General Electric Company
    Inventors: Ramanujam Ramabhadran, Han Peng, Yehuda Daniel Levy, John Stanley Glaser
  • Publication number: 20170326188
    Abstract: A method for regulating blood glucose level is provided. The method comprises administering to a subject in need an effective amount of at least one of poricoic acid A and poricoic acid B, wherein at least one of poricoic acid A and poricoic acid B can be used in the form of a plant extract, and wherein in the plant extract, poricoic acid A and poricoic acid B are present in a total amount of at least 30 wt %, based on the total weight of the plant extract.
    Type: Application
    Filed: May 10, 2017
    Publication date: November 16, 2017
    Inventors: Hang-Ching LIN, Han-Peng KUO
  • Publication number: 20170296603
    Abstract: A method for protecting muscles, comprising administering to a subject in need an effective amount of a FU-LING (Poria cocos) extract, tumulosic acid and/or a pharmaceutical acceptable salt of tumulosic acid. In particular, the method of the present invention is for protecting muscle cells against injury, promoting regeneration and repair of muscle, regulating, treating and/or delaying muscle atrophy (especially caused by aging, diseases, and cachexia), or helping normal muscle contraction, maintaining normal muscle physiology, maintaining normal neuromuscular function, maintaining normal energy metabolism, or enhancing energy level.
    Type: Application
    Filed: April 14, 2017
    Publication date: October 19, 2017
    Inventors: Chao-Jih WANG, Han-Peng KUO, Ai-Ling YEH
  • Patent number: 9786842
    Abstract: A single memory cell has the functions of a storage element and a selector. The memory cell includes a P-type layer, a tunneling structure and an N-type layer. The tunneling structure is formed on the P-type layer. The N-type layer is formed on the tunneling structure. The tunneling structure is a stack structure including a first material layer, a second material layer and a third material layer. By adjusting a bias voltage that is applied to the P-type layer and the N-type layer, the tunneling structure is controlled to be in the amorphous state or the crystalline state. Consequently, the memory cell has the memorizing and storing functions. The memory cell has the P-type layer, the tunneling structure and the N-type layer. By adjusting the bias voltage, the function of the selector is achieved.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 10, 2017
    Assignee: OPTO TECH CORPORATION
    Inventors: Ming-Yi Yan, Jhih-You Lu, Hsien-Chih Huang, Yun-Shiuan Li, Jiun-Yun Li, I-Chun Cheng, Chih-Ming Lai, Yue-Lin Huang, Lung-Han Peng
  • Patent number: 9754410
    Abstract: Systems and methods for three-dimensional polygonal garment mesh deformation and/or layering for garment fit visualization. A deformation engine receives at least one garment mesh fitted to a template body mesh and deforms the garment mesh to a target body mesh according to a geometrical deformation algorithm. A layering engine receives plural garment meshes that are separately fitted to a target body mesh, and deforms the plural garment meshes according to an iterative layering process that deforms each individual garment mesh according to a layering order while preventing intersections between other garment meshes and the target body mesh.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: September 5, 2017
    Assignee: StyleMe Limited
    Inventors: Jonathan Leong Zhan Hua, Chi-Han Peng
  • Publication number: 20170161948
    Abstract: Systems and methods for three-dimensional polygonal garment mesh deformation and/or layering for garment fit visualization. A deformation engine receives at least one garment mesh fitted to a template body mesh and deforms the garment mesh to a target body mesh according to a geometrical deformation algorithm. A layering engine receives plural garment meshes that are separately fitted to a target body mesh, and deforms the plural garment meshes according to an iterative layering process that deforms each individual garment mesh according to a layering order while preventing intersections between other garment meshes and the target body mesh.
    Type: Application
    Filed: February 15, 2017
    Publication date: June 8, 2017
    Inventors: Jonathan Leong Zhan Hua, Chi-Han Peng
  • Publication number: 20170085186
    Abstract: A universal power adapter includes a power converter configured to generate an output power based on a switching frequency of the power converter. The universal power adapter also includes a frequency controller operatively coupled to the power converter and configured to control the switching frequency of the power converter. The universal power adapter further includes a switch capacitor circuit having a plurality of capacitive elements, operatively coupled to the power converter. The switch capacitor circuit is configured to switch between the plurality of capacitive elements. The universal power adapter also includes a capacitance controller operatively coupled to the switch capacitor circuit and configured to control the switch capacitor circuit to control switching between the plurality of capacitive elements to maintain a control parameter within a threshold range of.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 23, 2017
    Inventors: Ramanujam Ramabhadran, Han Peng, Yehuda Daniel Levy, John Stanley Glaser
  • Patent number: 9583675
    Abstract: A white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is in contact with the P-type layer. The tunneling structure is a stack structure comprising a first barrier layer, a first active layer and a second barrier layer. At least one of the first barrier layer, the first active layer and the second barrier layer is a first metal nitride oxide layer. The N-type layer is in contact with the tunneling structure. The N-type electrode is in contact with the N-type layer. The P-type electrode is in contact with the P-type layer.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: February 28, 2017
    Assignee: OPTO TECH CORPORATION
    Inventors: Lung-Han Peng, Hong-Chih Tang, Ming-Yi Yan
  • Patent number: 9173230
    Abstract: A method for scheduling data burst is provided. The method is adapted for a mobile apparatus. The method includes the following steps. Firstly, a data burst is generated, and a maximum delay time is calculated according to a delay constraint of the data burst. Next, whether to receive a downlink data burst before the maximum delay time is determined. If yes, a base station is requested to schedule the data burst to at least one available scheduling time near the downlink data burst. Afterwards, the data burst is sent according to the at least one available scheduling time.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: October 27, 2015
    Assignee: National Taiwan University of Science and Technology
    Inventors: Feng-Ming Yang, Wei-Mei Chen, Han-Peng Jiang
  • Patent number: 9104039
    Abstract: Vision-aided passive alignment systems and methods are provided that detect tilt misalignment of an optics system during the process of mounting the optics system on an upper surface of the circuit board and remove tilt misalignment to ensure that a lens of the optics system is precisely aligned with an optoelectronic device mounted on the upper surface of the circuit board.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: August 11, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Goh Han Peng
  • Patent number: 9086553
    Abstract: A protective coating encapsulates bond pads disposed on a substrate of an optical communications module and extends in between the bond pads. The protective coating has characteristics that (1) increase the dielectric resistances between adjacent bond pads on the substrate, (2) protect the bond pads from moisture in the environment, and (3) prevents, or at least reduces, ion migration between adjacent bond pads. In this way, the protective coating prevents, or at least reduces, corrosion growth that can lead to impedance degradation and electrical shorts between adjacent bond pads.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: July 21, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Goh Han Peng, Phang Kah Yuan, De Mesa Eduardo Alicaya
  • Publication number: 20150090999
    Abstract: A white LED is provided. The white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first metal oxide layer. The active layer includes a second metal oxide layer. The second barrier layer includes a third metal oxide layer. The N-type layer is disposed over the tunneling structure. The N-type electrode and the P-type electrode are respectively contacted with the N-type layer and the P-type layer. An energy gap of the second metal oxide layer is lower than an energy gap of the first metal oxide layer and is lower than an energy gap of the third metal oxide layer.
    Type: Application
    Filed: January 2, 2014
    Publication date: April 2, 2015
    Applicant: OPTO TECH CORPORATION
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
  • Publication number: 20150091019
    Abstract: A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer.
    Type: Application
    Filed: September 18, 2014
    Publication date: April 2, 2015
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
  • Patent number: 8981373
    Abstract: A white LED is provided. The white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first metal oxide layer. The active layer includes a second metal oxide layer. The second barrier layer includes a third metal oxide layer. The N-type layer is disposed over the tunneling structure. The N-type electrode and the P-type electrode are respectively contacted with the N-type layer and the P-type layer. An energy gap of the second metal oxide layer is lower than an energy gap of the first metal oxide layer and is lower than an energy gap of the third metal oxide layer.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: March 17, 2015
    Assignee: Opto Tech Corporation
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
  • Patent number: 8871546
    Abstract: Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: October 28, 2014
    Assignee: Opto Tech Corporation
    Inventors: Lung-Han Peng, Jeng-Wei Yu, Po-Chun Yeh