Patents by Inventor Hao Ho

Hao Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134631
    Abstract: An information handling system includes a memory and a processor. The memory stores a current basic input/output system (BIOS) firmware image. During a regular boot mode of the information handling, the processor creates a first set of tables associated with the current BIOS firmware image, stores the first tables to the memory, and receives a BIOS firmware update image. During a BIOS update boot mode of the information handling system, the processor creates a second plurality of tables associated with the BIOS firmware update image, and compares the first and second tables. In response to a difference being determined between the first and second tables, the processor aborts the BIOS update boot mode and generate an error log.
    Type: Application
    Filed: October 20, 2022
    Publication date: April 25, 2024
    Inventors: Shekar Babu Suryanarayana, Karunakar Poosapalli, Hung V. Ho, James L. Walker, Tsung-Lin Chuang, Chia-Hao Chang, Te-Lung Lin
  • Patent number: 11966628
    Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: April 23, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Wei-Chen Wang, Han-Wen Hu, Yung-Chun Li, Huai-Mu Wang, Chien-Chung Ho, Yuan-Hao Chang, Tei-Wei Kuo
  • Patent number: 11953052
    Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Jian-Hua Chen, Po-Tsung Shih, Yu-Wei Lin, Ming-Hua Ho, Chih-Hao Wu
  • Patent number: 11948890
    Abstract: In an embodiment, a device includes: an integrated circuit die; a through via adjacent the integrated circuit die; a molding compound encapsulating the integrated circuit die and the through via; and a redistribution structure including: a first conductive via extending through a first dielectric layer, the first conductive via electrically connected to the integrated circuit die, the first dielectric layer being over the integrated circuit die, the through via, and the molding compound; and a first conductive line over the first dielectric layer and the first conductive via, the first conductive via extending into the first conductive line.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hao Tseng, Hung-Jui Kuo, Ming-Che Ho
  • Patent number: 11923337
    Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: March 5, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Ching Ho, Bo-Hao Ma, Yu-Ting Xue, Ching-Hung Tseng, Guan-Hua Lu, Hong-Da Chang
  • Patent number: 11887458
    Abstract: A fall detection system includes first sensing devices, second sensing devices, positioning modules, a data server and a display device. The first sensing device is configured to detect a posture of a body part of a user for obtaining body part posture data. The positioning modules are configured to detect positions of the first and second sensing devices, so as to obtain corresponding body part position data. Each of the second sensing devices is disposed on a shoe to detect a posture of a user's feet and to measure a distance from an ambient object for obtaining feet posture data and distance measurement data. The data server is configured to receive the body part posture data, the body part position data, the feet posture data and the distance measurement data to determine if the user falls down.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: January 30, 2024
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chih-Lung Lin, Wen-Ching Chiu, Yuan-Hao Ho
  • Publication number: 20230420560
    Abstract: A semiconductor device and a method for forming the same are provided. The semiconductor device includes a semiconductor substrate, a well region, an isolation structure, a gate structure and a field doped region. The well region having a first conductivity type is disposed in the semiconductor substrate. The gate structure extends to cover a portion of the isolation structure in the well region. The field doped region having a second conductivity type is disposed on the well region. The field doped region has a first portion overlapping the isolation structure and a second portion that is connected to the first portion and away from the gate structure. A first depth between a bottom surface of the first portion and a top surface of the semiconductor structure is greater than a second depth between a bottom surface of the second portion and the top surface of the semiconductor structure.
    Type: Application
    Filed: June 24, 2022
    Publication date: December 28, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventor: Yu-Hao HO
  • Publication number: 20230400576
    Abstract: A distance meter circuit includes: a driver for generating a driving pulse according to a measuring control signal to drive a laser diode to emit a light pulse to an object; a photonic sensing device for generating a first light conversion signal in response to the light pulse reflected by the object; a read-out circuit for measuring a TOF of the light pulse reflected by the object; an adjustable delay circuit for providing an adjustable delay time between the measuring control signal and the measuring trigger signal, or between the measuring control signal and the driving pulse; and a DLL controller for generating a delay control signal by comparing a phase difference between the measuring trigger signal and a driving related signal related to the driving pulse such that the phase difference is regulated to a predetermined value.
    Type: Application
    Filed: June 14, 2022
    Publication date: December 14, 2023
    Inventor: Wen-Hao Ho
  • Publication number: 20230223821
    Abstract: A rotary table includes a housing having a first groove, a second groove and a drainage channel connecting the first groove and the second groove, a motor, a shaft located in the housing and provided with a guide portion, and a leak detection belt set in an accommodation chamber in the housing and embedded in the second groove. In this way, if liquid enters the housing, the guide portion of the shaft guides the liquid into the first groove, so that the liquid reaches the second groove along the drainage channel. At this time, the leak detection belt can be used for leakage detection to protect key components.
    Type: Application
    Filed: January 7, 2022
    Publication date: July 13, 2023
    Inventors: Li-Wen HUANG, Yu-Ming LIN, Chih-Hao HO, You-Chen CHEN
  • Publication number: 20230088900
    Abstract: The disclosure relates to a lock structure. The combination lock mechanism includes multiple number wheels, multiple wheel cylinders, multiple wheel cylinder springs and a wheel rod. The wheel cylinder springs press between the wheel cylinders. The wheel cylinder has a plane portion and a round tab. The key lock mechanism has a lock seat and a lock core. The control sheet assembly has a lock core control sheet with multiple protrusive shafts, a support spring and multiple shaft wheels. The lock core control sheet touches the plane portion or the round tab. The support spring elastically presses the lock core control sheet. The lock core control sheet rotates about the protrusive shafts to engage with the lock seat when touching the round tab.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Inventor: Hsi-Hao HO
  • Patent number: 11585832
    Abstract: A probe card and a probe module thereof are provided. The probe card includes a first strengthening board, a fixed frame, a probe module, and a slidable frame. The first strengthening board includes a top surface, a bottom surface, and a mounting hole. An inner wall of the mounting hole is formed with an inner flange. The fixed frame is disposed on the top surface of the first strengthening board and surrounds the mounting hole. The probe module is disposed in the mounting hole and includes an outer flange including a physical region and multiple gap regions. The physical region abuts against the inner flange of the first strengthening board. The slidable frame is disposed on an inner wall of the fixed frame and is slidable between a released position and a fixed position. Multiple pressing portions are disposed on an inner wall of the slidable frame.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: February 21, 2023
    Assignee: MPI CORPORATION
    Inventors: Chung-Yen Huang, Chih-Wei Wen, Sheng-Feng Xu, Fuh-Chyun Tang, Chih-Hao Ho
  • Publication number: 20220358824
    Abstract: A fall detection system includes first sensing devices, second sensing devices, positioning modules, a data server and a display device. The first sensing device is configured to detect a posture of a body part of a user for obtaining body part posture data. The positioning modules are configured to detect positions of the first and second sensing devices, so as to obtain corresponding body part position data. Each of the second sensing devices is disposed on a shoe to detect a posture of a user's feet and to measure a distance from an ambient object for obtaining feet posture data and distance measurement data. The data server is configured to receive the body part posture data, the body part position data, the feet posture data and the distance measurement data to determine if the user falls down.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Chih-Lung LIN, Wen-Ching CHIU, Yuan-Hao HO
  • Publication number: 20220320289
    Abstract: High-voltage semiconductor device and method of forming the same, the high-voltage semiconductor device includes a substrate, a gate structure, a drain, a first insulating structure and a drain doped region. The gate structure is disposed on the substrate. The drain is disposed in the substrate, at one side of the gate structure. The first insulating structure is disposed on the substrate, under the gate structure to partially overlap with the gate structure. The drain doped region is disposed in the substrate, under the drain and the first insulating structure, and the drain doped region includes a discontinuous bottom surface.
    Type: Application
    Filed: June 22, 2022
    Publication date: October 6, 2022
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Wen-Hsin Lin, Shin-Chen Lin, Yu-Hao Ho, Cheng-Tsung Wu, Chiu-Hao Chen
  • Patent number: 11450192
    Abstract: A fall detection system includes first sensing devices, second sensing devices, positioning modules, a data server and a display device. The first sensing device is configured to detect a posture of a body part of a user for obtaining body part posture data. The positioning modules are configured to detect positions of the first and second sensing devices, so as to obtain corresponding body part position data. Each of the second sensing devices is disposed on a shoe to detect a posture of a user's feet and to measure a distance from an ambient object for obtaining feet posture data and distance measurement data. The data server is configured to receive the body part posture data, the body part position data, the feet posture data and the distance measurement data to determine if the user falls down.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: September 20, 2022
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chih-Lung Lin, Wen-Ching Chiu, Yuan-Hao Ho
  • Patent number: 11398552
    Abstract: High-voltage semiconductor device and method of forming the same, the high-voltage semiconductor device includes a substrate, a gate structure, a drain, a first insulating structure and a drain doped region. The gate structure is disposed on the substrate. The drain is disposed in the substrate, at one side of the gate structure. The first insulating structure is disposed on the substrate, under the gate structure to partially overlap with the gate structure. The drain doped region is disposed in the substrate, under the drain and the first insulating structure, and the drain doped region includes a discontinuous bottom surface.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: July 26, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Wen-Hsin Lin, Shin-Chen Lin, Yu-Hao Ho, Cheng-Tsung Wu, Chiu-Hao Chen
  • Patent number: 11362085
    Abstract: A high-voltage semiconductor device includes a substrate, a body region, a well region, a bulk region, a source, a drain, an isolation region, a gate structure, and a resistor. The body region and the well region are disposed in the substrate. The bulk region and the source are disposed in the body region. The drain is disposed in the well region. The isolation region is disposed on the well region. The isolation region is disposed between the drain and the source. The gate structure is disposed on the substrate. The gate structure extends onto a portion of the isolation region. The resistor is disposed on the isolation region. The resistor is electrically connected to the bulk region and the drain, or the resistor is electrically connected to the drain and/or the source.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: June 14, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yu-Hao Ho, Hsiao-Ling Chiang, Yueh-Chu Chiang, Yi-Hsiang Huang
  • Patent number: 11341226
    Abstract: A combination lock system includes a mobile communication device (10, 10?), a cloud server (20) and a combination lock (30, 30?). When the cloud server (20) determines that the mobile communication device (10, 10?) matches authentication information, the cloud server (20) outputs password information (22) corresponding to the authentication information to the mobile communication device (10, 10?), and the combination lock (30, 30?) obtains an electric energy and the password information (22) from the mobile communication device (10, 10?). When the combination lock (30, 30?) determines that one of the characters of the password setting module (31, 31?) matches one of the characters of the password information (22) corresponding to a corresponding arrangement order, the mobile communication device (10, 10?) displays display information.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: May 24, 2022
    Assignee: REAL LOCKS & SECURITY CO., LTD.
    Inventor: Hsi-Hao Ho
  • Publication number: 20220069081
    Abstract: High-voltage semiconductor device and method of forming the same, the high-voltage semiconductor device includes a substrate, a gate structure, a drain, a first insulating structure and a drain doped region. The gate structure is disposed on the substrate. The drain is disposed in the substrate, at one side of the gate structure. The first insulating structure is disposed on the substrate, under the gate structure to partially overlap with the gate structure. The drain doped region is disposed in the substrate, under the drain and the first insulating structure, and the drain doped region includes a discontinuous bottom surface.
    Type: Application
    Filed: August 26, 2020
    Publication date: March 3, 2022
    Inventors: Wen-Hsin Lin, Shin-Chen Lin, Yu-Hao Ho, Cheng-Tsung Wu, Chiu-Hao Chen
  • Publication number: 20220013520
    Abstract: A high-voltage semiconductor device includes a substrate, a body region, a well region, a bulk region, a source, a drain, an isolation region, a gate structure, and a resistor. The body region and the well region are disposed in the substrate. The bulk region and the source are disposed in the body region. The drain is disposed in the well region. The isolation region is disposed on the well region. The isolation region is disposed between the drain and the source. The gate structure is disposed on the substrate. The gate structure extends onto a portion of the isolation region. The resistor is disposed on the isolation region. The resistor is electrically connected to the bulk region and the drain, or the resistor is electrically connected to the drain and/or the source.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 13, 2022
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yu-Hao HO, Hsiao-Ling CHIANG, Yueh-Chu CHIANG, Yi-Hsiang HUANG
  • Patent number: D1023047
    Type: Grant
    Filed: September 14, 2023
    Date of Patent: April 16, 2024
    Assignee: AI BIOLECTRONIC HEALTHTECH CO. LIMITED
    Inventors: Yen-Yi Ho, Huei-Yun Gong, Yen-Yun Huang, Po-Hao Huang