Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE receives first downlink signals from a first access node. The UE determines a first downlink timing of the first access node based on the first downlink signals. The UE transmits a first preamble to a second access node based on the first downlink timing of the first access node. The UE receives second downlink signals from the second access node. The UE determines a second downlink timing of the second access node based on the second downlink signals. The UE transmits a second preamble to the second access node based on the second downlink timing of the second access node.

Abstract: A system includes a platform operational to move through an environment, a navigation system operational to measure platform poses of the platform in the environment, a camera operational to generate images of the environment at multiple timestamps, and a computer. The computer is operational to receive a first image from the camera, receive a second image from the camera, estimate a view direction of the first camera pose based on a first and second platform poses and alignment parameters, generate a rendered portion of the environment with a neural radiance field technique based on the second image and the alignment parameters, generate a predicted image of the environment as observed along the view direction through the rendered portion of the environment, determine differences between the first image and the predicted image, and update one or more of the plurality of alignment parameters based on the one or more differences.

Abstract: A method for fabricating a semiconductor device is disclosed. The method involves forming a stack of alternating semiconductor channels and interposers on a substrate, with sacrificial structures between the interposers. Source/drain openings are formed, and strain in the channels is modified. Source/drain structures are formed in the openings, and dielectric layers are deposited. The resulting device features stacked nanostructures with inner spacers of varying heights, enabling improved performance in electronic devices.

Abstract: A method includes forming a multi-layer stack including a plurality of semiconductor nanostructures. The multi-layer stack includes a semiconductor nanostructure, and a sacrificial semiconductor layer over the semiconductor nanostructure. The method further includes depositing a semiconductor layer over and contacting the semiconductor nanostructure, removing the sacrificial semiconductor layer, and forming a replacement gate stack encircling a combined region of the semiconductor nanostructure and the semiconductor layer.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: An electronic device is provided. The electronic device includes first and second viewing angle adjusting units, a display unit, and first to third polarizers. The display unit is disposed between the first and second viewing angle adjusting units. The first and second viewing angle adjusting units are respectively disposed between the first and second polarizers and between the second and third polarizers. The first viewing angle adjusting unit and the display unit share the second polarizer. The first polarizer have a first side and a second side closer to the display unit than the first side. A light from the display unit passes through the first viewing angle adjusting unit and the first polarizer to provide an output light from the first side. An angle of an absorption axis of the second polarizer and an angle of an absorption axis of the third polarizer are the same.

Abstract: Various embodiments of the present disclosure provide a semiconductor device structure including a source/drain feature disposed over a substrate, a plurality of semiconductor layers vertically stacked over the substrate and in contact with the source/drain feature, a gate electrode layer surrounding a portion of each of the plurality of the semiconductor layers, a first dielectric spacer in contact with a first side of a topmost semiconductor layer of the plurality of semiconductor layers, and a second dielectric spacer in contact with a second side of the topmost semiconductor layer of the plurality of semiconductor layers.

Abstract: A semiconductor device includes a first electronic component, a second electronic component, a third electronic component, a plurality of first interconnection structures, and a plurality of second interconnection structures. The first electronic component is between the second and the third electronic components. The first interconnection structures are between the first and the second electronic components. Each first interconnection structures has a length along a first direction substantially parallel to a surface of the first electronic component, and a width along a second direction substantially parallel to the surface and substantially perpendicular to the first direction. The length is larger than the width. The second interconnection structures are between the second and the third electronic components, and electrically connected to the second and the third electronic components. A height of each second interconnection structure is different from a height of each first interconnection structure.

Abstract: A capacitor structure including a silicon material layer, a support frame layer, and a capacitor is provided. The support frame layer is disposed in the silicon material layer. The support frame layer has recesses. There is a cavity between two adjacent recesses. The support frame layer is located between the cavity and the recess. The support frame layer has a through hole directly above the cavity. The capacitor is disposed in the silicon material layer. The capacitor includes a first insulating layer and a first electrode layer. The first insulating layer is disposed on the support frame layer. The first electrode layer is disposed on the first insulating layer and fills the recess and the cavity.

Abstract: A semiconductor structure includes a substrate, a bonding structure disposed over the substrate, and a filling layer. The substrate includes an optically active region and an optical surface in the optically active region. The bonding structure includes a bonding dielectric layer and conductive features in the bonding dielectric layer and arranged outside a keep-out zone of the bonding structure, where in a first view, the keep-out zone is located in the optically active region, and a first feature of the conductive features is disposed between the optically active region and the keep-out zone. The filling layer is interposed between the bonding structure and the optically active region of the substrate. The first feature is separated from the filling layer by the bonding dielectric layer in a second view.

Abstract: The disclosure provides an electronic device and a display method thereof. The electronic device includes a display panel and a light source module. The light source module is disposed at a side of the display panel. The light source module includes a first group of light-emitting units and a second group of light-emitting units that are alternately arranged, wherein the first group of light-emitting units and the second group of light-emitting units emit a light alternately, and each of a plurality of display pixels is adapted to alternately receive the light from the first group of light-emitting units and the second group of light-emitting units.

Abstract: The invention provides a three-dimensional (3D) image display method and a display device with a 3D image display function. The 3D image display method includes the following. A display device coordinate system is established. First volume data is obtained, and multiple first coordinates of multiple voxels of the first volume data in an absolute space coordinate system are defined. The multiple first coordinates of the multiple voxels of the first volume data are converted to the display device coordinate system to generate second volume data. Display data is generated according to the second volume data. An image is displayed according to the display data through the display device, and the image forms a 3D image with a 3D object image in human eyes, in which the 3D object image changes equally or proportionally in response to a change desired by a user through an input unit.

Abstract: A method of configuring a set of active cells among neighboring cells to reduce latency and interruption for inter-cell mobility is proposed. The set of active cells is an active set of cells among which UE can do fast cell switching. The set of active cells is configured by the network based on UE measurement report or network deployment information. UE maintains the configuration and can perform pre-synchronization to the configured active cells in downlink (DL) only or in both DL and uplink (UL). UE maintains the DL/UL synchronization with the active cells, and applies configuration once UE is indicated to switch to an active cell as the target cell. Because UE maintains the configuration and DL/UL timing of the target cell before receiving the cell-switch command, the mobility latency and interruption time for inter-cell mobility is reduced.

Abstract: An electronic device includes a first housing, a second housing, an antenna module and a conductive elastomer. The second housing is connected to the first housing. The antenna module includes a circuit board. The circuit board has a first surface and a second surface opposite to each other. The first surface faces the first housing and is provided with an antenna pattern. The antenna pattern includes a radiating portion and a grounding portion. The conductive elastomer is located between the antenna module and the first housing. One end of the conductive elastomer is connected to the grounding portion, and the other end of the conductive elastomer is connected to the grounding plane of the first housing.

Abstract: Optical devices and methods of manufacture are presented in which metallization layers are formed over a first active layer of first optical components, a first opening is formed through the metallization layers, a first semiconductor die is bonded over the metallization layers, and a laser die is bonded over the metallization layers, wherein after the bonding the laser die a first mirror located within the laser die is aligned with a second mirror through the first opening.

Abstract: Various solutions for channel information feedback with respect to user equipment and network apparatus in mobile communications are described. An apparatus may receive a reference signal transmitted by a network side including one or more than one network nodes. The apparatus may derive a channel response information observed by a receiving domain of the apparatus according to the reference signal. The apparatus may decompose the channel response information into a two-dimensional domain to obtain a linear combination coefficient representation of the channel response information in the two-dimensional domain. The apparatus may report a compressed channel information to the network side based on the linear combination coefficient representation and the two-dimensional domain.

Abstract: Imaging systems, cameras, and image sensors of this disclosure include imaging pixels that include subpixels. Diffractive optical elements such as a metasurface lens layers or a liquid crystal polarization hologram (LCPH) are configured to focus image light to the subpixels of the imaging pixels. Microlens regions of the diffractive optical elements may focus the image light to the subpixels of the imaging pixels.

Abstract: A photonic assembly includes: an electronic integrated circuits (EIC) die including a semiconductor substrate, semiconductor devices located on a horizontal surface of the semiconductor substrate, first dielectric material layers embedding first metal interconnect structures, a dielectric pillar structure vertically extending through each layer selected from the first dielectric material layers, a first bonding-level dielectric layer embedding first metal bonding pads, wherein a first subset of the first metal bonding pads has an areal overlap with the dielectric pillar structure in a plan view; and a photonic integrated circuits (PIC) die including waveguides, photonic devices, second dielectric material layers embedding second metal interconnect structures, a second bonding-level dielectric layer embedding second metal bonding pads, wherein the second metal bonding pads are bonded to the first metal bonding pads.

Abstract: A method of performing a camera to ground alignment for a camera system on a vehicle. The method includes determining if enabling conditions have occurred and estimating a location of a vanishing point in a source image. Ground lines are selected based on a source image. A lane line detection is performed based on clustering of the ground lines to determine lane lines in the source image. At least one of pitch, yaw, or roll of the vehicle are estimated from the source image. A cost function based on estimates of pitch, yaw, and roll is minimized to obtain an optimal pitch value, an optimal yaw value, an optimal roll value, and lane lines from the source image. A sliding window-based refinement is performed on source images. Alignment results are broadcast to a downstream application or it is determined if the camera system on the vehicle is misaligned.