Patents by Inventor Haruki Ito

Haruki Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9863828
    Abstract: A physical quantity sensor includes: a physical quantity sensor chip which detects a physical quantity and generates an electrical signal; a package which has an internal space and accommodates the physical quantity sensor chip in the internal space; and a first wire which connects the package and the physical quantity sensor chip together. The physical quantity sensor chip is moored in the internal space by the first wire.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: January 9, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Hideo Imai, Satoshi Nakajima, Haruki Ito
  • Patent number: 9589886
    Abstract: A semiconductor device is provided having a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: March 7, 2017
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Patent number: 9362246
    Abstract: A semiconductor device is provided with a plurality of protrusions which are made of a resin and which protrude higher than electrodes, and conductive layers which are electrically connected to the electrodes and which cover the top surfaces of the protrusions. A method for manufacturing the semiconductor device includes a step of applying a layer of the resin to the semiconductor device except for the electrodes, a step of patterning the conductive layers on the electrodes and the layer of the resin in accordance with the protrusions, and a step of removing the layer of the resin located between the conductive layers by the use of the patterned conductive layers as masks so as to form the protrusions.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: June 7, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Publication number: 20150369681
    Abstract: A physical quantity sensor includes: a physical quantity sensor chip which detects a physical quantity and generates an electrical signal; a package which has an internal space and accommodates the physical quantity sensor chip in the internal space; and a first wire which connects the package and the physical quantity sensor chip together. The physical quantity sensor chip is moored in the internal space by the first wire.
    Type: Application
    Filed: June 12, 2015
    Publication date: December 24, 2015
    Inventors: Hideo IMAI, Satoshi NAKAJIMA, Haruki ITO
  • Publication number: 20150311155
    Abstract: A semiconductor device is provided having a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Application
    Filed: July 6, 2015
    Publication date: October 29, 2015
    Inventor: Haruki ITO
  • Publication number: 20150279801
    Abstract: A semiconductor device is provided with a plurality of protrusions which are made of a resin and which protrude higher than electrodes, and conductive layers which are electrically connected to the electrodes and which cover the top surfaces of the protrusions. A method for manufacturing the semiconductor device includes a step of applying a layer of the resin to the semiconductor device except for the electrodes, a step of patterning the conductive layers on the electrodes and the layer of the resin in accordance with the protrusions, and a step of removing the layer of the resin located between the conductive layers by the use of the patterned conductive layers as masks so as to form the protrusions.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 1, 2015
    Inventor: Haruki ITO
  • Patent number: 9105534
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: August 11, 2015
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Publication number: 20150041992
    Abstract: A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.
    Type: Application
    Filed: October 23, 2014
    Publication date: February 12, 2015
    Inventors: Haruki ITO, Nobuaki HASHIMOTO
  • Publication number: 20140361434
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Application
    Filed: August 27, 2014
    Publication date: December 11, 2014
    Inventor: Haruki ITO
  • Patent number: 8896104
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: November 25, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Patent number: 8847406
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: September 30, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Publication number: 20140131890
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Application
    Filed: January 16, 2014
    Publication date: May 15, 2014
    Applicant: Seiko Epson Corporation
    Inventors: Haruki ITO, Nobuaki HASIMOTO
  • Patent number: 8673767
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: March 18, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Publication number: 20130264709
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Application
    Filed: June 3, 2013
    Publication date: October 10, 2013
    Inventor: Haruki ITO
  • Patent number: 8492856
    Abstract: An electronic component includes: a semiconductor substrate having a first surface and a second surface opposing to the first surface; a trans-substrate conductive plug that penetrates the semiconductor substrate from the first surface to the second surface; an electronic element provided in the vicinity of the first surface of the semiconductor; and a sealing member that seals the electronic element between the sealing member and the first surface, wherein the electronic element is electrically connected to the trans-substrate conductive plug.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: July 23, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Patent number: 8482121
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: July 9, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Patent number: 8294260
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: October 23, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Publication number: 20120261815
    Abstract: An electronic component includes: a semiconductor substrate having a first surface and a second surface opposing to the first surface; a trans-substrate conductive plug that penetrates the semiconductor substrate from the first surface to the second surface; an electronic element provided in the vicinity of the first surface of the semiconductor; and a sealing member that seals the electronic element between the sealing member and the first surface, wherein the electronic element is electrically connected to the trans-substrate conductive plug.
    Type: Application
    Filed: June 22, 2012
    Publication date: October 18, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Haruki ITO, Nobuaki HASHIMOTO
  • Patent number: 8227878
    Abstract: An electronic component includes: a semiconductor substrate having a first surface and a second surface opposing to the first surface; a trans-substrate conductive plug that penetrates the semiconductor substrate from the first surface to the second surface; an electronic element provided in the vicinity of the first surface of the semiconductor; and a sealing member that seals the electronic element between the sealing member and the first surface, wherein the electronic element is electrically connected to the trans-substrate conductive plug.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: July 24, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Patent number: 8183693
    Abstract: A semiconductor device includes n1 first interconnects (n is an integer larger than one) respectively formed on first electrodes and extending over a first resin protrusion, and n2 second interconnects (n2<n1) respectively formed on second electrodes and extending over a second resin protrusion. The first and second resin protrusions are formed of an identical material, have an identical width, and extend longitudinally. The first interconnects extends to intersect a longitudinal axis of the first resin protrusion, and each of the first interconnects has a first width W1 on the first resin protrusion. The second interconnects extends to intersect a longitudinal axis of the second resin protrusion, and each of the second interconnects has a second width W2 (W1<W2) on the second resin protrusion. The relationship W1×n1=W2×n2 is satisfied.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: May 22, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Shuichi Tanaka, Haruki Ito