Patents by Inventor Haruki Ito

Haruki Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110266690
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Application
    Filed: July 18, 2011
    Publication date: November 3, 2011
    Applicant: Seiko Epson Corporation
    Inventors: Haruki ITO, Nobuaki HASHIMOTO
  • Publication number: 20110233742
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Application
    Filed: June 9, 2011
    Publication date: September 29, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Haruki ITO
  • Patent number: 8012864
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: September 6, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Patent number: 8004077
    Abstract: A semiconductor device comprising: a substrate; a terminal on the substrate's first surface; a first electrode on the first surface connected to the terminal; an electronic element on the substrate's second surface; a second electrode connected to the electronic element; a groove on the second surface leading to the second electrode; a conductive portion inside the grove connected to the second electrode's rear face; a first wiring on the first surface connected to the first electrode; a second wiring connecting the first wiring and the terminal; a stress-absorbing layer between the substrate and terminal; a land connecting the first wiring and the second wiring, the land opening a part of the stress-absorbing layer and exposing the first wiring, the land being in a region surrounded by terminals, and the land being along a straight line connecting the centers of diagonal terminals, with the region between the terminals.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: August 23, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Patent number: 7982310
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: July 19, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Publication number: 20110062566
    Abstract: A semiconductor device comprising: a substrate; a terminal on the substrate's first surface; a first electrode on the first surface connected to the terminal; an electronic element on the substrate's second surface; a second electrode connected to the electronic element; a groove on the second surface leading to the second electrode; a conductive portion inside the grove connected to the second electrode's rear face; a first wiring on the first surface connected to the first electrode; a second wiring connecting the first wiring and the terminal; a stress-absorbing layer between the substrate and terminal; a land connecting the first wiring and the second wiring, the land opening a part of the stress-absorbing layer and exposing the first wiring, the land being in a region surrounded by terminals, and the land being along a straight line connecting the centers of diagonal terminals, with the region between the terminals.
    Type: Application
    Filed: November 17, 2010
    Publication date: March 17, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Haruki ITO, Nobuaki HASHIMOTO
  • Patent number: 7888799
    Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: February 15, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
  • Publication number: 20110018110
    Abstract: A semiconductor device includes n1 first interconnects (n is an integer larger than one) respectively formed on first electrodes and extending over a first resin protrusion, and n2 second interconnects (n2<n1) respectively formed on second electrodes and extending over a second resin protrusion. The first and second resin protrusions are formed of an identical material, have an identical width, and extend longitudinally. The first interconnects extends to intersect a longitudinal axis of the first resin protrusion, and each of the first interconnects has a first width W1 on the first resin protrusion. The second interconnects extends to intersect a longitudinal axis of the second resin protrusion, and each of the second interconnects has a second width W2 (W1<W2) on the second resin protrusion. The relationship W1×n1=W2×n2 is satisfied.
    Type: Application
    Filed: October 4, 2010
    Publication date: January 27, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Shuichi TANAKA, Haruki ITO
  • Patent number: 7851265
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: December 14, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Publication number: 20100295176
    Abstract: A semiconductor device is provided with a plurality of protrusions which are made of a resin and which protrude higher than electrodes, and conductive layers which are electrically connected to the electrodes and which cover the top surfaces of the protrusions. A method for manufacturing the semiconductor device includes a step of applying a layer of the resin to the semiconductor device except for the electrodes, a step of patterning the conductive layers on the electrodes and the layer of the resin in accordance with the protrusions, and a step of removing the layer of the resin located between the conductive layers by the use of the patterned conductive layers as masks so as to form the protrusions.
    Type: Application
    Filed: August 9, 2010
    Publication date: November 25, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Haruki ITO
  • Patent number: 7830007
    Abstract: A semiconductor device includes n1 first interconnects (n is an integer larger than one) respectively formed on first electrodes and extending over a first resin protrusion, and n2 second interconnects (n2<n1) respectively formed on second electrodes and extending over a second resin protrusion. The first and second resin protrusions are formed of an identical material, have an identical width, and extend longitudinally. The first interconnects extends to intersect a longitudinal axis of the first resin protrusion, and each of the first interconnects has a first width W1 on the first resin protrusion. The second interconnects extends to intersect a longitudinal axis of the second resin protrusion, and each of the second interconnects has a second width W2 (W1<W2) on the second resin protrusion. The relationship W1×n1=W2×n2 is satisfied.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: November 9, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Shuichi Tanaka, Haruki Ito
  • Publication number: 20100252829
    Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.
    Type: Application
    Filed: May 10, 2010
    Publication date: October 7, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Shuichi TANAKA, Haruki ITO, Yasuhito ARUGA, Ryohei TAMURA, Michiyoshi TAKANO
  • Patent number: 7795129
    Abstract: A semiconductor device is provided with a plurality of protrusions which are made of a resin and which protrude higher than electrodes, and conductive layers which are electrically connected to the electrodes and which cover the top surfaces of the protrusions. A method for manufacturing the semiconductor device includes a step of applying a layer of the resin to the semiconductor device except for the electrodes, a step of patterning the conductive layers on the electrodes and the layer of the resin in accordance with the protrusions, and a step of removing the layer of the resin located between the conductive layers by the use of the patterned conductive layers as masks so as to form the protrusions.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: September 14, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Patent number: 7741712
    Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: June 22, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
  • Publication number: 20100134993
    Abstract: An electronic component includes: a semiconductor substrate having a first surface and a second surface opposing to the first surface; a trans-substrate conductive plug that penetrates the semiconductor substrate from the first surface to the second surface; an electronic element provided in the vicinity of the first surface of the semiconductor; and a sealing member that seals the electronic element between the sealing member and the first surface, wherein the electronic element is electrically connected to the trans-substrate conductive plug.
    Type: Application
    Filed: January 28, 2010
    Publication date: June 3, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Haruki ITO, Nobuaki HASHIMOTO
  • Patent number: 7679153
    Abstract: An electronic component includes: a semiconductor substrate having a first surface and a second surface opposing to the first surface; a trans-substrate conductive plug that penetrates the semiconductor substrate from the first surface to the second surface; an electronic element provided in the vicinity of the first surface of the semiconductor; and a sealing member that seals the electronic element between the sealing member and the first surface, wherein the electronic element is electrically connected to the trans-substrate conductive plug.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: March 16, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Publication number: 20100019384
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Application
    Filed: September 29, 2009
    Publication date: January 28, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Haruki ITO
  • Patent number: 7615864
    Abstract: A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: November 10, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Patent number: 7566584
    Abstract: A method of manufacture of an electronic substrate, having a process of embedding electronic components in a substrate, and a process of ejecting liquid droplets containing a conductive material, to form a wiring pattern connected to the external connection electrodes of the electronic components embedded in the substrate.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: July 28, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito
  • Patent number: 7528476
    Abstract: A semiconductor device includes: a semiconductor substrate having an active surface and a back surface; an integrated circuit formed on the active surface; a feedthrough electrode penetrating the semiconductor substrate, and projecting from the active surface and the back surface; a first resin layer formed on the active surface, having a thickness greater than a height of a portion of the feedthrough electrode that projects from the active surface, and having an opening portion for exposing at least a portion of the feedthrough electrode; a wiring layer which is formed on the first resin layer, and which is connected to the feedthrough electrode through the opening portion; and an external connecting terminal connected to the wiring layer.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: May 5, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Haruki Ito