Patents by Inventor Haruo Nakazawa

Haruo Nakazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9892919
    Abstract: A first nickel film is deposited inside a contact hole of an interlayer dielectric formed on an n+-type SiC substrate. Irradiation with a first laser is carried out, forming an Ohmic contact with a silicon carbide semiconductor. A second nickel film and a front surface electrode film are deposited on the first nickel film, forming a source electrode. The back surface of the n+-type SiC substrate is ground, and a third nickel film is formed on the ground back surface of the n+-type SiC substrate. Irradiation with a second laser is carried out, forming an Ohmic contact with the silicon carbide semiconductor. A fourth nickel film and a back surface electrode film are deposited on the third nickel film, forming a drain electrode. By so doing, it is possible to prevent electrical characteristic deterioration of a semiconductor device, and to prevent warping and cracking of a wafer.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: February 13, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo Nakazawa, Masaaki Tachioka, Naoto Fujishima, Masaaki Ogino, Tsunehiro Nakajima, Kenichi Iguchi
  • Publication number: 20180006125
    Abstract: A semiconductor device having a voltage resistant structure in a first aspect of the present invention is provided, comprising a semiconductor substrate, a semiconductor layer on the semiconductor substrate, a front surface electrode above the semiconductor layer, a rear surface electrode below the semiconductor substrate, an extension section provided to a side surface of the semiconductor substrate, and a resistance section electrically connected to the front surface electrode and the rear surface electrode. The extension section may have a lower permittivity than the semiconductor substrate. The resistance section may be provided to at least one of the upper surface and the side surface of the extension section.
    Type: Application
    Filed: September 1, 2017
    Publication date: January 4, 2018
    Inventors: Koh YOSHIKAWA, Haruo NAKAZAWA, Kenichi IGUCHI, Yasukazu SEKI, Katsuya OKUMURA
  • Patent number: 9825145
    Abstract: When p-type impurities are implanted into a SiC substrate using a laser, controlling the concentration is difficult. A p-type impurity region is formed by a laser in a region where the control of the concentration in the SiC substrate is not necessary almost at all. A SiC semiconductor device having withstanding high voltage is manufactured at a lower temperature process compared to ion implantation process. A method of manufacturing a silicon carbide semiconductor device includes forming, on one main surface of a first conductivity-type silicon carbide substrate, a first conductivity-type drift layer having a lower concentration than that of the silicon carbide substrate; forming, on a front surface side of the drift layer, a second conductivity-type electric field control region by a laser doping technology; forming a Schottky electrode in contact with the drift layer; and forming, on the other main surface of the silicon carbide substrate, a cathode electrode.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: November 21, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Koh Yoshikawa, Haruo Nakazawa, Kenichi Iguchi, Yasukazu Seki
  • Patent number: 9786749
    Abstract: A semiconductor device having a voltage resistant structure in a first aspect of the present invention is provided, comprising a semiconductor substrate, a semiconductor layer on the semiconductor substrate, a front surface electrode above the semiconductor layer, a rear surface electrode below the semiconductor substrate, an extension section provided to a side surface of the semiconductor substrate, and a resistance section electrically connected to the front surface electrode and the rear surface electrode. The extension section may have a lower permittivity than the semiconductor substrate. The resistance section may be provided to at least one of the upper surface and the side surface of the extension section.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: October 10, 2017
    Assignees: FUJI ELECTRIC CO., LTD., Octec, Inc.
    Inventors: Koh Yoshikawa, Haruo Nakazawa, Kenichi Iguchi, Yasukazu Seki, Katsuya Okumura
  • Publication number: 20170278931
    Abstract: A method of manufacturing a semiconductor device includes assigning a plurality of chip regions on an epitaxial-growth layer of a semiconductor substrate where the epitaxial-growth layer is grown on a bulk layer and forming a plurality of device structures on the plurality of chip regions, respectively, thinning the semiconductor substrate from a bottom-surface side of the bulk layer, bonding a supporting-substrate on a bottom surface of the thinned semiconductor substrate, selectively removing the supporting-substrate so that the bottom surface of the semiconductor substrate is exposed, at locations corresponding to positions of each of main current paths in the plurality of device structures, respectively, dicing the semiconductor substrate together with the supporting-substrate along dicing lanes between the plurality of the chip regions so as to form a plurality of chips.
    Type: Application
    Filed: February 28, 2017
    Publication date: September 28, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi IGUCHI, Haruo NAKAZAWA
  • Publication number: 20170148882
    Abstract: A semiconductor device having a voltage resistant structure in a first aspect of the present invention is provided, comprising a semiconductor substrate, a semiconductor layer on the semiconductor substrate, a front surface electrode above the semiconductor layer, a rear surface electrode below the semiconductor substrate, an extension section provided to a side surface of the semiconductor substrate, and a resistance section electrically connected to the front surface electrode and the rear surface electrode. The extension section may have a lower permittivity than the semiconductor substrate. The resistance section may be provided to at least one of the upper surface and the side surface of the extension section.
    Type: Application
    Filed: September 29, 2016
    Publication date: May 25, 2017
    Inventors: Koh YOSHIKAWA, Haruo NAKAZAWA, Kenichi IGUCHI, Yasukazu SEKI, Katsuya OKUMURA
  • Patent number: 9659774
    Abstract: A method for introducing impurity into a semiconductor substrate includes bringing a solution containing a compound of an impurity element into contact with a primary surface of a semiconductor substrate; and irradiating the primary surface of the semiconductor substrate with a laser beam through the solution to raise a temperature of the primary surface of the semiconductor substrate at a position irradiated by the laser beam so as to dope the impurity element into the semiconductor substrate. The laser beam irradiation is performed such that the raised temperature does not return to room temperature until a prescribed dose of the impurity element is caused to be doped into the semiconductor substrate.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: May 23, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo Nakazawa, Kenichi Iguchi, Masaaki Ogino
  • Patent number: 9659775
    Abstract: Impurity elements are doped at a high concentration exceeding a thermodynamic equilibrium concentration into a solid material having an extremely small diffusion coefficient of the impurity element. A method for doping impurities includes steps for depositing source film made of material containing impurity elements with a film thickness on a surface of a solid target object (semiconductor substrate) made from the solid material. The film thickness is determined in consideration of irradiation time per light pulse and the energy density of the light pulse. The method also includes a step for irradiating the source film by the light pulse with the irradiation time and the energy density so as to dope the impurity elements into the target object at a concentration exceeding a thermodynamic equilibrium concentration.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: May 23, 2017
    Assignees: FUJI ELECTRIC CO., LTD., KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION
    Inventors: Akihiro Ikeda, Hiroshi Ikenoue, Tanemasa Asano, Kenichi Iguchi, Haruo Nakazawa, Koh Yoshikawa, Yasukazu Seki
  • Publication number: 20170054008
    Abstract: A semiconductor device is provided, the semiconductor device including a base layer of a first conductivity type having a MOS gate structure formed on a front surface side thereof, a collector layer of a second conductivity type formed on a rear surface side of the base layer, and into which a first dopant and a second dopant which is different from the first dopant are implanted, and a collector electrode formed on a rear surface side of the collector layer, wherein an impurity concentration peak of the second dopant is at a deeper position from the rear surface of the collector layer than an impurity concentration peak of the first dopant, and magnitude of the impurity concentration peak of the second dopant is larger than 1/100 of magnitude of the impurity concentration peak of the first dopant.
    Type: Application
    Filed: August 10, 2016
    Publication date: February 23, 2017
    Inventors: Toru MURAMATSU, Hong-fei LU, Haruo NAKAZAWA
  • Patent number: 9564334
    Abstract: A method of manufacturing a semiconductor device includes forming a device structure in a surface of a semiconductor substrate, forming, in a face of the semiconductor substrate, a transition metal layer that contacts the semiconductor substrate, and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves to cause the transition metal layer to generate heat. During exposure of the semiconductor substrate to the hydrogen plasma atmosphere, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of the heat from the transition metal layer, and an ohmic contact is formed at an interface of the transition metal layer and the semiconductor substrate by reaction of the transition metal layer and the semiconductor substrate. When the semiconductor substrate is silicon carbide, the ohmic contact is composed of a silicide, such as a transition metal silicide.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: February 7, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi Iguchi, Haruo Nakazawa, Tsunehiro Nakajima, Masaaki Ogino, Masaaki Tachioka
  • Patent number: 9548205
    Abstract: A method of manufacturing a semiconductor device that reduces degradation of device properties includes forming an impurity region in a surface layer of a semiconductor substrate by ion injection; forming a transition metal layer in a surface of the impurity region; and exposing the semiconductor substrate with the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves. The transition metal layer is heated and the heat is transferred from the transition metal layer to the impurity region to form an ohmic contact at the interface of the transition metal layer and the impurity region by reaction of the transition metal layer and the impurity region, and the impurity region is activated. When the substrate is a silicon carbide substrate, the ohmic contact is composed of a transition metal silicide and the impurity region, which is an ion injection layer, is activated.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: January 17, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo Nakazawa, Masaaki Ogino, Tsunehiro Nakajima, Kenichi Iguchi, Masaaki Tachioka
  • Publication number: 20160315169
    Abstract: When p-type impurities are implanted into a SiC substrate using a laser, controlling the concentration is difficult. A p-type impurity region is formed by a laser in a region where the control of the concentration in the SiC substrate is not necessary almost at all. A SiC semiconductor device having withstanding high voltage is manufactured at a lower temperature process compared to ion implantation process. A method of manufacturing a silicon carbide semiconductor device includes forming, on one main surface of a first conductivity-type silicon carbide substrate, a first conductivity-type drift layer having a lower concentration than that of the silicon carbide substrate; forming, on a front surface side of the drift layer, a second conductivity-type electric field control region by a laser doping technology; forming a Schottky electrode in contact with the drift layer; and forming, on the other main surface of the silicon carbide substrate, a cathode electrode.
    Type: Application
    Filed: March 10, 2016
    Publication date: October 27, 2016
    Inventors: Koh YOSHIKAWA, Haruo NAKAZAWA, Kenichi IGUCHI, Yasukazu SEKI
  • Publication number: 20160284547
    Abstract: An impurity-doping apparatus is provided with: a supporting plate which supports a semiconductor substrate; a wall-like block disposed above the supporting plate floating away from the semiconductor substrate, the wall-like block implements a recess inside so as to establish a space for a solution region containing impurity elements, the solution region is localized on an upper surface of the semiconductor substrate, the upper surface being opposite to an bottom surface facing to the supporting plate; and a laser optical system, configured to irradiate a laser beam onto the upper surface of the semiconductor substrate, through the solution region surrounded by the wall-like block, wherein the impurity elements are doped into a part of the semiconductor substrate by irradiation of the laser beam.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 29, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi IGUCHI, Haruo NAKAZAWA, Masaaki OGINO
  • Patent number: 9450070
    Abstract: A method for manufacturing a silicon semiconductor substrate including a diffusion layer prior to forming a semiconductor device thereon, includes providing a silicon semiconductor substrate which is manufactured by a floating zone method; and performing thermal diffusion at a heat treatment temperature that is equal to or higher than 1290° C. and that is lower than a melting temperature of a silicon crystal to form a diffusion layer with a depth of 50 ?m or more in the silicon semiconductor substrate, the thermal diffusion including a first heat treatment performed in an atmosphere consisting of oxygen or oxygen and at least one of argon, helium, or neon, followed by a second heat treatment performed in an atmosphere comprised of nitrogen or nitrogen and oxygen to form the diffusion layer. The method suppresses the occurrence of crystal defects, reduces the amount of inert gas used, and reduces manufacturing costs.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: September 20, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hideaki Teranishi, Haruo Nakazawa, Masaaki Ogino
  • Patent number: 9431270
    Abstract: A method for producing a semiconductor device is disclosed which includes a diffusion step of forming, on a CZ-FZ silicon semiconductor substrate, a deep diffusion layer involving a high-temperature and long-term thermal diffusion process which is performed at a thermal diffusion temperature of 1290° C. to a melting temperature of a silicon crystal for 100 hours or more; and a giving step of giving a diffusion source for an interstitial silicon atom to surface layers of two main surfaces of the silicon semiconductor substrate before the high-temperature, long-term thermal diffusion process. The step of giving the diffusion source for the interstitial silicon atom to the surface layers of the two main surfaces of the silicon semiconductor substrate is performed by forming thermally-oxidized films on two main surfaces of the silicon semiconductor substrate or by implanting silicon ions into surface layers of the two main surfaces of the silicon semiconductor substrate.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: August 30, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo Nakazawa, Masaaki Ogino, Hidenao Kuribayashi, Hideaki Teranishi
  • Publication number: 20160247681
    Abstract: Impurity elements are doped at a high concentration exceeding a thermodynamic equilibrium concentration into a solid material having an extremely small diffusion coefficient of the impurity element. A method for doping impurities includes steps for depositing source film made of material containing impurity elements with a film thickness on a surface of a solid target object (semiconductor substrate) made from the solid material. The film thickness is determined in consideration of irradiation time per light pulse and the energy density of the light pulse. The method also includes a step for irradiating the source film by the light pulse with the irradiation time and the energy density so as to dope the impurity elements into the target object at a concentration exceeding a thermodynamic equilibrium concentration.
    Type: Application
    Filed: February 24, 2016
    Publication date: August 25, 2016
    Applicants: KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION, FUJI ELECTRIC CO., LTD.
    Inventors: Akihiro IKEDA, Hiroshi Ikenoue, Tanemasa Asano, Kenichi Iguchi, Haruo Nakazawa, Koh Yoshikawa, Yasukazu Seki
  • Patent number: 9418852
    Abstract: A method of manufacturing a semiconductor device that sufficiently activates a deep ion injection layer and fully recovers lattice defects generated in the ion injection process. Laser light pulses are successively emitted to form substantially CW (continuous wave) laser light. This feature of the invention stably performs activation of a deep ion injection layer at about 2 ?s with few defects.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: August 16, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo Nakazawa, Motoyoshi Kubouchi
  • Publication number: 20160189967
    Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a front surface and a back surface; forming a transition metal layer in a surface of the semiconductor substrate; and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves, to cause the transition metal layer to generate heat, Thus, during the exposure of the semiconductor substrate, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of heat from the transition metal layer and, at an interface of the transition metal layer and the semiconductor substrate, an ohmic contact is formed by reaction of the transition metal layer and the semiconductor substrate, such as to form a transition metal silicide when the semiconductor substrate is silicon carbide. The ohmic contact provides a lower contact resistivity and device properties can be prevented from degrading.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo NAKAZAWA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI, Masaaki TACHIOKA, Kiyokazu NAKAGAWA
  • Publication number: 20160189968
    Abstract: A method of manufacturing a semiconductor device that reduces degradation of device properties includes forming an impurity region in a surface layer of a semiconductor substrate by ion injection; forming a transition metal layer in a surface of the impurity region; and exposing the semiconductor substrate with the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves. The transition metal layer is heated and the heat is transferred from the transition metal layer to the impurity region to form an ohmic contact at the interface of the transition metal layer and the impurity region by reaction of the transition metal layer and the impurity region, and the impurity region is activated. When the substrate is a silicon carbide substrate, the ohmic contact is composed of a transition metal silicide and the impurity region, which is an ion injection layer, is activated.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo NAKAZAWA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI, Masaaki TACHIOKA
  • Publication number: 20160189969
    Abstract: A method of manufacturing a semiconductor device includes forming a device structure in a surface of a semiconductor substrate, forming, in a face of the semiconductor substrate, a transition metal layer that contacts the semiconductor substrate, and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves to cause the transition metal layer to generate heat. During exposure of the semiconductor substrate to the hydrogen plasma atmosphere, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of the heat from the transition metal layer, and an ohmic contact is formed at an interface of the transition metal layer and the semiconductor substrate by reaction of the transition metal layer and the semiconductor substrate. When the semiconductor substrate is silicon carbide, the ohmic contact is composed of a silicide, such as a transition metal silicide.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi IGUCHI, Haruo NAKAZAWA, Tsunehiro NAKAJIMA, Masaaki OGINO, Masaaki TACHIOKA