Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

Abstract: Methods and apparatus to mount an optical waveguide to a substrate are disclosed. A disclosed method involves providing a substrate having a first layer and a second layer. The first layer includes at least one alignment fiducial and the second layer covers the at least one fiducial. At least a portion of the second layer is removed to render the fiducial visible and a waveguide is automatically aligned with the first fiducial. The waveguide is then fixed to the substrate.

Abstract: An apparatus including a first die mounted on a primary side of an electronic package and a second die mounted on a secondary side of the electronic package between the electronic package and a printed circuit board. The apparatus further comprising a thermal component thermally connected to the second die and mounted on the printed circuit board, the thermal component comprising a set of pins extending from a heat sink through a set of through-holes in the printed circuit board. A method including positioning a set of thermal connectors through a printed circuit board, the thermal connectors extending from a primary side of the printed circuit board to a secondary side of the printed circuit board opposite the primary side. The method further including thermally connecting the thermal connectors to a die positioned between an electronic package and the primary side of the printed circuit board to transfer heat from the die to the secondary side of the printed circuit board.

Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

Abstract: A method for aligning at least two photonic components over an interposer, and an optical package that may align such components. The method may include providing an interposer; fabricating electrical conductors passing from one surface of the interposer to an opposite surface of the interposer at selected contact positions; soldering the photonic components over the selected contact positions on the first surface, while allowing solder self-alignment. Other embodiments are described and claimed.

Abstract: An inductor structure comprised of a magnetic section and a single turn solenoid. The single turn solenoid to contain within a portion of the magnetic section and circumscribed by the magnetic section.

Abstract: In general, in one aspect, a method includes forming conductive layers on a wafer. A through cavity is formed in alignment with the conductive layers. The through cavity is to permit an optical signal from an optical waveguide within an optical connector to pass therethrough. Alignment holes are formed on each side of the through cavity to receive alignment pins. The wafer having the conductive layers, the through cavity in alignment with the conductive layers, and the alignment holes on each side of the through cavity forms an optical-electrical (O/E) interface. An O/E converter is mounted to the metal layers in alignment with the through cavity. The alignment pins and the alignment holes are used to passively align the optical waveguide and the O/E converter.

Abstract: A substrate may receive an integrated circuit and a flex circuit on the same side in the same vertical direction. In addition, in some embodiments, a flex circuit adapter and the integrated circuit may be surface mounted in one operation.

Abstract: An integrated circuit may be coupled to a printed circuit board through a split socket. The integrated circuit may be packaged with a package substrate electrically coupled to a socket which, in turn, is electrically coupled to a printed circuit board. Between the printed circuit board and the package substrate, on the same side as the package substrate as the socket, may be positioned a flexible substrate. The flexible substrate may include a flexible sheet-like member made of a polymer, in one embodiment, and a plurality of microscale springs which electrically couple said flexible substrate to the package substrate.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include placing an anisotropic conductive layer comprising at least one compliant conductive sphere on at least one interconnect structure disposed on a first substrate, applying pressure to contact the compliant conductive spheres to the at least one interconnect structure, removing a portion of the anisotropic conductive layer to expose at least one of the compliant conductive spheres; and then attaching a second substrate to the anisotropic conductive layer.

Abstract: In one embodiment, the present invention includes a coreless substrate to provide a power net connection and a ground net connection to a semiconductor die, which is electrically coupled to the substrate, and a stiffener surrounding the semiconductor die and electrically coupled to the substrate to provide a lateral current path to the semiconductor die. Other embodiments are described and claimed.

Abstract: A hybrid memory interconnect system involving flexible cable and board interconnects is provided for improved memory bandwidth and power efficiency performance. To this purpose, signals between a microprocessor chip and one or more memory chips are routed via separate conductive paths, e.g. flexible cable for high-speed signals and conventional board interconnects for low-speed signals. The memory chips may be connected to a flexible cable and a supporting printed circuit board in various ways.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include placing an anisotropic conductive layer comprising at least one compliant conductive sphere on at least one interconnect structure disposed on a first substrate, applying pressure to contact the compliant conductive spheres to the at least one interconnect structure, removing a portion of the anisotropic conductive layer to expose at least one of the compliant conductive spheres; and then attaching a second substrate to the anisotropic conductive layer.

Abstract: An apparatus including a first die mounted on a primary side of an electronic package and a second die mounted on a secondary side of the electronic package between the electronic package and a printed circuit board. The apparatus further comprising a thermal component thermally connected to the second die and mounted on the printed circuit board, the thermal component comprising a set of pins extending from a heat sink through a set of through-holes in the printed circuit board. A method including positioning a set of thermal connectors through a printed circuit board, the thermal connectors extending from a primary side of the printed circuit board to a secondary side of the printed circuit board opposite the primary side. The method further including thermally connecting the thermal connectors to a die positioned between an electronic package and the primary side of the printed circuit board to transfer heat from the die to the secondary side of the printed circuit board.

Abstract: Methods and apparatus to optically couple an optoelectronic chip to a waveguide are disclosed. A disclosed apparatus includes a substrate, a waveguide mounted on the substrate and an optoelectronic chip bonded to the substrate and having an optical element directly engaging the waveguide.

Abstract: A split microprocessor socket is disclosed that provides a cavity created at an outer edge of the microprocessor socket. An optical module may be fitted in the cavity thus providing an optical fiber or waveguide connection directly to the socket. This low cost optical interconnect, closely packaged with the microprocessor, may alleviate bandwidth constraints associated with conventional electrical connections.

Abstract: A coupler is passively aligned over a substrate, wherein the coupler is laterally aligned to an optoelectronic (OE) device coupled to the substrate. The coupler is placed on the substrate, wherein the coupler is vertically aligned to the OE device. The coupler is fixed to the substrate.

Abstract: Micro-displays used for front or rear projection systems as well as near-eye viewing systems may be enhanced using embodiments of the present invention. In one embodiment, the invention may include an array of micromechanical optical modulators, an electronic control system for operating the optical modulators in accordance with a received video signal, and an overlayer for the array of modulators to modify the fill factor for incident light on the array of modulators, the incident light corresponding to at least one color constituent of a video signal.

Abstract: Optical packages are disclosed. In one aspect, an optical package may include a surface, a microelectronic device coupled with the surface, a first waveguide coupled with the microelectronic device, a second waveguide having a first end that is evanescently coupled with the first waveguide and a second end, a first thickness of a cladding material disposed between the second end and the surface, and a second thickness of a cladding material disposed between the first end and the first waveguide. The first thickness may be greater than the second thickness. Methods of making the optical packages are also disclosed. Apparatus and methods of aligning operations on optical packages are also disclosed.