Patents by Inventor Henning Braunisch

Henning Braunisch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • THERMAL MANAGEMENT IN PACKAGED VCSELS
    Publication number: 20140314111
    Abstract: Heat management systems for vertical cavity surface emitting laser (VCSEL) chips are provided. Embodiments of the invention provide substrates having, a vertical cavity surface emitting laser chip disposed on the substrate surface and electrically interconnected with the substrate, a thermal frame disposed on the substrate surface and proximate to at least three sides of the vertical cavity surface emitting laser chip, and a thermal interface material disposed between the at least three sides of the vertical cavity surface emitting laser chip and the thermal frame. The substrate can also include a transceiver chip that is operably coupled to a further integrated circuit chip and that is capable of driving the VCSEL chip.
    Type: Application
    Filed: November 18, 2011
    Publication date: October 23, 2014
    Inventors: Feras Eid, Shawna M. Liff, Henning Braunisch
  • MAGNETIC CORE INDUCTOR (MCI) STRUCTURES FOR INTEGRATED VOLTAGE REGULATORS
    Publication number: 20140264732
    Abstract: Semiconductor packages including magnetic core inductor (MCI) structures for integrated voltage regulators are described. In an example, a semiconductor package includes a package substrate and a semiconductor die coupled to a first surface of the package substrate. The semiconductor die has a first plurality of metal-insulator-metal (MIM) capacitor layers thereon. The semiconductor package also includes a magnetic core inductor (MCI) die coupled to a second surface of the package substrate. The MCI die includes one or more slotted inductors and has a second plurality of MIM capacitor layers thereon.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: Adel A. Elsherbini, Kevin P. O'Brien, Henning Braunisch, Krishna Bharath
  • OPTICAL I/O SYSTEM USING PLANAR LIGHT-WAVE INTEGRATED CIRCUIT
    Publication number: 20140203175
    Abstract: Photonic components are placed on the processor package to bring the optical signal close to the processor die. The processor package includes a substrate to which the processor die is coupled, and which allows the processor die to connect to a printed circuit board. The processor package also includes transceiver logic, electrical-optical conversion circuits, and an optical coupler. The electrical-optical conversion circuits can include laser(s), modulator(s), and photodetector(s) to transmit and receive and optical signal. The coupler interfaces to a fiber that extends off the processor package. Multiple fibers can be brought to the processor package allowing for a scalable high-speed, high-bandwidth interconnection to the processor.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 24, 2014
    Inventors: Mauro J. Kobrinsky, Henning Braunisch, Shawna M. Liff, Peter L. Chang, Bruce A. Block, Johanna M. Swan
  • ELECTRO-OPTICAL ASSEMBLY INCLUDING A GLASS BRIDGE
    Publication number: 20140177625
    Abstract: Embodiments of the present disclosure provide techniques and configurations for routing signals of an electro-optical assembly using a glass bridge. In one embodiment, an electro-optical assembly includes a laser die having a laser device and a glass bridge electrically coupled with the laser die by one or more interconnect structures, the glass bridge including electrical routing features configured to route electrical signals to the laser die from a transmitter device. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 26, 2014
    Inventors: Peter L.D. Chang, Edris M. Mohammed, Henning Braunisch, Hengju Cheng
  • IN-STREET DIE-TO-DIE INTERCONNECTS
    Publication number: 20140120696
    Abstract: The present disclosure relates to the field of microelectronic die packaging, particularly multi-chip packaging, wherein on-substrate modularity is enabled by using in-street die-to-die interconnects to facilitate signal routing between microelectronic dice. These in-street die-to-die interconnects may allow for manufacturing of several products on a single microelectronic substrate, which may lead to improved microelectronic die and/or microelectronic module harvesting and increased product yields.
    Type: Application
    Filed: January 3, 2014
    Publication date: May 1, 2014
    Inventors: Aleksandar Aleksov, Arnab Sarkar, Henning Braunisch, Jerry R. Bautista
  • OPTICAL CONNECTION TECHNIQUES AND CONFIGURATIONS
    Publication number: 20130272649
    Abstract: Embodiments of the present disclosure provide optical connection techniques and configurations. In one embodiment, an apparatus includes a receptacle for mounting on a surface of a package substrate, the receptacle having a pluggable surface to receive an optical coupler plug such that the optical coupler plug is optically aligned with one or more optical apertures of an optoelectronic assembly that is configured to emit and/or receive light using the one or more optical apertures in a direction that is substantially perpendicular to the surface of the package substrate when the optoelectronic assembly is affixed to the package substrate. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: November 16, 2011
    Publication date: October 17, 2013
    Inventors: Henning Braunisch, Shawna M. Liff, Peter L. Chang
  • Multimode signaling on decoupled input/output and power channels
    Patent number: 8450201
    Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: May 28, 2013
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Kemal Aygun
  • MULTI-CHIP PACKAGE AND METHOD OF PROVIDING DIE-TO-DIE INTERCONNECTS IN SAME
    Publication number: 20120261838
    Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).
    Type: Application
    Filed: June 25, 2012
    Publication date: October 18, 2012
    Inventors: Henning Braunisch, Chia-Pin Chiu, Aleksandar Aleksov, Hinmeng Au, Stefanie M. Lotz, Johanna M. Swan, Sujit Sharan
  • Method of mounting an optical device
    Patent number: 8230589
    Abstract: A method for aligning at least two photonic components over an interposer, and an optical package that may align such components. The method may include providing an interposer; fabricating electrical conductors passing from one surface of the interposer to an opposite surface of the interposer at selected contact positions; soldering the photonic components over the selected contact positions on the first surface, while allowing solder self-alignment. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: July 31, 2012
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Johanna Swan, Henning Braunisch
  • Multi-chip package and method of providing die-to-die interconnects in same
    Patent number: 8227904
    Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: July 24, 2012
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Chia-Pin Chiu, Aleksandar Aleksov, Hinmeng Au, Stefanie M. Lotz, Johanna M. Swan, Sujit Sharan
  • Input/output package architectures
    Patent number: 8188594
    Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: May 29, 2012
    Assignee: Intel Corporation
    Inventors: Sanka Ganesan, Kemal Aygun, Chandrashekhar Ramaswamy, Eric Palmer, Henning Braunisch
  • IN-STREET DIE-TO-DIE INTERCONNECTS
    Publication number: 20120007211
    Abstract: The present disclosure relates to the field of microelectronic die packaging, particularly multi-chip packaging, wherein on-substrate modularity is enabled by using in-street die-to-die interconnects to facilitate signal routing between microelectronic dice. These in-street die-to-die interconnects may allow for manufacturing of several products on a single microelectronic substrate, which may lead to improved microelectronic die and/or microelectronic module harvesting and increased product yields.
    Type: Application
    Filed: July 6, 2010
    Publication date: January 12, 2012
    Inventors: Aleksandar Aleksov, Arnab Sarkar, Henning Braunisch, Jerry R. Bautista
  • Multimode Signaling on Decoupled Input/Output and Power Channels
    Publication number: 20110247195
    Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.
    Type: Application
    Filed: June 24, 2011
    Publication date: October 13, 2011
    Inventors: Henning Braunisch, Kemal Aygun
  • Multimode signaling on decoupled input/output and power channels
    Patent number: 7989946
    Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: August 2, 2011
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Kemal Aygun
  • Multimode Signaling on Decoupled Input/Output and Power Channels
    Publication number: 20110019386
    Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.
    Type: Application
    Filed: September 15, 2010
    Publication date: January 27, 2011
    Inventors: Henning Braunisch, Kemal Aygun
  • Multi-chip package and method of providing die-to-die interconnects in same
    Publication number: 20100327424
    Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).
    Type: Application
    Filed: June 24, 2009
    Publication date: December 30, 2010
    Inventors: Henning Braunisch, Chia-Pin Chiu, Aleksandar Aleksov, Hinmeng Au, Stefanie M. Lotz, Johanna M. Swan, Sujit Sharan
  • Multimode signaling on decoupled input/output and power channels
    Patent number: 7816779
    Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: October 19, 2010
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Kemal Aygun
  • Wafer based optical interconnect
    Patent number: 7720337
    Abstract: In general, in one aspect, a method includes forming conductive layers on a wafer. A through cavity is formed in alignment with the conductive layers. The through cavity is to permit an optical signal from an optical waveguide within an optical connector to pass therethrough. Alignment holes are formed on each side of the through cavity to receive alignment pins. The wafer having the conductive layers, the through cavity in alignment with the conductive layers, and the alignment holes on each side of the through cavity forms an optical-electrical (O/E) interface. An O/E converter is mounted to the metal layers in alignment with the through cavity. The alignment pins and the alignment holes are used to passively align the optical waveguide and the O/E converter.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: May 18, 2010
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Henning Braunisch
  • Flip-chip mountable optical connector for chip-to-chip optical interconnectability
    Patent number: 7703991
    Abstract: An optical connector comprises a housing having a cavity extending there through to accept a mating connector. The connector comprises no optical components. Dummy solder bonding pads positioned on the connector allow the connector to be automated flip-chip bonded over a substrate waveguide.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: April 27, 2010
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Gilroy J. Vandentop, Henning Braunisch
  • Input/output package architectures, and methods of using same
    Patent number: 7705447
    Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: April 27, 2010
    Assignee: Intel Corporation
    Inventors: Sanka Ganesan, Kemal Aygun, Chandrashekhar Ramaswamy, Eric Palmer, Henning Braunisch