Patents by Inventor Henry Descalzo Bathan

Henry Descalzo Bathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120068318
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package paddle having a hole, a recess, and a pad, the hole over the recess; mounting an integrated circuit to the package paddle; forming a lead having a bottom surface coplanar with a bottom surface of the pad, the lead isolated from the package paddle; attaching connectors directly on the integrated circuit, the lead, and the package paddle; and forming an encapsulation covering the integrated circuit and within the hole and the recess.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 22, 2012
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu
  • Patent number: 8138595
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an elevated contact above and between a lead and a die pad that is coplanar with the lead; connecting an integrated circuit and the lead; attaching a jumper interconnect between the elevated contact and the lead; and forming an encapsulant over the integrated circuit, the lead, the die pad, the elevated contact, and the jumper interconnect, the encapsulant having a recess in a base side with the elevated contact exposed in the recess and the lead exposed from the base side.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: March 20, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • Publication number: 20120064668
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base lead having an outer protrusion and an inner protrusion with a recess in between; forming a stack lead having an elongated portion; mounting a base integrated circuit over the inner protrusion or under the elongated portion; mounting the stack lead over the base lead and the base integrated circuit; connecting a stack integrated circuit and the stack lead with the stack integrated circuit over the base integrated circuit; and encapsulating at least a portion of both the base integrated circuit and the stack integrated circuit with the base lead and the stack lead exposed.
    Type: Application
    Filed: November 18, 2011
    Publication date: March 15, 2012
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Patent number: 8120150
    Abstract: An integrated circuit package system includes: forming a die-attach paddle, a terminal pad, and an external interconnect with the external interconnect below the terminal pad; connecting an integrated circuit die with the terminal pad and the external interconnect; and forming an encapsulation, having a first side and a second side at an opposing side to the first side, surrounding the integrated circuit die with the terminal pad exposed at the first side and the external interconnect extending below the second side.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: February 21, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Guruprasad Badakere Govindaiah, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Patent number: 8115305
    Abstract: An integrated circuit package system is provided including attaching an external interconnect on a tape; attaching a backside element on the tape adjacent to the external interconnect; attaching an integrated circuit die with the backside element, the backside element is on a first passive side of the integrated circuit die; connecting a first active side of the integrated circuit die and the external interconnect; and forming a first encapsulation over the integrated circuit die with the backside element exposed.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: February 14, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Abelardo Hadap Advincula, Lionel Chien Hui Tay
  • Patent number: 8106499
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base conductive material on opposite sides of the base substrate; connecting an internal interconnect having a substantially spherical shape on the base substrate; forming a top substrate having a top conductive material on opposite sides of the top substrate with an upper component thereon facing the base substrate; and attaching the top substrate on the internal interconnect.
    Type: Grant
    Filed: June 20, 2009
    Date of Patent: January 31, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Patent number: 8106502
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an external interconnect; forming a first planar terminal adjacent to the external interconnect and non-planar to a portion the external interconnect; mounting a first integrated circuit over the first planar terminal; connecting the first integrated circuit with the external interconnect; and forming an encapsulation over the first planar terminal covering the first integrated circuit and with the external interconnect extending from a non-horizontal side of the encapsulation and with the first planar terminal coplanar with the adjacent portion of the encapsulation exposing the first planar terminal.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: January 31, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Lionel Chien Hui Tay
  • Publication number: 20120018865
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a leadframe having an upper structure, upper protrusions, and a base side facing away from the upper structure and the upper protrusions; forming tie bars in the leadframe with an opening surrounding the upper structure, the tie bars connected to the upper structure and exposed on the base side; connecting an integrated circuit to the upper protrusions; applying an encapsulant over the integrated circuit, over the upper structure, and in the opening with the base side exposed; removing the tie bars exposing a first surface and a second surface of the encapsulant below the first surface, and forming a die paddle from the upper structure and exposed from the second surface; and removing the leadframe from the base side forming island terminals from the upper protrusions exposed from the second surface and isolated from the die paddle.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 26, 2012
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu
  • Publication number: 20120018866
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package paddle having an upper hole below a paddle top side, the upper hole bounded by an upper non-horizontal side with a curve surface; forming a terminal adjacent the package paddle; mounting an integrated circuit on the paddle top side; and forming an encapsulation within the upper hole.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 26, 2012
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu, Byung Tai Do, Arnel Senosa Trasporto, Linda Pei Ee Chua
  • Patent number: 8080867
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base lead having an outer protrusion and an inner protrusion with a recess in between; forming a stack lead having an elongated portion; mounting a base integrated circuit over the inner protrusion or under the elongated portion; mounting the stack lead over the base lead and the base integrated circuit; connecting a stack integrated circuit and the stack lead with the stack integrated circuit over the base integrated circuit; and encapsulating at least a portion of both the base integrated circuit and the stack integrated circuit with the base lead and the stack lead exposed.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: December 20, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Publication number: 20110298113
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a lead frame having contact pads and connection leads; coupling a base integrated circuit to the contact pads; coupling a chip interconnect between the base integrated circuit, the connection leads, the contact pads, or a combination thereof; molding a package body on the connection leads, the base integrated circuit, and the chip interconnects, including having the contact pads exposed; and forming a bottom surface on the package body including forming the connection leads to be coplanar with the bottom surface.
    Type: Application
    Filed: August 15, 2011
    Publication date: December 8, 2011
    Inventors: Frederick Rodriguez Dahilig, Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Patent number: 8072047
    Abstract: An integrated circuit package system includes: providing a tie bar and a lead adjacent thereto; connecting an integrated circuit and the lead; mounting a shield over the integrated circuit with the shield connected to the tie bar; and encapsulating the integrated circuit and the shield. An integrated circuit package system also includes: forming a lead and a support structure with substantially the same material as the lead and elevated above the lead; connecting an integrated circuit and the lead; mounting a shield over the integrated circuit with the shield on the support structure; and encapsulating the integrated circuit and the shield.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: December 6, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Henry Descalzo Bathan, Guruprasad Badakere Govindaiah
  • Publication number: 20110291251
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a first lead adjacent and staggered to a second lead, the first lead having a first external connection portion with a first external conductive layer and a first internal connection portion, the first external connection portion oriented laterally outwards from the first internal connection portion, and the second lead having a second external connection portion with a second external conductive layer and a second internal connection portion; connecting an integrated circuit device with the first internal connection portion and with the second internal connection portion; forming an encapsulation over the integrated circuit device with the first lead and the second lead exposed; and forming a solder mask on the encapsulation, on the first lead, and on the second lead with the first external conductive layer and the second external conductive layer exposed from the solder mask.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu
  • Patent number: 8067825
    Abstract: An integrated circuit package system includes providing die; forming leads adjacent the die; forming a die paddle adjacent the leads with the die thereover; and forming a cavity for isolating one of the die and a die attach segment of the die paddle.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: November 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Abelardo Jr. Hadap Advincula, Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Publication number: 20110284999
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a lead frame having a die attach paddle, an isolated pad, and a connector; attaching an integrated circuit die to the die attach paddle and the connector; forming an encapsulation over the integrated circuit die, the connector, the die attach paddle, and the isolated pad; and singulating the connector and the die attach paddle whereby the isolated pads are electrically isolated.
    Type: Application
    Filed: August 3, 2011
    Publication date: November 24, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jose Alvin Caparas
  • Patent number: 8062934
    Abstract: An integrated circuit package system comprising: forming leads adjacent a die paddle having a die pad extension; forming a region having one of the leads depopulated for the die pad extension; and connecting an integrated circuit die to the die pad extension.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: November 22, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Jeffrey D. Punzalan, Henry Descalzo Bathan, Zigmund Ramirez Camacho
  • Patent number: 8043894
    Abstract: An integrated circuit package system includes forming a first external interconnect having both a first side and a second side that is an opposing side to the first side; forming a first encapsulation around a first integrated circuit and the first external interconnect with the first side, the second side, and the first active side of the first integrated circuit exposed; forming a planar interconnect between the first active side and the second side; forming a second encapsulation covering the planar interconnect and the first active side; connecting a second integrated circuit over the first integrated circuit and the first side; and forming a top encapsulation over the second integrated circuit.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: October 25, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Lionel Chien Hui Tay, Zigmund Ramirez Camacho, Henry Descalzo Bathan
  • Patent number: 8039947
    Abstract: An integrated circuit package system is provided including forming a first inner lead having a first inner bottom side and a first outer lead, forming a first side lock of the first inner lead above the first inner bottom side, connecting an integrated circuit die with the first inner lead and the first outer lead, and encapsulating the integrated circuit die and the first side lock.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: October 18, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Jeffrey D. Punzalan, Henry Descalzo Bathan, Zigmund Ramirez Camacho
  • Publication number: 20110233752
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an elevated contact above and between a lead and a die pad that is coplanar with the lead; connecting an integrated circuit and the lead; attaching a jumper interconnect between the elevated contact and the lead; and forming an encapsulant over the integrated circuit, the lead, the die pad, the elevated contact, and the jumper interconnect, the encapsulant having a recess in a base side with the elevated contact exposed in the recess and the lead exposed from the base side.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 29, 2011
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • Publication number: 20110233753
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a paddle, an inner post adjacent to the paddle, a jumper pad, and an outer post, with the jumper pad between the inner post and the outer post; mounting an integrated circuit over a paddle first side, the paddle first side co-planar with the outer post; connecting a first jumper interconnect between the integrated circuit and the jumper pad; connecting a second jumper interconnect between the jumper pad and the outer post; and forming an encapsulation over paddle, the integrated circuit, the first jumper interconnect, the jumper pad, and the second jumper interconnect.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 29, 2011
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan