Patents by Inventor Henry Descalzo Bathan

Henry Descalzo Bathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110227211
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base panel having a first side with a cavity and a second side opposite the first side; connecting an integrated circuit device and the first side; applying a resist mask having an opening on the second side, the opening offset from the cavity; forming a bump contact in the opening; applying an encapsulation in the cavity over the integrated circuit device and the first side; and forming a package lead by removing a portion of the base panel under the cavity, a flared tip of the package lead intersecting a base side of the encapsulation.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 22, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu
  • Patent number: 8022514
    Abstract: An integrated circuit package system including forming a leadframe having a lead with a leadfinger support of a predetermined height, and attaching an integrated circuit die with an electrical interconnect at a predetermined collapse height determined by the predetermined height of the leadfinger support.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: September 20, 2011
    Assignee: STATS ChipPAC Ltd.
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Arnel Senosa Trasporto, Jeffrey D. Punzalan
  • Patent number: 8022539
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a lead frame having contact pads and connection leads; coupling a base integrated circuit to the contact pads; coupling a chip interconnect between the base integrated circuit, the connection leads, the contact pads, or a combination thereof; molding a package body on the connection leads, the base integrated circuit, and the chip interconnects, including having the contact pads exposed; and forming a bottom surface on the package body including forming the connection leads to be coplanar with the bottom surface.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: September 20, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Frederick Rodriguez Dahilig, Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Patent number: 7998790
    Abstract: A method of manufacture of an integrated circuit die packaging system includes: providing a lead frame having a die attach paddle, an isolated pad, and a connector; attaching an integrated circuit die to the die attach paddle and the connector; forming an encapsulation over the integrated circuit die, the connector, the die attach paddle, and the isolated pad; and singulating the connector and the die attach paddle whereby the isolated pads are electrically isolated.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 16, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jose Alvin Caparas
  • Publication number: 20110180928
    Abstract: An integrated circuit package system includes: interconnection pads; a first device mounted below the interconnection pads; a bond wire, or a solder ball connecting the first device to the interconnection pads; a lead connected to the interconnection pad or to the first device; an encapsulation having a top surface encapsulating the first device; and a recess in the top surface of the encapsulation with the interconnection pads exposed therefrom.
    Type: Application
    Filed: April 5, 2011
    Publication date: July 28, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Publication number: 20110169151
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a lead having an upper portion and a bottom portion with a first overhang portion from a top surface of the upper portion and the lead also having serrations along upper vertical sides intersecting the top surface; forming an upper contact plate on the top surface; forming a bottom contact plate on a bottom surface of the bottom portion; attaching an integrated circuit die over the upper portion; and encapsulating the upper portion and the integrated circuit die with an encapsulation leaving the bottom portion exposed.
    Type: Application
    Filed: December 6, 2010
    Publication date: July 14, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu
  • Patent number: 7977778
    Abstract: An integrated circuit package system is provided including forming an integrated circuit die, forming an interference-fit feature in the integrated circuit die, fitting a support element within the interference-fit feature, connecting an external interconnect and the integrated circuit die, and encapsulating the integrated circuit die.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: July 12, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Henry Descalzo Bathan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Patent number: 7977779
    Abstract: A mountable integrated circuit package-in-package system includes: providing an interface integrated circuit package system with a terminal having a plated bumped portion of an inner encapsulation; mounting the interface integrated circuit package system over a package carrier with the terminal facing away from the package carrier; connecting the package carrier and a pad extension of the terminal; and forming a package encapsulation over the interface integrated circuit package system with the terminal exposed.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: July 12, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Arnel Senosa Trasporto, Lionel Chien Hui Tay, Henry Descalzo Bathan
  • Publication number: 20110140251
    Abstract: A method of manufacture of an integrated circuit package system includes providing a first frame having a first removable backing element connecting a first die attach pad and a first plurality of terminal leads. A first die is attached to the first die attach pad. A substrate is provided. A second die is attached to the substrate. The first die is attached to the second die with a plurality of die interconnects. The first removable backing element is removed after connecting the first die to the second die.
    Type: Application
    Filed: December 10, 2009
    Publication date: June 16, 2011
    Inventors: Zigmund Ramirez Camacho, Dioscoro A. Merilo, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Publication number: 20110140287
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a device over a substrate including a bond wire pad row located between a perimeter of the substrate and the device; configuring the bond wire pad row to include three sided bond wire pads that horizontally overlap; and forming an interconnection between the device and the bond wire pad row.
    Type: Application
    Filed: December 14, 2009
    Publication date: June 16, 2011
    Inventors: Henry Descalzo Bathan, Jairus Legaspi Pisigan, Zigmund Ramirez Camacho
  • Publication number: 20110127653
    Abstract: A method of manufacture of a package system includes: providing a base package substrate having conductive elements; providing an internal stacking module having a semiconductor die mounted on a package substrate and a first encapsulant surrounding at least portions of the semiconductor die and the package substrate; covering at least portions of the first encapsulant in the internal stacking module with an electromagnetic interference shield, the electromagnetic interference shield shaped to have an outside face; mounting the internal stacking module over the base package substrate with the outside face of the electromagnetic interference shield facing the base package substrate; and encapsulating at least portions of the internal stacking module, the electromagnetic interference shield, and the base package substrate using a second encapsulant.
    Type: Application
    Filed: December 2, 2009
    Publication date: June 2, 2011
    Inventors: Reza Argenty Pagaila, Zigmund Ramirez Camacho, Henry Descalzo Bathan
  • Publication number: 20110127661
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming external interconnects having bases of a first thickness and tips of a second thickness extending inwardly directly toward each other; connecting a first circuit device between the tips; attaching a second circuit device to the first circuit device with a combined thickness of the first circuit device and the second circuit device less than the first thickness; and forming an encapsulation of the first thickness between the bases and over the tips.
    Type: Application
    Filed: December 2, 2009
    Publication date: June 2, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Publication number: 20110115065
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a planar support structure having a cavity; forming a terminal within the cavity with the terminal coplanar with the planar support structure; forming a conductive pathway on the terminal and the planar support structure with the conductive pathway having a route portion and an interconnect attach portion at the end of the route portion; connecting a device and the interconnect attach portion with the interconnect attach portion towards the device; and forming an encapsulation over the planar support structure covering the conductive pathway and the device.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 19, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Allan P. Ilagan, Philip Lyndon Cablao
  • Publication number: 20110108966
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a conductive layer having a first surface and a second surface; forming first concave trenches in the first surface of the conductive layer and the first concave trenches are connected by a first flat region of the first surface; connecting an integrated circuit to the first flat region with a conductive interconnect; encapsulating the integrated circuit with an encapsulation that fills the first concave trenches; and forming second concave trenches having a similar size in the second surface of the conductive layer with the second concave trenches connected by a second flat region that is larger than the first flat region, and the second concave trenches are formed through the conductive layer to expose the encapsulation.
    Type: Application
    Filed: March 23, 2010
    Publication date: May 12, 2011
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Emmanuel Espiritu
  • Publication number: 20110101542
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base lead having an outer protrusion and an inner protrusion with a recess in between; forming a stack lead having an elongated portion; mounting a base integrated circuit over the inner protrusion or under the elongated portion; mounting the stack lead over the base lead and the base integrated circuit; connecting a stack integrated circuit and the stack lead with the stack integrated circuit over the base integrated circuit; and encapsulating at least a portion of both the base integrated circuit and the stack integrated circuit with the base lead and the stack lead exposed.
    Type: Application
    Filed: October 29, 2009
    Publication date: May 5, 2011
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Patent number: 7932130
    Abstract: An integrated circuit package system includes: providing a die attach paddle with interconnection pads connected to a bottom surface of the die attach paddle; connecting a first device to the interconnection pads with a bond wire; connecting a lead to the interconnection pad or to the first device; encapsulating the first device and the die attach paddle with an encapsulation having a top surface; and etching the die attach paddle leaving a recess in the top surface of the encapsulation.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: April 26, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Publication number: 20110079885
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a package lead having a retention structure around a perimeter of the package lead with a first concave surface, a ridge, and a second concave surface; forming a die attach paddle adjacent the package lead and having an another retention structure around a perimeter of the die attach paddle with an another first concave surface, an another ridge, and an another second concave surface; attaching an integrated circuit die to the die attach paddle; connecting a conductive connector to the integrated circuit die and the package lead; and applying an encapsulation over the integrated circuit die, the encapsulation conformed to the retention structure and exposing a portion of the package lead.
    Type: Application
    Filed: August 13, 2010
    Publication date: April 7, 2011
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • Publication number: 20110079888
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a lead-frame having a die attach paddle and a contact pad connected by a link; mounting an integrated circuit die over the die attach paddle; molding a package body on the lead-frame and the integrated circuit die including leaving portions of the die attach paddle, the contact pad, and the link exposed from the package body; forming an exposed edge by etching away the link between the contact pad, and the die attach paddle; and depositing a solder-resistant layer on the exposed edge.
    Type: Application
    Filed: September 24, 2010
    Publication date: April 7, 2011
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Emmanuel Espiritu, Jeffrey D. Punzalan
  • Publication number: 20110079886
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package paddle; forming a pad extension having a spacing to the package paddle; forming a lead adjacent the pad extension, the pad extension between the package paddle and the lead; forming a conductive layer directly on and between the package paddle and the pad extension; and connecting an integrated circuit to the pad extension and the lead, the integrated circuit over the package paddle.
    Type: Application
    Filed: August 18, 2010
    Publication date: April 7, 2011
    Inventors: Henry Descalzo Bathan, Flynn Carson, Zigmund Ramirez Camacho, Emmanuel Espiritu
  • Patent number: 7919848
    Abstract: An integrated circuit package system includes: forming a die-attach paddle, an outer interconnect, and an inner interconnect toward the die-attach paddle beyond the outer interconnect; mounting an integrated circuit device over the die-attach paddle; connecting the integrated circuit device to the inner interconnect and the outer interconnect; encapsulating the integrated circuit device over the die-attach paddle; attaching an external interconnect under the outer interconnect; and attaching a circuit device under the die-attach paddle and extended laterally beyond opposite sides of the die-attach paddle.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: April 5, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Abelardo Jr Hadap Advincula, Lionel Chien Hui Tay