Patents by Inventor Hirofumi Totsuka

Hirofumi Totsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11742373
    Abstract: A semiconductor device in which a first chip and a second chip are stacked including a first wiring line and a second wiring line by which the first chip and the second chip are electrically connected. The first wiring line and the second wiring line each include a bonding portion for bonding one of a plurality of conductive patterns placed in the first chip and one of a plurality of conductive patterns placed in the second chip. The number of bonding portions included in the first wiring line is larger than the number of bonding portions included in the second wiring line.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: August 29, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tatsuya Ryoki, Hirofumi Totsuka, Masahiro Kobayashi, Hideaki Ishino, Hiroaki Kobayashi
  • Patent number: 11503231
    Abstract: An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: November 15, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohei Matsumoto, Hirofumi Totsuka, Katsuhito Sakurai, Kohichi Nakamura
  • Patent number: 11405570
    Abstract: According to one disclosure, a first semiconductor chip in which a plurality of pixels are formed and a second semiconductor chip stacked on the first semiconductor chip and including analog-to-digital conversion units are provided. A comparator includes a differential amplifier circuit that outputs a first signal, a source ground circuit that includes an input transistor to which the first signal is input and a load transistor cascade-connected to the input transistor and outputs a second signal from a connection node of the input transistor and the load transistor, and a current compensation circuit that includes a current control transistor to which the second signal is input and a current source transistor cascade-connected to the current control transistor and in which the current control transistor causes a second current to flow that changes complementarily with respect to a change of a first current flowing in the source ground circuit.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: August 2, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hirofumi Totsuka
  • Patent number: 11244976
    Abstract: A photoelectric conversion device is provided. The photoelectric conversion device comprises a plurality of pixels each including a photoelectric conversion element, an output unit configured to output a signal for generating an image from each of the plurality of pixels, a detection unit configured to detect a maximum value and a minimum value of each of signals output from pixels included in a predetermined pixel group among the plurality of pixels; and a switching unit configured to allow the output unit or the detection unit to selectively process the signals output from the plurality of pixels. The detection unit and the switching unit are disposed for each of the plurality of pixels.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: February 8, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Daisuke Inoue, Hirofumi Totsuka
  • Publication number: 20220021834
    Abstract: Pixels output a first signal based on signal charge of a part of photoelectric conversion units of multiple photoelectric conversion units, and a second signal based on signal charge of multiple photoelectric conversion units. An imaging apparatus outputs signals based on the first signals and signals based on the second signals by reducing the number of signals based on the first signals as compared to the number of signals based on the second signals.
    Type: Application
    Filed: September 30, 2021
    Publication date: January 20, 2022
    Inventors: Seiji Hashimoto, Atsushi Furubayashi, Takeru Suzuki, Kazuhiro Sonoda, Daisuke Yoshida, Hirofumi Totsuka, Takashi Muto, Yasushi Matsuno
  • Patent number: 11165980
    Abstract: Pixels output a first signal based on signal charge of a part of photoelectric conversion units of multiple photoelectric conversion units, and a second signal based on signal charge of multiple photoelectric conversion units. An imaging apparatus outputs signals based on the first signals and signals based on the second signals by reducing the number of signals based on the first signals as compared to the number of signals based on the second signals.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: November 2, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiji Hashimoto, Atsushi Furubayashi, Takeru Suzuki, Kazuhiro Sonoda, Daisuke Yoshida, Hirofumi Totsuka, Takashi Muto, Yasushi Matsuno
  • Patent number: 11140351
    Abstract: A photoelectric conversion apparatus includes a plurality of pixels, a generation unit configured to generate a first reference signal changing in potential in a first period from a first point in time to a second point in time, and a second reference signal having a gradient larger than a gradient of the first reference signal and changing in potential in a second period from a third point in time to a fourth point in time, and a plurality of analog to digital (AD) conversion units. Each of the AD conversion units includes a selection circuit configured to select the first reference signal or the second reference signal, and a comparator. The first period and the second period partially overlap with each other. The third point in time is later than the first point in time.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: October 5, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hirofumi Totsuka
  • Patent number: 11140348
    Abstract: Provided is an analog-to-digital (AD) conversion device including: a comparator configured to compare an input analog signal and a reference signal; a plurality of first bit-memories configured to hold a digital signal including a plurality of bits generated based on a result of comparison performed by the comparator, each of the plurality of first bit-memories holding a bit signal of a corresponding one bit among the plurality of bits of the digital signal; an output circuit to which the bit signal output from each of the plurality of first bit-memories is commonly input; a transmission line configured to transmit the bit signal output from the output circuit; and a first scanning circuit configured to sequentially select, from the plurality of first bit-memories, a first bit-memory that outputs the bit signal to the output circuit.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: October 5, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hirofumi Totsuka, Daisuke Yoshida, Takahiro Shirai
  • Patent number: 11134212
    Abstract: A photoelectric conversion device includes a plurality of pixels and a readout circuit. Each of the plurality of pixels includes a pixel circuit including a photoelectric conversion unit. The readout circuit is configured for reading out a signal from the plurality of pixels. The pixel circuit of each of the plurality of pixels includes at least a first transistor that receives a signal based on signal charges generated by the photoelectric conversion unit and is a part of a differential pair. The pixel circuit or the readout circuit has a second transistor. The size of the first transistor and the size of the second transistor are different from each other.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: September 28, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideo Kobayashi, Shinya Nakano, Hirofumi Totsuka, Daisuke Yoshida
  • Publication number: 20210218915
    Abstract: A solid-state imaging device including a plurality of pixels including a photoelectric conversion portion, a charge holding portion accumulating a signal charge transferred from the photoelectric conversion portion, and a floating diffusion region to which the signal charge of the charge holding portion is transferred, wherein the photoelectric conversion portion includes a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type formed under the first semiconductor region, the charge holding portion includes a third semiconductor region of the first conductivity type, and a fourth semiconductor region of the second conductivity type formed under the third semiconductor region, and a p-n junction between the third semiconductor region and the fourth semiconductor region is positioned deeper than a p-n junction between the first semiconductor region and the second semiconductor region.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 15, 2021
    Inventors: Masahiro Kobayashi, Takeshi Ichikawa, Hirofumi Totsuka, Yusuke Onuki
  • Publication number: 20210167113
    Abstract: A semiconductor device in which a first chip and a second chip are stacked including a first wiring line and a second wiring line by which the first chip and the second chip are electrically connected. The first wiring line and the second wiring line each include a bonding portion for bonding one of a plurality of conductive patterns placed in the first chip and one of a plurality of conductive patterns placed in the second chip. The number of bonding portions included in the first wiring line is larger than the number of bonding portions included in the second wiring line.
    Type: Application
    Filed: February 12, 2021
    Publication date: June 3, 2021
    Inventors: Tatsuya Ryoki, Hirofumi Totsuka, Masahiro Kobayashi, Hideaki Ishino, Hiroaki Kobayashi
  • Patent number: 11019291
    Abstract: A solid-state imaging device including a plurality of pixels including a photoelectric conversion portion, a charge holding portion accumulating a signal charge transferred from the photoelectric conversion portion, and a floating diffusion region to which the signal charge of the charge holding portion is transferred, wherein the photoelectric conversion portion includes a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type formed under the first semiconductor region, the charge holding portion includes a third semiconductor region of the first conductivity type, and a fourth semiconductor region of the second conductivity type formed under the third semiconductor region, and a p-n junction between the third semiconductor region and the fourth semiconductor region is positioned deeper than a p-n junction between the first semiconductor region and the second semiconductor region.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: May 25, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Takeshi Ichikawa, Hirofumi Totsuka, Yusuke Onuki
  • Patent number: 10957732
    Abstract: A semiconductor device in which a first chip and a second chip are stacked including a first wiring line and a second wiring line by which the first chip and the second chip are electrically connected. The first wiring line and the second wiring line each include a bonding portion for bonding one of a plurality of conductive patterns placed in the first chip and one of a plurality of conductive patterns placed in the second chip. The number of bonding portions included in the first wiring line is larger than the number of bonding portions included in the second wiring line.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: March 23, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tatsuya Ryoki, Hirofumi Totsuka, Masahiro Kobayashi, Hideaki Ishino, Hiroaki Kobayashi
  • Publication number: 20210051282
    Abstract: An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.
    Type: Application
    Filed: November 3, 2020
    Publication date: February 18, 2021
    Inventors: Kohei Matsumoto, Hirofumi Totsuka, Katsuhito Sakurai, Kohichi Nakamura
  • Publication number: 20210021779
    Abstract: An image sensing device is provided. The device comprises pixels including a first pixel which belongs to a first row and a first column, a second pixel which belongs to a second row and the first column and a third pixel which belongs to the second row and a second column, and readout units including a first readout circuit connected to the first and second pixels and a second readout circuit connected to the third pixel. The device performs a first operation and a second operation after the first operation. In the first operation, signal readout from the first and third pixels are performed. In the second operation, signal readout from the second pixel is performed. A controller determines, based on the signal generated by the first operation, a control parameter using to control the second operation.
    Type: Application
    Filed: October 2, 2020
    Publication date: January 21, 2021
    Inventors: Hirofumi Totsuka, Katsuhiko Mori
  • Publication number: 20200404209
    Abstract: A photoelectric conversion apparatus includes a plurality of pixels, a generation unit configured to generate a first reference signal changing in potential in a first period from a first point in time to a second point in time, and a second reference signal having a gradient larger than a gradient of the first reference signal and changing in potential in a second period from a third point in time to a fourth point in time, and a plurality of analog to digital (AD) conversion units. Each of the AD conversion units includes a selection circuit configured to select the first reference signal or the second reference signal, and a comparator. The first period and the second period partially overlap with each other. The third point in time is later than the first point in time.
    Type: Application
    Filed: June 16, 2020
    Publication date: December 24, 2020
    Inventor: Hirofumi Totsuka
  • Publication number: 20200389617
    Abstract: According to one disclosure, a first semiconductor chip in which a plurality of pixels are formed and a second semiconductor chip stacked on the first semiconductor chip and including analog-to-digital conversion units are provided. A comparator includes a differential amplifier circuit that outputs a first signal, a source ground circuit that includes an input transistor to which the first signal is input and a load transistor cascade-connected to the input transistor and outputs a second signal from a connection node of the input transistor and the load transistor, and a current compensation circuit that includes a current control transistor to which the second signal is input and a current source transistor cascade-connected to the current control transistor and in which the current control transistor causes a second current to flow that changes complementarily with respect to a change of a first current flowing in the source ground circuit.
    Type: Application
    Filed: June 2, 2020
    Publication date: December 10, 2020
    Inventor: Hirofumi Totsuka
  • Patent number: 10855940
    Abstract: An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: December 1, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohei Matsumoto, Hirofumi Totsuka, Katsuhito Sakurai, Kohichi Nakamura
  • Patent number: 10841517
    Abstract: A solid-state imaging device includes a pixel array unit in which pixels each including a photoelectric converter are arranged over rows and columns, output lines each connected to the pixels arranged on a corresponding column, and column circuits each connected to a corresponding output line. Each column circuit is configured to operate in a first mode and a second mode, in the first mode, the common circuit amplifies a single signal based on charges generated in the photoelectric converter of one pixel connected to the corresponding output line at a common gain to output a first pixel signal and a second pixel signal, and in the second mode, the column circuit amplifies the single signal at a first gain to output a first pixel signal and amplifies the single signal at a second gain lower than the first gain to output a second pixel signal.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: November 17, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hirofumi Totsuka
  • Patent number: 10834350
    Abstract: An image sensing device is provided. The device comprises pixels including a first pixel which belongs to a first row and a first column, a second pixel which belongs to a second row and the first column and a third pixel which belongs to the second row and a second column, and readout units including a first readout circuit connected to the first and second pixels and a second readout circuit connected to the third pixel. The device performs a first operation and a second operation after the first operation. In the first operation, signal readout from the first and third pixels are performed. In the second operation, signal readout from the second pixel is performed. A controller determines, based on the signal generated by the first operation, a control parameter using to control the second operation.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: November 10, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirofumi Totsuka, Katsuhiko Mori