Patents by Inventor Hirofumi Totsuka

Hirofumi Totsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10742910
    Abstract: A successive approximation analog-to-digital converter causes a comparator to compare an analog signal and a comparison signal that a first digital-to-analog converter converts into a voltage with an offset applied to the comparison signal by an offsetting unit. The successive approximation analog-to-digital converter can successfully carry out the second AD conversion and successive AD conversions of a signal.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: August 11, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirofumi Totsuka, Daisuke Yoshida
  • Publication number: 20200194472
    Abstract: A photoelectric conversion device is provided. The photoelectric conversion device comprises a plurality of pixels each including a photoelectric conversion element, an output unit configured to output a signal for generating an image from each of the plurality of pixels, a detection unit configured to detect a maximum value and a minimum value of each of signals output from pixels included in a predetermined pixel group among the plurality of pixels; and a switching unit configured to allow the output unit or the detection unit to selectively process the signals output from the plurality of pixels. The detection unit and the switching unit are disposed for each of the plurality of pixels.
    Type: Application
    Filed: December 4, 2019
    Publication date: June 18, 2020
    Inventors: Daisuke Inoue, Hirofumi Totsuka
  • Patent number: 10652499
    Abstract: An image capturing apparatus includes a first chip and a second chip. The first chip includes a plurality of pixels. The second chip is stacked on the first chip and includes a plurality of signal processing circuits arranged in a two-dimensional form. Each signal processing circuit includes a first selection circuit, a plurality of amplifier circuits, and an analog-to-digital conversion unit. The first selection circuit includes a plurality of input nodes, a plurality of output nodes, and is configured such that a signal output from a pixel and input to one of the plurality of input nodes is selectively output to one of the plurality of output nodes. The plurality of amplifier circuits respectively are connected to the plurality of output nodes of the first selection circuit. The analog-to-digital conversion unit is configured to convert a plurality of output signals output from the plurality of amplifier circuits.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: May 12, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Naoki Isoda, Hirofumi Totsuka, Daisuke Yoshida
  • Patent number: 10594971
    Abstract: Provided is an imaging device that performs multiple AD conversions including a first AD conversion and a second AD conversion for one pixel signal. A first memory has a bit width of N+1 bits (N is a natural number) and holds the least significant bit to the N+1th bit of a digital value obtained by the first AD conversion, and second memory has a bit width of M bits (M is a natural number) greater than N+1 bits and holds the least significant bit to the Mth bit of a digital value obtained by the second AD conversion.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: March 17, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hirofumi Totsuka, Daisuke Yoshida
  • Publication number: 20200059619
    Abstract: Provided is an analog-to-digital (AD) conversion device including: a comparator configured to compare an input analog signal and a reference signal; a plurality of first bit-memories configured to hold a digital signal including a plurality of bits generated based on a result of comparison performed by the comparator, each of the plurality of first bit-memories holding a bit signal of a corresponding one bit among the plurality of bits of the digital signal; an output circuit to which the bit signal output from each of the plurality of first bit-memories is commonly input; a transmission line configured to transmit the bit signal output from the output circuit; and a first scanning circuit configured to sequentially select, from the plurality of first bit-memories, a first bit-memory that outputs the bit signal to the output circuit.
    Type: Application
    Filed: August 2, 2019
    Publication date: February 20, 2020
    Inventors: Hirofumi Totsuka, Daisuke Yoshida, Takahiro Shirai
  • Publication number: 20200021760
    Abstract: A solid-state imaging device including a plurality of pixels including a photoelectric conversion portion, a charge holding portion accumulating a signal charge transferred from the photoelectric conversion portion, and a floating diffusion region to which the signal charge of the charge holding portion is transferred, wherein the photoelectric conversion portion includes a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type formed under the first semiconductor region, the charge holding portion includes a third semiconductor region of the first conductivity type, and a fourth semiconductor region of the second conductivity type formed under the third semiconductor region, and a p-n junction between the third semiconductor region and the fourth semiconductor region is positioned deeper than a p-n junction between the first semiconductor region and the second semiconductor region.
    Type: Application
    Filed: September 23, 2019
    Publication date: January 16, 2020
    Inventors: MASAHIRO KOBAYASHI, Takeshi Ichikawa, Hirofumi Totsuka, Yusuke Onuki
  • Publication number: 20200014871
    Abstract: An imaging device including an operation signal generation circuit of reduced circuit scale is provided. The imaging device includes a selection circuit configured to output a pixel transfer pulse signal to be input to a gate of a transfer transistor of a pixel based on a vertical block control signal, a horizontal block control signal, and a row transfer pulse signal.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 9, 2020
    Inventors: Kohei Matsumoto, Hirofumi Totsuka, Katsuhito Sakurai, Kohichi Nakamura
  • Patent number: 10462400
    Abstract: A solid-state imaging device including a plurality of pixels including a photoelectric conversion portion, a charge holding portion accumulating a signal charge transferred from the photoelectric conversion portion, and a floating diffusion region to which the signal charge of the charge holding portion is transferred, wherein the photoelectric conversion portion includes a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type formed under the first semiconductor region, the charge holding portion includes a third semiconductor region of the first conductivity type, and a fourth semiconductor region of the second conductivity type formed under the third semiconductor region, and a p-n junction between the third semiconductor region and the fourth semiconductor region is positioned deeper than a p-n junction between the first semiconductor region and the second semiconductor region.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: October 29, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Takeshi Ichikawa, Hirofumi Totsuka, Yusuke Onuki
  • Patent number: 10447953
    Abstract: An imaging apparatus includes first and second substrates respectively including first pixels and second pixels arranged thereon. The first pixels each includes a first photoelectric conversion unit and a first transistor configured to output a first signal based on a charge generated in the first photoelectric conversion unit. The second pixels each includes a second photoelectric conversion unit and a second transistor configured to output a second signal based on a charge generated in the second photoelectric conversion unit. The first and second substrates are stacked via an insulation film.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: October 15, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yu Arishima, Hirofumi Totsuka
  • Publication number: 20190252444
    Abstract: A semiconductor device in which a first chip and a second chip are stacked including a first wiring line and a second wiring line by which the first chip and the second chip are electrically connected. The first wiring line and the second wiring line each include a bonding portion for bonding one of a plurality of conductive patterns placed in the first chip and one of a plurality of conductive patterns placed in the second chip. The number of bonding portions included in the first wiring line is larger than the number of bonding portions included in the second wiring line.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 15, 2019
    Inventors: Tatsuya Ryoki, Hirofumi Totsuka, Masahiro Kobayashi, Hideaki Ishino, Hiroaki Kobayashi
  • Publication number: 20190253659
    Abstract: A photoelectric conversion device includes a plurality of pixels and a readout circuit. Each of the plurality of pixels includes a pixel circuit including a photoelectric conversion unit. The readout circuit is configured for reading out a signal from the plurality of pixels. The pixel circuit of each of the plurality of pixels includes at least a first transistor that receives a signal based on signal charges generated by the photoelectric conversion unit and is a part of a differential pair. The pixel circuit or the readout circuit has a second transistor. The size of the first transistor and the size of the second transistor are different from each other.
    Type: Application
    Filed: February 4, 2019
    Publication date: August 15, 2019
    Inventors: Hideo Kobayashi, Shinya Nakano, Hirofumi Totsuka, Daisuke Yoshida
  • Patent number: 10382707
    Abstract: According to an aspect of the present invention, there is provided an imaging device including: a plurality of pixels, each pixel including a photoelectric conversion unit that photoelectrically converts received light, a read node in which a signal charge generated in the photoelectric conversion unit is accumulated, and a first readout circuit that performs analog-to-digital conversion to convert a signal based on the signal charge accumulated in the read node into a digital signal; and a second readout circuit that reads a signal based on the signal charge, the signal having a smaller amplitude than a resolution of the analog-to-digital conversion of the first readout circuit.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: August 13, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hirofumi Totsuka, Katsuhito Sakurai
  • Publication number: 20190246056
    Abstract: Pixels output a first signal based on signal charge of a part of photoelectric conversion units of multiple photoelectric conversion units, and a second signal based on signal charge of multiple photoelectric conversion units. An imaging apparatus outputs signals based on the first signals and signals based on the second signals by reducing the number of signals based on the first signals as compared to the number of signals based on the second signals.
    Type: Application
    Filed: April 17, 2019
    Publication date: August 8, 2019
    Inventors: Seiji Hashimoto, Atsushi Furubayashi, Takeru Suzuki, Kazuhiro Sonoda, Daisuke Yoshida, Hirofumi Totsuka, Takashi Muto, Yasushi Matsuno
  • Patent number: 10321087
    Abstract: A sensor has an image sensing unit including pixel blocks, and a readout unit for reading out a signal from the image sensing unit. The pixel block includes a photoelectric converter, first and second transistors, and a current source. First main electrodes of the first and second transistors are connected to a common node, and the current source is provided between the common node and a predetermined voltage. A signal readout operation includes an operation in which a voltage corresponding to charges in the photoelectric converter is supplied to a control electrode of the first transistor, and a temporally changing reference voltage is supplied to a control electrode of the second transistor. The readout unit reads out a signal from the image sensing unit via a second main electrode of the first transistor.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: June 11, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Daisuke Yoshida, Yasushi Matsuno, Hirofumi Totsuka, Takashi Muto, Masahiro Kobayashi, Toru Koizumi
  • Patent number: 10291871
    Abstract: Pixels output a first signal based on signal charge of a part of photoelectric conversion units of multiple photoelectric conversion units, and a second signal based on signal charge of multiple photoelectric conversion units. An imaging apparatus outputs signals based on the first signals and signals based on the second signals by reducing the number of signals based on the first signals as compared to the number of signals based on the second signals.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: May 14, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiji Hashimoto, Atsushi Furubayashi, Takeru Suzuki, Kazuhiro Sonoda, Daisuke Yoshida, Hirofumi Totsuka, Takashi Muto, Yasushi Matsuno
  • Publication number: 20190104271
    Abstract: An image capturing apparatus includes a first chip and a second chip. The first chip includes a plurality of pixels. The second chip is stacked on the first chip and includes a plurality of signal processing circuits arranged in a two-dimensional form. Each signal processing circuit includes a first selection circuit, a plurality of amplifier circuits, and an analog-to-digital conversion unit. The first selection circuit includes a plurality of input nodes, a plurality of output nodes, and is configured such that a signal output from a pixel and input to one of the plurality of input nodes is selectively output to one of the plurality of output nodes. The plurality of amplifier circuits respectively are connected to the plurality of output nodes of the first selection circuit. The analog-to-digital conversion unit is configured to convert a plurality of output signals output from the plurality of amplifier circuits.
    Type: Application
    Filed: September 26, 2018
    Publication date: April 4, 2019
    Inventors: Naoki Isoda, Hirofumi Totsuka, Daisuke Yoshida
  • Publication number: 20190104264
    Abstract: A solid-state imaging device includes a pixel array unit in which pixels each including a photoelectric converter are arranged over rows and columns, output lines each connected to the pixels arranged on a corresponding column, and column circuits each connected to a corresponding output line. Each column circuit is configured to operate in a first mode and a second mode, in the first mode, the common circuit amplifies a single signal based on charges generated in the photoelectric converter of one pixel connected to the corresponding output line at a common gain to output a first pixel signal and a second pixel signal, and in the second mode, the column circuit amplifies the single signal at a first gain to output a first pixel signal and amplifies the single signal at a second gain lower than the first gain to output a second pixel signal.
    Type: Application
    Filed: September 26, 2018
    Publication date: April 4, 2019
    Inventor: Hirofumi Totsuka
  • Publication number: 20190103427
    Abstract: An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 4, 2019
    Inventors: Kohei Matsumoto, Hirofumi Totsuka, Katsuhito Sakurai, Kohichi Nakamura
  • Publication number: 20190104265
    Abstract: A successive approximation analog-to-digital converter causes a comparator to compare an analog signal and a comparison signal that a first digital-to-analog converter converts into a voltage with an offset applied to the comparison signal by an offsetting unit. The successive approximation analog-to-digital converter can successfully carry out the second AD conversion and successive AD conversions of a signal.
    Type: Application
    Filed: September 26, 2018
    Publication date: April 4, 2019
    Inventors: Hirofumi Totsuka, Daisuke Yoshida
  • Publication number: 20190058842
    Abstract: An image sensing device is provided. The device comprises pixels including a first pixel which belongs to a first row and a first column, a second pixel which belongs to a second row and the first column and a third pixel which belongs to the second row and a second column, and readout units including a first readout circuit connected to the first and second pixels and a second readout circuit connected to the third pixel. The device performs a first operation and a second operation after the first operation. In the first operation, signal readout from the first and third pixels are performed. In the second operation, signal readout from the second pixel is performed. A controller determines, based on the signal generated by the first operation, a control parameter using to control the second operation.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 21, 2019
    Inventors: Hirofumi Totsuka, Katsuhiko Mori