Patents by Inventor Hironori Tanaka

Hironori Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8471153
    Abstract: A multilayer printed wiring board includes a core substrate, a resin insulation layer laminated on the core substrate and a capacitor section coupled to the resin insulating layer. The capacitor section includes a first electrode including a first metal and configured to be charged by a negative charge, and a second electrode including a second metal and opposing the first electrode, the second electrode configured to be charged by a positive charge. A dielectric layer is interposed between the first electrode and second electrode, and an ionization tendency of the first metal is larger than and ionization tendency of the second metal.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: June 25, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Hironori Tanaka, Keisuke Shimizu
  • Patent number: 8462429
    Abstract: An optical combiner 100 includes: fibers for propagation of pumping light 20 configured to propagate pumping light; a fiber for propagation of laser light 10 configured to propagate laser light having a longer wavelength than the pumping light; and a large area fiber 30 having a core 31 and a clad 32 and configured to propagate laser light and pumping light, in which one end surface of the fiber for propagation of laser light 10 and one end surface of the large area fiber 30 are fused, one end surfaces of the fibers for propagation of pumping light 20 and the one end surface of the large area fiber 30 are fused, and the fiber for propagation of laser light 10 and the fibers for propagation of pumping light 20 are not fused to each other.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: June 11, 2013
    Assignee: Fujikura Ltd.
    Inventor: Hironori Tanaka
  • Patent number: 8455766
    Abstract: A substrate for mounting an IC chip including a printed substrate including a first build-up layer. The first build-up layer including (i) a first conductor layer having first conductor circuits and (ii) a resin insulating layer. The first conductor circuits and the resin insulating layer alternating along a length of the first build-up layer. A low-elasticity resin layer formed on the first build-up layer. A low-thermal-expansion substrate formed of ceramics or silicon, and provided on the low-elasticity resin layer. Through-hole conductors provided through the low-thermal-expansion substrate and the low-elasticity resin layer; and second conductor circuits formed on the low-thermal-expansion substrate. The through-hole conductors electrically connect the first conductor layer and the second conductor circuits provided on the low-thermal-expansion substrate.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: June 4, 2013
    Assignee: IBIDEN Co., Ltd.
    Inventors: Hironori Tanaka, Shuichi Kawano
  • Publication number: 20130083355
    Abstract: An information processing system includes a print server that generates print data and a data processing device that processes the print data. The print server transmits the generated print data to the data processing device. The data processing device generates processed data by processing the print data transmitted from the print server. The data processing device transmits the processed data to the print server. The print server transmits the processed data as new print data to a printer.
    Type: Application
    Filed: May 7, 2012
    Publication date: April 4, 2013
    Applicant: FUJI XEROX CO., LTD.
    Inventor: Hironori TANAKA
  • Patent number: 8391015
    Abstract: A printed wiring board includes an insulating layer and a capacitor including a ceramic high dielectric layer being interposed between a first and a second electrode, and a semiconductor device mounting pad, including a first and a second pad, formed on an outermost resin insulating layer of the resin insulating layers. An underfill which covers an area larger than that of the high dielectric layer is formed, when the underfill covered area is projected along a lamination direction of the resin insulating layers to a face on which the high dielectric layer is formed. The capacitor is located immediately beneath the underfill covered area.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: March 5, 2013
    Assignee: Ibiden Co., Ltd.
    Inventor: Hironori Tanaka
  • Patent number: 8336205
    Abstract: A printed wiring board is manufactured by a method in which a base substrate having a first insulation layer, a second insulation layer, and a conductive film is provided. An electronic component is placed on the first insulation layer at a position determined based on an alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark, which is used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: December 25, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Hironori Tanaka, Kazuhiro Yoshikawa, Naoaki Fujii, Atsunari Yamashita
  • Patent number: 8291584
    Abstract: A method for manufacturing a printed wiring board, including forming an alignment mark in a metal foil, forming a bump on the metal foil at a position determined based on the alignment mark, positioning an electronic component over the metal foil, the positioning comprising aligning a terminal of the electronic component with the bump based on the alignment mark, connecting the terminal of the electronic component with the bump, forming an insulation layer enclosing the electronic component connected with the bump such that the electronic component is placed inside a printed wiring board, and patterning the metal foil to which the electronic component is connected through the bump.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: October 23, 2012
    Assignee: Ibiden Co., Ltd.
    Inventor: Hironori Tanaka
  • Publication number: 20120206793
    Abstract: An optical combiner 100 includes: fibers for propagation of pumping light 20 configured to propagate pumping light; a fiber for propagation of laser light 10 configured to propagate laser light having a longer wavelength than the pumping light; and a large area fiber 30 having a core 31 and a clad 32 and configured to propagate laser light and pumping light, in which one end surface of the fiber for propagation of laser light 10 and one end surface of the large area fiber 30 are fused, one end surfaces of the fibers for propagation of pumping light 20 and the one end surface of the large area fiber 30 are fused, and the fiber for propagation of laser light 10 and the fibers for propagation of pumping light 20 are not fused to each other.
    Type: Application
    Filed: April 25, 2012
    Publication date: August 16, 2012
    Applicant: FUJIKURA LTD.
    Inventor: Hironori Tanaka
  • Patent number: 8237060
    Abstract: A method for manufacturing a multilayer printed wiring board having an electronic component housed therein includes forming a first conductor circuit on a first surface of a substrate. A first alignment mark is formed on the first surface of the substrate separate from the conductor circuit and forming a through bore in the substrate, the through bore extending from the first surface of the substrate to a second surface of the substrate. A seal member is disposed on the second surface of the substrate, the seal member sealing an opening on the second surface of the through bore to provide a sealed through bore. An electronic component is inserted in the sealed through bore using the first alignment mark on the first surface of the substrate.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: August 7, 2012
    Assignee: Ibiden Co., Ltd.
    Inventor: Hironori Tanaka
  • Publication number: 20120170240
    Abstract: A multilayer printed wiring board and method for manufacturing a multilayer printed wiring board. One method include a method for manufacturing a multilayer printed wiring board having an electronic component housed therein. The method includes forming a conduction circuit on a core substrate and forming an alignment mark on the core substrate separate from the conduction circuit. Also included is forming a concavity in the core substrate, the concavity being formed in an area of the core substrate not including the conductor circuit and alignment mark, and inserting the electronic component into the concavity in the core substrate by using the alignment mark on the core substrate to align the electronic component with the concavity.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 5, 2012
    Applicant: IBIDEN CO., LTD.
    Inventor: Hironori Tanaka
  • Patent number: 8208267
    Abstract: A printed wiring board with a built-in resistive element comprising a first electrode formed on the surface of an insulating member, a second electrode provided adjacent to the first electrode to form a space therebetween, a resistor-filling part formed by the space between the first electrode and the second electrode, and a resistive element comprising a resistive material provided in the resistor-filling part wherein the resistor-filling part is substantially enclosed by the first electrode and the second electrode.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: June 26, 2012
    Assignee: Ibiden Co., Ltd.
    Inventor: Hironori Tanaka
  • Patent number: 8198546
    Abstract: A method of manufacturing a printed wiring board includes preparing a wiring substrate having a conductive circuit, coating a solder-resist layer over the conductive circuit, leveling a surface of the solder-resist layer so as to obtain a maximum surface roughness in a predetermined range, removing the resin film from the surface of the solder-resist layer, and forming multiple openings in the surface of the solder-resist layer to expose multiple portions of the conductive circuit so as to form multiple conductive pads for mounting an electronic components.
    Type: Grant
    Filed: November 23, 2007
    Date of Patent: June 12, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Yoichiro Kawamura, Shigeki Sawa, Katsuhiko Tanno, Hironori Tanaka, Naoaki Fujii
  • Patent number: 8186046
    Abstract: A multilayer printed wiring board and method for manufacturing a multilayer printed wiring board. One method include a method for manufacturing a multilayer printed wiring board having an electronic component housed therein. The method includes forming a conduction circuit on a core substrate and forming an alignment mark on the core substrate separate from the conduction circuit. Also included is forming a concavity in the core substrate, the concavity being formed in an area of the core substrate not including the conductor circuit and alignment mark, and inserting the electronic component into the concavity in the core substrate by using the alignment mark on the core substrate to align the electronic component with the concavity.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: May 29, 2012
    Assignee: Ibiden Co., Ltd.
    Inventor: Hironori Tanaka
  • Publication number: 20120037414
    Abstract: A multilayer printed wiring board including a layered capacitor section provided on a first interlayer resin insulation layer and a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. A second interlayer resin insulation layer is provided on the first insulation layer and the capacitor section, and a metal thin-film layer is provided over the capacitor section and on the second insulation layer. An outermost interlayer resin insulation layer is provided on the second insulation layer and the metal thin-film layer. A mounting section is provided on the outermost insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each insulation layer. The via conductors include first via conductors that electrically connect the first layered electrode to the first external terminals. Second via conductors electrically connect the second layered electrode to the second external terminals.
    Type: Application
    Filed: October 7, 2011
    Publication date: February 16, 2012
    Applicant: IBIDEN CO., LTD
    Inventor: Hironori Tanaka
  • Patent number: 8115113
    Abstract: A multilayer printed wiring board including a layered capacitor section provided on a first interlayer resin insulation layer and a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. A second interlayer resin insulation layer is provided on the first insulation layer and the capacitor section, and a metal thin-film layer is provided over the capacitor section and on the second insulation layer. An outermost interlayer resin insulation layer is provided on the second insulation layer and the metal thin-film layer. A mounting section is provided on the outermost insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each insulation layer. The via conductors include first via conductors that electrically connect the first layered electrode to the first external terminals. Second via conductors electrically connect the second layered electrode to the second external terminals.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: February 14, 2012
    Assignee: Ibiden Co., Ltd.
    Inventor: Hironori Tanaka
  • Patent number: 8108990
    Abstract: A printed circuit board including a conductor portion, an insulating layer formed over the conductor portion, a thin-film capacitor formed over the insulating layer and including a first electrode, a second electrode and a high-dielectric layer interposed between the first electrode and the second electrode, and a via-hole conductor structure formed through the second electrode and insulating layer and electrically connecting the second electrode and the conductor portion. The via-hole conductor structure has a first portion in the second electrode and a second portion in the insulating layer. The first portion of the via-hole conductor structure has a truncated-cone shape tapering toward the conductor portion.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: February 7, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Hironori Tanaka
  • Publication number: 20110309960
    Abstract: A power supply apparatus is provided for a test apparatus configured to supply a power supply signal to a DUT. An A/D converter performs analog/digital conversion of an analog observed value that corresponds to a power supply signal so as to generate a digital observed value. A digital signal processing circuit generates, by means of digital processing, a control value adjusted such that the digital observed value received from the A/D converter matches a predetermined reference value. A D/A converter performs digital/analog conversion of the control value, and supplies the resulting value to the DUT as the power supply signal. A digital signal processing circuit is configured to be capable of changing the content of its signal processing.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 22, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Takahiko Shimizu, Katsuhiko Degawa, Hironori Tanaka
  • Patent number: 8070907
    Abstract: A jointing apparatus includes a first laser head which emits a laser beam for adhesive heating and a second laser head which emits a laser beam for welding. In jointing components of a work with a thermosetting adhesive agent, the defocused laser beam is applied to an adhered part for a short time. Thereupon, the adhesive agent is primarily cured so that the components are tacked together. In spot-welding the components, the laser beam for welding that is converged by the second laser head is applied to a spot-welded joint.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: December 6, 2011
    Assignee: NHK Spring Co., Ltd.
    Inventor: Hironori Tanaka
  • Publication number: 20110289773
    Abstract: A printed wiring board is manufactured by a method in which a base substrate having a first insulation layer, a second insulation layer, and a conductive film is provided. An electronic component is placed on the first insulation layer at a position determined based on an alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark, which is used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.
    Type: Application
    Filed: August 12, 2011
    Publication date: December 1, 2011
    Applicant: IBIDEN CO., LTD
    Inventors: Hironori Tanaka, Kazuhiro Yoshikawa, Naoaki Fujii, Atsunari Yamashita
  • Publication number: 20110271524
    Abstract: A multilayer printed wiring board includes a core substrate, a resin insulation layer laminated on the core substrate and a capacitor section coupled to the resin insulating layer. The capacitor section includes a first electrode including a first metal and configured to be charged by a negative charge, and a second electrode including a second metal and opposing the first electrode, the second electrode configured to be charged by a positive charge. A dielectric layer is interposed between the first electrode and second electrode, and an ionization tendency of the first metal is larger than and ionization tendency of the second metal.
    Type: Application
    Filed: July 18, 2011
    Publication date: November 10, 2011
    Applicant: IBIDEN CO., LTD.
    Inventors: Hironori TANAKA, Keisuke Shimizu