Abstract: A semiconductor memory device has: a word driver configured to apply a driving voltage to a word line connected to a memory cell; and an internal power supply circuit configured to supply the driving voltage to the word driver and to apply a substrate voltage to back gates of transistors included in the word driver. The internal power supply circuit controls the driving voltage and the substrate voltage independently of each other. In a read operation, the internal power supply circuit constantly supplies the substrate voltage, while turns on and off supply of the driving voltage.

Abstract: A clock reproducing apparatus includes a clock reproducing circuit having: a gated oscillator having an oscillating circuit of two routes; and a frequency control circuit for comparing a phase of an output of the gated oscillator with a phase of a reference clock, and supplying a phase control signal to the gated oscillator based on the comparison result so as to set a delay time, input data is input to a reset input terminal of the gated oscillator, and different route of the two routes of the oscillating circuit operates depending on a case where the input data is “H” and a case where the input data is “L”.

Abstract: A semiconductor memory device includes first to third data buses, and first and second connection circuits. The first connection circuit inverts and transfers a first output signal on the first data bus read out from a memory onto the second data bus in response to a first selection signal, inverts and transfers a second output signal on the second data bus read out from the memory onto the first data bus in response to a second selection signal, and connects the first and second data buses in response to a reset signal. The second connection circuit inverts and transfers the inverted first output signal on the second data bus onto the third data bus in response to the first selection signal and transfers the second output signal on the second data bus onto the third data bus in response to the second selection signal.

Abstract: An inspection apparatus inspects an inspected object based on a waveform quality of a signal that the inspected object outputs. The inspection apparatus has a power supply section which outputs a control signal that controls an output of the inspected object, a waveform measuring section which measures the signal that the inspected object outputs to generate a waveform image, an analyzing section which derives a value indicating a waveform quality from the waveform image that the waveform measuring section measures, a deciding section which decides whether or not the value derived by the analyzing section satisfies a target value, and an optimizing section which changes a set value of the control signal that the power supply section outputs, based on a decision result of the deciding section.

Abstract: The nonvolatile semiconductor memory includes a plurality of memory devices for storing data, a write circuit for supplying a high voltage for data writing, a plurality of selectors connected between the write circuit and the plurality of memory devices, for selecting one from the plurality of memory devices; and a control circuit for selecting one from the plurality of selectors, inputting a control voltage to a control terminal of the selected selector, and setting a write voltage for the memory device according to the control voltage.

Abstract: A semiconductor memory device has: a word driver configured to apply a driving voltage to a word line connected to a memory cell; and an internal power supply circuit configured to supply the driving voltage to the word driver and to apply a substrate voltage to back gates of transistors included in the word driver. The internal power supply circuit controls the driving voltage and the substrate voltage independently of each other. In a read operation, the internal power supply circuit constantly supplies the substrate voltage, while turns on and off supply of the driving voltage.

Abstract: A battery includes a plurality of flat type batteries and a connector member that electrically connect the plurality of flat type batteries to one another. Each of the plurality of flat type batteries is provided with an outer sheath having a composite laminate film, an electric power generating component, which includes a positive electrode plate, a separator and a negative electrode plate and is accommodated in the outer sheath by compelling at least a part of a circumference of the outer sheath to be joined by thermally welded portions, a positive-electrode terminal lead conductive with the positive electrode plate and held between the thermally welded portions, and a negative-electrode terminal lead conductive with the negative electrode plate and held between the thermally welded portions. At least one of the positive-electrode terminal lead and the negative-electrode terminal lead has a surface covering layer made of a metal different from that of its terminal mother material.

Abstract: An inspection apparatus inspects an inspected object based on a waveform quality of a signal that the inspected object outputs. The inspection apparatus has a power supply section which outputs a control signal that controls an output of the inspected object, a waveform measuring section which measures the signal that the inspected object outputs to generate a waveform image, an analyzing section which derives a value indicating a waveform quality from the waveform image that the waveform measuring section measures, a deciding section which decides whether or not the value derived by the analyzing section satisfies a target value, and an optimizing section which changes a set value of the control signal that the power supply section outputs, based on a decision result of the deciding section.

Abstract: An electric potential switching circuit has an electric potential control circuit, an output circuit, and a precharge circuit connected to the output circuit. The electric potential control circuit generates a reference electric potential associated with an operation mode of a flash memory. The output circuit generates at an output terminal an output electric potential corresponding to the reference electric potential when enabled, and sets the output terminal to a high impedance state when disenabled. The output circuit is disenabled when the operation mode is switched from a first mode to a second mode. While the output circuit is disenabled, the electric potential control circuit switches the reference electric potential from a first electric potential associated with the first mode to a second electric potential associated with the second mode, and the precharge circuit precharges the output terminal in response to the reference electric potential.

Abstract: A semiconductor memory device includes a word drive line, and a word line connected with memory cells. A first drive circuit drives the word drive line to a first voltage based on a main word signal, and resets the word drive line to a ground voltage in a time period for transition of an address signal. A second drive circuit outputs a signal of the first voltage to the word line based on a sub-word signal such that a data is read out from one of the memory cells. The main word signal and the sub-word signal are obtained from an address signal, and are signals taking the ground voltage or a second voltage which is lower than the first voltage.

Abstract: A semiconductor memory includes a plurality of memory portions; and a plurality of spare memory portions. The memory portion includes: a main cell array which includes memory cells, a first reference cell which stores a first reference data in a nonvolatile state, and a first sense amplifier which reads a first state of the memory cell based on the first state and a second state of the first reference cell. The memory cell stores data in a nonvolatile state. The spare memory portion includes: a spare cell array which includes spare cells as spares of the memory cells, a second reference cell which stores a second reference data in a nonvolatile state, and a second sense amplifier which reads a third state of the spare cell based on the third state and a fourth state of the second reference cell. The memory portion having a defect on the first reference cell is replaced with the spare memory portion.

Abstract: A semiconductor memory device includes first to third data buses, a first connection circuit and a second connection circuit. The first connection circuit is provided between the first data bus and the second data bus, inverts and transfers a first output signal on the first data bus read out from a memory section onto the second data bus in response to a first selection signal, inverts and transfers a second output signal on the second data bus read out from the memory section onto the first data bus in response to a second selection signal, and connects the first data bus and the second data bus in response to a reset signal. The second connection circuit is provided between the second data bus and the third data bus, inverts and transfers the inverted first output signal on the second data bus onto the third data bus in response to the first selection signal and transfers the second output signal on the second data bus onto the third data bus in response to the second selection signal.

Abstract: A remote maintenance repeater is used in a remote monitoring system. A command receiving unit receives a command from the monitoring apparatus. A destination selecting unit selects a transfer destination device to which the command received is transferred. A command transmitting unit transmits the command to the transfer destination device selected, at a specific frequency specific to the transfer destination device. A result receiving unit receives a result of execution of the command from the transfer destination device at the specific frequency. A result transmitting unit transmits the result to the monitoring apparatus.

Abstract: A semiconductor memory device has a reduced number of sense amplifiers to suppress an increase in chip size and power consumption as integration is increased. A semiconductor memory device can be adapted to read out from a memory cell array in pages or bursts can include sense amplifiers (2) for reading out data for a page length or burst length in two parts, including a first half and second half, and a page buffer (3) for storing data for the page length or burst length read out from a memory cell array (1) by the sense amplifier (2).

Abstract: An object of this invention is to realize a pulse pattern generating apparatus that outputs a test signal of high waveform quality even when the shape of an eye pattern is changed. This invention is an improvement of a pulse pattern generating apparatus that generates a test signal of a predetermined pattern by using plural digital-analog converters and outputs the test signal to a test subject.

Abstract: It is targeted to prevent picture quality deterioration in the output picture information proper to the interlaced scanned picture and that ascribable to interlaced scanning. To this end, a decimating inverse discrete cosine transform unit 5 applies inverse orthogonal transform to four low-range coefficients in the horizontal direction and eight coefficients in the vertical direction among the respective coefficients of an orthogonal transform block of the compressed picture information of the input high resolution picture.

Abstract: In a fusion splicing method and device for optical fibers, bare fibers (f) of ribbon optical fibers “F” to be spliced together are arranged, in opposite direction to each other, on a fiber setup stage (30). An interval of a pair of the discharge electrode rods (10,20) is optionally changed according to the fiber number of the bare fibers “f” of the ribbon optical fiber “F” so that all of the bare fibers “f” are set into a uniform temperature area in a discharge area, and an optimum fusion splicing process is performed according to the fiber number of the bare fibers “f”.

Abstract: An apparatus and method for allowing the spotting of one or more movable cores to mating portions of a mold. The present invention provides for the placement of a mold on a support structure and the releasable connection of each movable core to a force exerting device. The force exerting device allows for controlled and repeatable movement of the movable core or cores to which the force exerting device is attached. The present invention preferably also allows each movable core being spotted to be set to, and retracted from the mold, to a position where adjustments may be made to the movable core and/or the mating portion of the mold without removing the movable core therefrom. The present invention, therefore, provides for a higher quality and more efficient spotting of movable mold cores than is currently possible.

Abstract: An ultraviolet illumination equipment including a receptacle with a window, a dielectric-barrier discharge lamp located within the receptacle for emitting ultraviolet radiation through the window, and a heater for heating the window to at least 100° C.

Abstract: A non-volatile flash memory (100) that may have an improved layout freedom is disclosed. Non-volatile flash memory (100) may include banks (B0 and B1). Each bank (B0 and B1) may include memory cell arrays (MCA00 to MCA03) including a plurality of memory cells (MC) connected to sub bit lines (LB). A plurality of sub bit lines (LB) may be selectively connected to a main bit line (MB) by a group switch (Y1S0 and Y1S1). A group of main bit lines (MB) may be disposed over a memory cell array. A group of main bit lines (MB) may be selectively connected to a sense amplifier block (SAB) by a group switch group (Y2S0 and Y2S1) and a bank switch group (Y3S0 and Y3S1). In this way, a sense amplifier block (SAB) may be shared by a plurality of groups of main bit lines (MB). In this way, layout freedom may be improved.