Patents by Inventor Hisashi Saito
Hisashi Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180204916Abstract: A semiconductor device includes a first nitride semiconductor layer containing Ga, a second nitride semiconductor layer provided on the first nitride semiconductor layer containing Ga, a first electrode and a second electrode provided on or above the first nitride semiconductor layer and electrically connected to the first nitride semiconductor layer, a gate electrode provided between the first electrode and the second electrode, a conductive layer provided on or above the second electrode, of which a first distance to the second electrode is smaller than a second distance between the second electrode and the gate electrode, and which is electrically connected to the first electrode or the gate electrode, a first aluminum oxide layer provided between the gate electrode and the second electrode and provided between the second nitride semiconductor layer and the conductive layer, a silicon oxide layer, and a second aluminum oxide layer.Type: ApplicationFiled: September 5, 2017Publication date: July 19, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo SHIMIZU, Hisashi SAITO, Hiroshi ONO
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Patent number: 10026804Abstract: A semiconductor device according to an embodiment includes: a first GaN based semiconductor layer; a second GaN based semiconductor layer disposed on the first GaN based semiconductor layer and having a bandgap larger than that of the first GaN based semiconductor layer; a source electrode disposed on the second GaN based semiconductor layer; a drain electrode disposed on the second GaN based semiconductor layer; a p-type third GaN based semiconductor layer disposed between the source electrode and the drain electrode on the second GaN based semiconductor layer; a gate electrode disposed on the third GaN based semiconductor layer; and a p-type fourth GaN based semiconductor layer disposed between the gate electrode and the drain electrode on the second GaN based semiconductor layer and disposed separated from the third GaN based semiconductor layer.Type: GrantFiled: March 13, 2015Date of Patent: July 17, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Masahiko Kuraguchi, Hisashi Saito
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Patent number: 9991358Abstract: A semiconductor device according to an embodiment includes a semiconductor region, a gate electrode, and a first gate insulating film provided between the semiconductor region and the gate electrode and containing a material having a chemical composition expressed by (SiO2)n(Si3N4)m (where n and m are positive integers), in the material, at least one silicon atom being bonded with at least one oxygen atom and at least one nitrogen atom.Type: GrantFiled: August 31, 2016Date of Patent: June 5, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Hisashi Saito
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Patent number: 9954092Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer and an insulating layer including an oxide film or an oxynitride film that contacts with the nitride semiconductor layer. The oxide film or the oxynitride film includes at least one impurity selected from the group consisting of boron (B), gallium (Ga), aluminum (Al), and indium (In) and carbon (C). A first peak of a concentration distribution of the at least one impurity in the insulating layer is present in the oxide film or the oxynitride film. A second peak of a concentration distribution of carbon in the insulating layer is present in the oxide film or the oxynitride film. A distance between the first peak and the nitride semiconductor layer is equal to or less than 5 nm, and a distance between the second peak and the nitride semiconductor layer is equal to or less than 5 nm.Type: GrantFiled: February 23, 2017Date of Patent: April 24, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Hisashi Saito
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Publication number: 20180076291Abstract: According to one embodiment, a semiconductor device includes a first element portion. The first element portion includes first and second semiconductor layers, first, second and third electrodes, and a first insulating layer. The first semiconductor layer includes Alx1Ga1-x1N (0?x1<1). The first electrode is separated from the first semiconductor layer. The first electrode includes a polycrystal of a nitride of one of Al or B. The second semiconductor layer includes Alx2Ga1-x2N (x1<x2<1). The second semiconductor layer includes first to third regions. The first region is positioned between the second and third regions. The first region is provided between the first semiconductor layer and the first electrode. The first insulating layer is provided between the first region and the first electrode. The second electrode is electrically connected to the second region. The third electrode is electrically connected to the third region.Type: ApplicationFiled: February 22, 2017Publication date: March 15, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Masahiro KOYAMA, Hisashi Saito, Tatsuo Shimizu, Shinya Nunoue
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Publication number: 20180061974Abstract: A semiconductor device of an embodiment includes a nitride semiconductor layer, a first electrode provided on the nitride semiconductor layer, a second electrode provided on the nitride semiconductor layer, a third electrode provided above the nitride semiconductor layer, the third electrode provided between the first electrode and the second electrode, the third electrode containing a polycrystalline nitride semiconductor containing a p-type impurity, and a first insulating layer provided between the nitride semiconductor layer and the third electrode.Type: ApplicationFiled: March 1, 2017Publication date: March 1, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Hisashi SAITO, Tatsuo SHIMIZU
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Publication number: 20180026107Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer, an insulating layer provided on the nitride semiconductor layer, a first region provided in the nitride semiconductor layer, and a second region which is provided between the first region and the insulating layer in the nitride semiconductor layer and has a higher electric resistivity than the first region.Type: ApplicationFiled: February 13, 2017Publication date: January 25, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Hisashi Saito
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Publication number: 20180026124Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer and an insulating layer including an oxide film or an oxynitride film that contacts with the nitride semiconductor layer. The oxide film or the oxynitride film includes at least one impurity selected from the group consisting of boron (B), gallium (Ga), aluminum (Al), and indium (In) and carbon (C). A first peak of a concentration distribution of the at least one impurity in the insulating layer is present in the oxide film or the oxynitride film. A second peak of a concentration distribution of carbon in the insulating layer is present in the oxide film or the oxynitride film. A distance between the first peak and the nitride semiconductor layer is equal to or less than 5 nm, and a distance between the second peak and the nitride semiconductor layer is equal to or less than 5 nm.Type: ApplicationFiled: February 23, 2017Publication date: January 25, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo SHIMIZU, Hisashi Saito
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Patent number: 9837488Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer; a second semiconductor layer having a larger band gap than the first semiconductor layer; a third semiconductor layer having a smaller band gap than the second semiconductor layer; a first electrode being in contact with the third semiconductor layer; a second electrode being in contact with the third semiconductor layer; and a third electrode provided between the third semiconductor layer in contact with the first electrode, the second semiconductor layer directly below the first electrode, and the first semiconductor layer directly below the first electrode, and the third semiconductor layer in contact with the second electrode, the second semiconductor layer directly below the second electrode, and the first semiconductor layer directly below the second electrode, being in contact with the third semiconductor layer, the second semiconductor layer, and the first semiconductor layer via insulating film.Type: GrantFiled: February 3, 2015Date of Patent: December 5, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hisashi Saito, Masahiko Kuraguchi, Takashi Shinohe
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Patent number: 9818855Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a source electrode provided on the first nitride semiconductor layer; a drain electrode provided on the first nitride semiconductor layer; a gate electrode provided between the source electrode and the drain electrode; a first film provided between the source electrode and the gate electrode and between the gate electrode and the drain electrode; and a second film provided on the first film. The first film is provided on the first nitride semiconductor layer. The first film has a lower hydrogen diffusion coefficient than a hydrogen diffusion coefficient of a silicon oxide film.Type: GrantFiled: August 12, 2016Date of Patent: November 14, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hisashi Saito, Masahiko Kuraguchi, Tatsuo Shimizu, Shintaro Nakano
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Publication number: 20170278934Abstract: A semiconductor device according to an embodiment includes: a substrate having a first plane and a second plane provided on the opposite side of the first plane; a first nitride semiconductor layer provided on the first plane; source electrodes provided on the first nitride semiconductor layer; drain electrodes provided on the first nitride semiconductor layer, each of the drain electrodes provided between the source electrodes; gate electrodes provided on the first nitride semiconductor layer, each of the gate electrodes provided between each of the source electrodes and each of the drain electrodes; a first wire provided on the second plane and electrically connected to the source electrodes; a second wire electrically connected to the drain electrodes; a third wire provided on the second plane and electrically connected to the gate electrodes; and an insulating interlayer provided between the first nitride semiconductor layer and the second wire.Type: ApplicationFiled: December 28, 2016Publication date: September 28, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Yosuke KAJIWARA, Kentaro IKEDA, Hisashi SAITO, Masahiko KURAGUCHI
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Patent number: 9685546Abstract: A semiconductor device of an embodiment includes a first layer, a second layer provided on the first layer, the second layer forming a two-dimensional electron gas in the first layer; a source electrode provided on the second layer, a drain electrode provided on the second layer, a gate electrode provided between the source electrode and the drain electrode on the second layer and a first insulating layer provided between the gate electrode and the drain electrode on the second layer. The first insulating layer includes a first film, a second film having a higher oxygen density than the first film and a first region provided between the first film and the second film. The first region contains at least one first element selected from the group consisting of F, H, and D, the first region having a first peak of concentration of the first element.Type: GrantFiled: February 19, 2016Date of Patent: June 20, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Hisashi Saito
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Patent number: 9620599Abstract: A semiconductor device according an embodiment includes a GaN layer, a GaN-based semiconductor layer provided on the GaN layer and having a wider band gap than the GaN layer, a source electrode electrically connected to the GaN-based semiconductor layer, a drain electrode electrically connected to the GaN-based semiconductor layer, a gate electrode provided in the GaN-based semiconductor layer between the source electrode and the drain electrode, and a gate insulating film provided at least between the GaN layer and the gate electrode, the gate insulating film including a first insulating film and a second insulating film, the first insulating film provided on the GaN layer, the first insulating film having a thickness equal to or greater than 0.2 nm and less than 2 nm, the first insulating film including nitrogen, the second insulating film provided between the first insulating film and the gate electrode, the second insulating film including oxygen.Type: GrantFiled: December 16, 2015Date of Patent: April 11, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hisashi Saito, Miki Yumoto
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Patent number: 9599169Abstract: A friction engagement element (CLx) is provided radially outside of a peripheral wall portion (32) of a clutch drum (30) and configured to be engaged by a piston (40). A piston (70) is provided radially inside of the peripheral wall portion (32) and configured to engage and a friction engagement element (CLz). A first peripheral wall portion (321) of the peripheral wall portion (32) includes through-holes (321a) communicating a radially inside of the first peripheral wall portion (321) with a radially outside thereof. A through-hole (87) is provided radially inside of the piston (70). The piston (70) includes a communication passage (79) radially passing through the piston (70) and communicating the through-hole (87) with the through-holes (321a) such that lubricating oil is supplied through the communication passage (79) and the through-holes (321a) to the radially outside of the clutch drum (30) when the piston (70) is in an initial position.Type: GrantFiled: September 17, 2013Date of Patent: March 21, 2017Assignee: JATCO LTDInventors: Hisashi Saito, Hideharu Yamamoto, Shinya Mochiyama, Atsushi Maeda
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Publication number: 20170077260Abstract: A semiconductor device according to an embodiment includes a semiconductor region, a gate electrode, and a first gate insulating film provided between the semiconductor region and the gate electrode and containing a material having a chemical composition expressed by (SiO2)n(Si3N4)m (where n and m are positive integers), in the material, at least one silicon atom being bonded with at least one oxygen atom and at least one nitrogen atom.Type: ApplicationFiled: August 31, 2016Publication date: March 16, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo SHIMIZU, Hisashi SAITO
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Publication number: 20170077277Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a source electrode provided on the first nitride semiconductor layer; a drain electrode provided on the first nitride semiconductor layer; a gate electrode provided between the source electrode and the drain electrode; a first film provided between the source electrode and the gate electrode and between the gate electrode and the drain electrode; and a second film provided on the first film. The first film is provided on the first nitride semiconductor layer. The first film has a lower hydrogen diffusion coefficient than a hydrogen diffusion coefficient of a silicon oxide film.Type: ApplicationFiled: August 12, 2016Publication date: March 16, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Hisashi Saito, Masahiko Kuraguchi, Tatsuo Shimizu, Shintaro Nakano
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Patent number: 9484421Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer, a plurality of source electrodes provided on the nitride semiconductor layer, a plurality of drain electrodes, a plurality of gate electrodes, a first interconnection having a first distance from the nitride semiconductor layer and electrically connecting the source electrodes, a second interconnection electrically connecting the gate electrodes, and a third interconnection having a third distance from the nitride semiconductor layer and electrically connecting the drain electrodes. Each of the drain electrodes are provided between the source electrodes. Each of the gate electrodes are provided between each of the source electrodes and each of the drain electrodes. The third distance is larger than the first distance.Type: GrantFiled: July 28, 2015Date of Patent: November 1, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Yosuke Kajiwara, Kentaro Ikeda, Hisashi Saito, Masahiko Kuraguchi
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Patent number: 9461122Abstract: A semiconductor device includes: a first GaN based semiconductor layer (hereinafter abbreviated as GaN layer); a second GaN layer on the first GaN layer and having a bandgap larger than that of the first GaN layer; a source electrode on the second GaN layer; a drain electrode on the second GaN layer; a gate electrode between the source electrode and the drain electrode, a gate insulating film between the gate electrode and the first GaN layer, a film thickness of the second GaN layer between the gate electrode and the first GaN layer being thinner than that of the second GaN layer between the source electrode and the first GaN layer; and a p-type third GaN layer between the second GaN layer and an end portion on the drain electrode side of the gate electrode, the gate insulating film between the gate electrode and the third GaN layer.Type: GrantFiled: March 9, 2015Date of Patent: October 4, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Masahiko Kuraguchi, Hisashi Saito
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Publication number: 20160284828Abstract: A semiconductor device of an embodiment includes a first layer, a second layer provided on the first layer, the second layer forming a two-dimensional electron gas in the first layer; a source electrode provided on the second layer, a drain electrode provided on the second layer, a gate electrode provided between the source electrode and the drain electrode on the second layer and a first insulating layer provided between the gate electrode and the drain electrode on the second layer. The first insulating layer includes a first film, a second film having a higher oxygen density than the first film and a first region provided between the first film and the second film. The first region contains at least one first element selected from the group consisting of F, H, and D, the first region having a first peak of concentration of the first element.Type: ApplicationFiled: February 19, 2016Publication date: September 29, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo SHIMIZU, Hisashi Saito
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Publication number: 20160284831Abstract: A semiconductor device of an embodiment includes a first GaN-based semiconductor layer, a second GaN-based semiconductor layer provided on the first GaN-based semiconductor layer and having a larger bandgap than the first GaN-based semiconductor layer, a source electrode provided on the second GaN-based semiconductor layer, a drain electrode provided on the second GaN-based semiconductor layer, a recess provided between the source electrode and the drain electrode in the second GaN-based semiconductor layer, a gate insulating film provided on a surface of the recess, and a gate electrode provided on the gate insulating film and having an end portion in a gate width direction, located in the recess.Type: ApplicationFiled: February 29, 2016Publication date: September 29, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Aya SHINDOME, Masahiko KURAGUCHI, Hisashi SAITO, Shigeto FUKATSU, Miki YUMOTO, Yosuke KAJIWARA