Abstract: Disclosed are a coded video data processing method and apparatus which consider a random access, and a coded video data generating method and apparatus which consider a random access. The coded video data processing method includes obtaining a bitstream of coded video data, obtaining metadata information used for video-processing of pictures having a decoding order after a random access point picture in the bitstream, and performing video-processing on decoded video data among the pictures having the decoding order after the random access point picture, based on the metadata information.

Abstract: A method of etching a metal barrier layer and a metal layer is provided. The method includes forming the metal barrier layer and the metal layer on a substrate, and using an etching composition to etch the metal barrier layer and the metal layer. The etching composition may include an oxidant selected from nitric acid, bromic acid, iodic acid, perchloric acid, perbromic acid, periodic acid, sulfuric acid, methane sulfonic acid, p-toluenesulfonic acid, benzenesulfonic acid, or a combination thereof, a metal etching inhibitor including a compound expressed by Chemical Formula 1, and a metal oxide solubilizer selected from phosphoric acid, phosphate, carboxylic acid having 3 to 20 carbon atoms, or a combination thereof.

Abstract: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.

Abstract: A semiconductor device includes a lower stack structure that includes a lower word line, an upper stack structure that is on the lower stack structure and includes an upper word line, a decoder that is adjacent to the lower stack structure and the upper stack structure, a signal interconnection that is connected to the decoder, a lower selector that is connected to the signal interconnection and further connected to the lower word line, and an upper selector that is connected to the signal interconnection, isolated from direct contact with the lower selector, and further connected to the upper word line.

Abstract: The present disclosure relates to a method for analyzing an electrode for a battery, which has the advantage of being capable of more easily distinguishing between the constituent materials of the electrode such as the electrode active material, the conductive material, and the pores, by using scanning spreading resistance microscopy.

Abstract: A semiconductor device includes a semiconductor substrate including a chip region and an edge region around the chip region, a lower insulating layer on the semiconductor substrate, a chip pad on the lower insulating layer on the chip region, an upper insulating layer provided on the lower insulating layer to cover the chip pad, the upper and different insulating layers including different materials, and a redistribution chip pad on the chip region and connected to the chip pad. The upper insulating layer includes a first portion on the chip region having a first thickness, a second portion on the edge region having a second thickness, and a third portion on the edge region, the third portion extending from the second portion, spaced from the first portion, and having a decreasing thickness away from the second portion. The second thickness is smaller than the first thickness.

Abstract: A semiconductor device includes a semiconductor substrate and a connection terminal, including a base pillar, on the semiconductor substrate. An insulation layer is formed on the semiconductor substrate, the insulation layer including an opening in the insulation layer through which the base pillar extends, wherein a side wall of the insulation layer defining the opening includes a horizontal step at a level that is lower than an uppermost portion of the base pillar.

Abstract: A portable insulin resistance diagnosis device includes: a housing capable of being grasped by an outer periphery thereof and comprising a space formed therein; a sensor unit which protrudes towards the outside of the housing and detects glucose and proteins in blood when a blood sample of a target specimen is dropped on the sensor unit, a diagnosis unit, which is provided inside the housing, amplifying an electrical signal generated according to concentrations of the blood glucose and proteins detected in the sensor unit, converting the electrical signal into a digital signal, and determining whether insulin resistance is normal; and a display unit, which is provided on an external surface of the housing, displaying whether insulin resistance analyzed in the diagnosis unit is normal.

Abstract: Various examples of the present invention relate to an apparatus and a method for controlling a connection and an operation of an antenna in an electronic device.

Abstract: A spatial image projection device includes a housing, a display unit that is accommodated in the housing and configured to output a hologram image, a half-mirror configured to project a spatial image corresponding to the hologram image inside the housing, and a first polarizing film that is disposed outside the housing and configured to block a part of light directed toward a viewer from the housing.

Abstract: Etchant compositions described herein include etchant compositions for etching a silicon film and may include nitric acid, fluoric acid, phosphoric acid, acetic acid, a nitrogen compound, and water. The nitrogen compound may include fluorine (F), phosphorus (P), and/or carbon (C). Also described are methods of manufacturing an integrated circuit (IC) device. The methods may include providing a structure in which a silicon film doped at a first dopant concentration and an epitaxial film doped at a second dopant concentration are stacked. The second dopant concentration may be different from the first dopant concentration. The silicon film may be selectively etched from the structure by using an etchant composition.

Abstract: A polishing composition and a method of fabricating a semiconductor device using the same, the polishing composition including an abrasive; a first additive that includes a C5 to C30 hydrocarbon including an amide group and a carboxyl group or a C5 to C30 hydrocarbon including two or more amine groups; and a second additive that includes a sulfonic acid, a sulfonate, or a sulfonate salt.

Abstract: Provided is a redox flow battery stack comprising: an ion-exchange membrane (1000); two flow frames (2000A, 2000B) disposed on both sides of the ion-exchange membrane (1000), respectively; two bipolar plates (4000A, 4000B) disposed outside the flow frames (2000A, 2000B), respectively; and electrodes disposed in cavities inside outer frames of the flow frames (2000A, 2000B), respectively, in which at least two electrodes are disposed in the flow frames, respectively, and at least three furrows in which the electrolyte flows are formed between electrodes or between the electrode and the outer frame in the flow frame.

Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.

Abstract: Disclosed is a method of etching a metal barrier layer and a metal layer. The method includes forming the metal barrier layer and the metal layer on a substrate, and using an etching composition to etch the metal barrier layer and the metal layer. The etching composition may include an oxidant selected from nitric acid, bromic acid, iodic acid, perchloric acid, perbromic acid, periodic acid, sulfuric acid, methane sulfonic acid, p-toluenesulfonic acid, benzenesulfonic acid, or a combination thereof, a metal etching inhibitor including a compound expressed by Chemical Formula 1, and a metal oxide solubilizer selected from phosphoric acid, phosphate, carboxylic acid having 3 to 20 carbon atoms, or a combination thereof.

Abstract: Disclosed is an apparatus and method of processing substrate, which facilitates to improve deposition uniformity of a thin film deposited on a substrate, and to control quality of a thin film, wherein the apparatus includes a process chamber; a substrate supporter for supporting at least one of substrates, wherein the substrate supporter is provided in the bottom of the process chamber; a chamber lid confronting the substrate supporter, the chamber lid for covering an upper side of the process chamber; and a gas distributor for locally distributing activated source gas on the substrate, wherein the gas distributor locally confronting the substrate supporter is provided in the chamber lid, wherein the gas distributor forms plasma by the use of plasma formation gas, and activates the source gas by distributing the source gas to some of plasma area for formation of the plasma.

Abstract: A three-dimensional semiconductor device includes a first substrate, a second substrate on the first substrate, the second substrate including pattern portions and a plate portion covering the pattern portions, the plate portion having a width greater than a width of each of the pattern portions and being connected to the pattern portions, a lower structure between the first substrate and the second substrate, horizontal conductive patterns on the second substrate, the horizontal conductive patterns being stacked while being spaced apart from each other in a direction perpendicular to an upper surface of the second substrate, and a vertical structure on the second substrate and having a side surface opposing the horizontal conductive patterns.

Abstract: The present invention relates to a polishing composition, and more particularly, to a chemical mechanical polishing (CMP) composition used to chemically and mechanically polish a semiconductor wafer. The polishing composition of the present invention, by comprising anion-modified silica polishing particles in which the zeta potential (?) is ??10 mV, can exhibit excellent polishing performance, and more specifically, which can achieve a high polishing rate with respect to an indium-containing polishing substrate, while improving the dispersibility of the composition and reducing residual defects on the substrate.

Abstract: The semiconductor device includes a substrate including an integrated circuit and a contact that are electrically connected to each other, an insulation layer covering the substrate and including metal lines, and a through electrode electrically connected to the integrated circuit. The insulation layer includes an interlayer dielectric layer on the substrate and an intermetal dielectric layer on the interlayer dielectric layer. The metal lines include a first metal line in the interlayer dielectric layer and electrically connected to the contact, and a plurality of second metal lines in the intermetal dielectric layer and electrically connected to the first metal line and the through electrode. The through electrode includes a top surface higher than a top surface of the contact.

Abstract: A method and an apparatus for managing power of a Wireless Local Area Network (WLAN) module in a portable terminal are provided. In the method, the WLAN module is operated according to a Power Save Mechanism (PSM). Whether the portable terminal operates in a sleep state is determined. At least one of a beacon interval and a Delivery Traffic Indication Map (DTIM) interval of the PSM is changed depending on whether the portable terminal operates in the sleep state.