Patents by Inventor Hsiang Wang
Hsiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12388010Abstract: Improved control of via anchor profiles in metals at a contact layer can be achieved by slowing down an anchor etching process and by introducing a passivation operation. By first passivating a metallic surface, etchants can be prevented from dispersing along grain boundaries, thereby distorting the shape of the via anchor. An iterative scheme that involves multiple cycles of alternating passivation and etching operations can control the formation of optimal via anchor profiles. When a desirable anchor shape is achieved, the anchor maintains structural integrity of the vias, thereby improving reliability of the interconnect structure.Type: GrantFiled: September 1, 2022Date of Patent: August 12, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Shin Wang, Yu-Hsiang Wang, Wei-Ting Chang, Fan-Yi Hsu
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Patent number: 12381551Abstract: A method (of decoupling from voltage variations in a first voltage drop between first and second reference voltage rails) includes: electrically coupling one or more components to form a decoupling capacitance (decap) circuit; electrically coupling one or more components to form a filtered biasing circuit; and making an unswitched series electrical coupling of the decap circuit and the filtered biasing circuit between the first and second reference voltage rails.Type: GrantFiled: March 13, 2023Date of Patent: August 5, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Szu-Lin Liu, Yi-Hsiang Wang, Jaw-Juinn Horng
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Patent number: 12376380Abstract: An electronic device includes a substrate, a signal line, a semiconductor, a first conductive portion and a second conductive portion. The signal line is disposed on the substrate. The semiconductor is disposed on the substrate and overlapped with the signal line. Wherein the semiconductor is electrically connected to the first conductive portion and the second conductive portion. Wherein in a top view, at least a portion of the signal line is disposed between the first conductive portion and the second conductive portion. Wherein the first conductive portion has a first curve edge, the second conductive portion has a second curve edge, and the first curve edge and the second curve edge are facing the at least a portion of the signal line and are convex toward the at least a portion of the signal line.Type: GrantFiled: May 21, 2024Date of Patent: July 29, 2025Assignee: INNOLUX CORPORATIONInventors: Cheng-Hsiung Chen, Pei-Chieh Chen, Chao-Hsiang Wang, Yi-Ching Chen
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Publication number: 20250241038Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.Type: ApplicationFiled: April 8, 2025Publication date: July 24, 2025Applicant: UNITED MICROELECTRONICS CORP.Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
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Patent number: 12366693Abstract: An image sensor includes a group of sensor units and a color filter layer disposed within the group of sensor units. The image sensor further includes a dielectric structure and a plurality of polarization splitters disposed corresponding to the color filter layer. Each of the plurality of polarization splitters has a first meta element extending in a first direction from top view and a second meta element extending in a second direction from top view. The second direction is perpendicular to the first direction.Type: GrantFiled: October 12, 2022Date of Patent: July 22, 2025Assignee: VISERA TECHNOLOGIES COMPANY LIMITEDInventors: Chun-Yuan Wang, Yu-Chi Chang, Po-Hsiang Wang
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Patent number: 12363938Abstract: In some embodiments, the present disclosure relates to a semiconductor device. The semiconductor device includes a channel layer over a base substrate and an active layer over the channel layer. A source and a drain are over the active layer. A gate is over the active layer and laterally between the source and the drain. A dielectric is over the active layer and laterally surrounds the source, the drain, and the gate. A cap structure laterally contacts the source and is disposed laterally between the gate and the source. The source vertically extends to a top of the cap structure.Type: GrantFiled: June 11, 2024Date of Patent: July 15, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
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Patent number: 12356745Abstract: The optical device includes a first photodiode, a second photodiode, and a hybrid absorber. The hybrid absorber is disposed above the first photodiode and the second photodiode. The hybrid absorber includes a color filter layer and a plurality of metal-insulator-metal structures. The color filter layer includes a first color filter disposed on the first photodiode and a second color filter disposed on the second photodiode, in which the first color filter is different from the second color filter. The plurality of metal-insulator-metal structures are disposed above the first photodiode and free of disposed above the second photodiode.Type: GrantFiled: March 29, 2022Date of Patent: July 8, 2025Assignee: VisEra Technologies Company Ltd.Inventors: Kai-Hao Chang, An-Li Kuo, Chun-Yuan Wang, Shin-Hong Kuo, Po-Hsiang Wang, Zong-Ru Tu, Yu-Chi Chang, Chih-Ming Wang
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Publication number: 20250212484Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first source contact, a drain contact, and a first gate structure disposed over a substrate. The first gate structure is between the first source contact and the drain contact along a first direction. The first gate structure surrounds the first source contact. An isolation region is disposed within the substrate and surrounds an active area. A second gate structure surrounds a second source contact. The second gate structure is separated from the first gate structure by the drain contact. Both the first gate structure and the second gate structure are at least partially within the active area.Type: ApplicationFiled: March 13, 2025Publication date: June 26, 2025Inventors: Aurelien Gauthier Brun, Chun Lin Tsai, Jiun-Lei Jerry Yu, Po-Chih Chen, Yun-Hsiang Wang
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Patent number: 12324647Abstract: Methods, apparatus and systems for enhanced wireless monitoring of vital signs are described. In one example, a described system comprises: a transmitter configured to transmit a wireless signal through a wireless channel of a venue; a receiver configured to receive the wireless signal through the wireless channel; and a processor. The received wireless signal differs from the transmitted wireless signal due to the wireless channel that is impacted by a periodic motion of a vital sign of an object in the venue. The processor is configured for: obtaining a time series of channel information (CI) of the wireless channel based on the received wireless signal, computing a two dimensional (2D) decomposition of the time series of CI (TSCI), enhancing the 2D decomposition, and monitoring the periodic motion of the vital sign based on the enhanced 2D decomposition.Type: GrantFiled: October 4, 2022Date of Patent: June 10, 2025Assignee: ORIGIN RESEARCH WIRELESS, INC.Inventors: Beibei Wang, Sakila Sandeepani Jayaweera Samaranayake Arachchige Dona, Xiaolu Zeng, Wei-Hsiang Wang, K. J. Ray Liu, Oscar Chi-Lim Au
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Publication number: 20250177605Abstract: The present invention provides a calcium phosphate ceramic with trace elements, wherein a main component of the calcium phosphate ceramic is selected from a group consisting of hydroxyapatite (HA), ?-tricalcium phosphate (?-TCP), ?-tricalcium phosphate (?-TCP), tetracalcium phosphate (TTCP) and any combination thereof; the calcium phosphate ceramic comprises various trace elements, at least including Mg, Sr, Na and Fe. The calcium phosphate ceramic is high biocompatible and non-cytotoxic, meanwhile demonstrates extraordinary features of osteoinductivity, osteoconductivity, osteogenesis activity and achieves the purpose of bone repair.Type: ApplicationFiled: January 2, 2024Publication date: June 5, 2025Applicant: NATIONAL UNIVERSITY OF KAOHSIUNGInventors: Wen-Fu Ho, Peng-Hsiang Wang
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Patent number: 12324211Abstract: The present disclosure relates to a transistor device. The transistor device includes a plurality of source contacts disposed over a substrate. A plurality of gate structures are disposed over the substrate. The plurality of gate structures wrap around one or more of the plurality of source contacts in one or more closed loops. A drain contact is disposed over the substrate. The drain contact continuously wraps around one or more of the plurality of gate structures as a continuous structure. The plurality of gate structures are separated from the drain contact by a first distance and are separated from a source contact of the plurality of source contacts by a second distance. The second distance is different than the first distance.Type: GrantFiled: April 18, 2023Date of Patent: June 3, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Aurelien Gauthier Brun, Chun Lin Tsai, Jiun-Lei Jerry Yu, Po-Chih Chen, Yun-Hsiang Wang
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Publication number: 20250160047Abstract: A photodiode includes a substrate, a rectifying layer, a buffer layer, a transition layer, an active layer, and an absorption layer. The substrate has a base lattice constant. The rectifying layer is formed on the substrate, and includes an InGaP layer, an AlGaAs layer, and an InGaAs layer which are stacked on the substrate in that order. The rectifying layer includes a connecting layer that is made of GaAs directly formed on one of the InGaP layer and the InGaAs layer. The buffer layer is made of GaAs and stacked on the rectifying layer. The transition layer is formed on the buffer layer, and includes a plurality of sub-layers that each has a lattice constant greater than the base constant but smaller than a designated constant. The active layer is formed on the transition layer and has the designated constant. The absorption layer is formed on the active layer.Type: ApplicationFiled: February 8, 2024Publication date: May 15, 2025Applicant: LandMark Optoelectronics CorporationInventors: Hung-Wen HUANG, Yung-Chao CHEN, Yi-Hsiang WANG
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Patent number: 12300743Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.Type: GrantFiled: May 16, 2024Date of Patent: May 13, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
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Publication number: 20250151435Abstract: A solid-state image sensor is provided. The solid-state image sensor includes photoelectric conversion elements and a color filter layer disposed above the photoelectric conversion elements. The color filter layer has a first color filter segment and a second color filter segment adjacent to the first color filter segment. The first color filter segment and the second color filter segment correspond to different colors. The solid-state image sensor also includes a shielding grid structure disposed between the first color filter segment and the second color filter segment. The shielding grid structure is divided into a first shielding segment and a second shielding segment. The solid-state image sensor further includes a meta structure disposed above the color filter layer. In a top view, the second shielding segment is formed as a triangle, a rectangle, or a combination thereof.Type: ApplicationFiled: November 3, 2023Publication date: May 8, 2025Inventors: Ching-Hua LI, Chun-Yuan WANG, Po-Hsiang WANG, Han-Lin WU, Hung-Jen TSAI
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Publication number: 20250147171Abstract: The application discloses a motion detection method and an electronic device applying the same. A plurality of transmission packets are transmitted and a plurality of received packets are received. A received packet among the plurality of received packets is compensated into a compensated received packet. Cross packet cancellation is performed on the compensated received packet. A packet difference between the compensated received packet and another received packet among the plurality of received packets is determined. Whether an object is detected based on the packet difference is determined.Type: ApplicationFiled: November 8, 2024Publication date: May 8, 2025Inventors: Tsung-Han Tsai, Hsuan-Yu Liu, Jun-Shen Chen, Ting-Hsiang Wang, I-Ying Liu
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Patent number: 12292483Abstract: A circuit for parameter PSRR measurement includes a filter, a first regulator and a second regulator. The filter may be configured for receiving an AC input signal and a DC input signal, and for outputting a combined output signal according to the AC input signal and the DC input signal. The first regulator may be configured for receiving the combined output signal, and for outputting a first output signal having a first AC component signal and a first DC component signal. The second regulator may be configured for receiving the first output signal, and for outputting a second output signal having a second AC component signal and a second DC component signal. A parameter PSRR of the second regulator may be obtained according to a ratio between the second AC component signal and the first AC component signal.Type: GrantFiled: November 23, 2023Date of Patent: May 6, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Amit Kundu, Jaw-Juinn Horng, Yi-Hsiang Wang
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Publication number: 20250143191Abstract: A magnetic tunnel junction (MTJ) memory cell comprising a connection via structure, a bottom electrode disposed on the connection via structure, a memory material stack disposed on the bottom electrode, and a conductive contact structure disposed on the memory material stack, in which a bottom surface of the conductive contact structure is in direct contact with a memory material layer of the memory material stack.Type: ApplicationFiled: January 3, 2025Publication date: May 1, 2025Inventors: Hsing-Hsiang WANG, Jiann-Horng LIN, Yu-Feng YIN, Huan-Just LIN
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Publication number: 20250141715Abstract: Wireless sensing using measurement enhancement is described. In one example, a described method comprises: receiving a wireless signal transmitted by a transmitter through a wireless multipath channel of a venue, wherein the received wireless signal differs from the transmitted wireless signal due to the wireless multipath channel and a motion of an object in the venue; obtaining a time series of channel information (TSCI) of the wireless multipath channel based on the received wireless signal, wherein each channel information (CI) comprises N1 CI components (CIC); for each respective CI having N1 CIC of the TSCI, computing a respective enhanced CI (ECI) having N2 CIC; computing a motion information (MI) based on the ECI of the TSCI; and performing a sensing task based on the MI.Type: ApplicationFiled: December 22, 2024Publication date: May 1, 2025Inventors: Wei-Hsiang Wang, Beibei Wang, Yuqian Hu, Guozhen Zhu, K. J. Ray Liu, Oscar Chi-Lim Au
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Publication number: 20250139738Abstract: High resolution human imaging using neural network is described. In one example, a described method comprises: assembling a k1-dimensional (k1-D) imaging matrix by a processor based on arranging and concatenating a plurality of k2-dimensional (k2-D) input imaging matrices; encoding the k1-D imaging matrix by an encoder, which is a k1-D encoding neural network, to generate a (k1+k3)-D first intermediate matrix; generating a (k2+k3)-D second intermediate matrix based on the (k1+k3)-D first intermediate matrix; and decoding the (k2+k3)-D second intermediate matrix by a decoder, which is a k2-D decoding neural network, to generate a k2-D output imaging matrix. There is at least one skip connection between the encoder and the decoder. An imaging resolution of the k2-D output imaging matrix is greater than the imaging resolution of any one of the plurality of k2-D input imaging matrices.Type: ApplicationFiled: December 28, 2024Publication date: May 1, 2025Inventors: Sakila S. Jayaweera, Sai Deepika Regani, Yuqian Hu, Guozhen Zhu, Wei-Hsiang Wang, Beibei Wang, K. J. Ray Liu, Oscar Chi-Lim Au
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Patent number: 12283335Abstract: The present invention provides a storage device suitable for high temperature. A plurality of memory devices are disposed on the top of a substrate, respectively, and connected electrically to a control device and a temperature sensor. The temperature sensor includes a first predetermined temperature, a second predetermined temperature, and a third predetermined temperature. The temperature sensor is used for sensing the temperature of the plurality of memory devices and generating a temperature value. The control device adjusts the transmission rate of the storage signal to make the storage device adapt to high temperature environments.Type: GrantFiled: June 15, 2023Date of Patent: April 22, 2025Assignee: TEAM GROUP INC.Inventors: Chin Feng Chang, Hsun Chia Ma, Wei Hsiang Wang