Abstract: A solid-state image sensor is provided. The solid-state image sensor includes photoelectric conversion elements and a color filter layer disposed above the photoelectric conversion elements. The color filter layer has a first color filter segment and a second color filter segment adjacent to the first color filter segment. The first color filter segment and the second color filter segment correspond to different colors. The solid-state image sensor also includes a shielding grid structure disposed between the first color filter segment and the second color filter segment. The shielding grid structure is divided into a first shielding segment and a second shielding segment. The solid-state image sensor further includes a meta structure disposed above the color filter layer. In a top view, the second shielding segment is formed as a triangle, a rectangle, or a combination thereof.

Abstract: The application discloses a motion detection method and an electronic device applying the same. A plurality of transmission packets are transmitted and a plurality of received packets are received. A received packet among the plurality of received packets is compensated into a compensated received packet. Cross packet cancellation is performed on the compensated received packet. A packet difference between the compensated received packet and another received packet among the plurality of received packets is determined. Whether an object is detected based on the packet difference is determined.

Abstract: A circuit for parameter PSRR measurement includes a filter, a first regulator and a second regulator. The filter may be configured for receiving an AC input signal and a DC input signal, and for outputting a combined output signal according to the AC input signal and the DC input signal. The first regulator may be configured for receiving the combined output signal, and for outputting a first output signal having a first AC component signal and a first DC component signal. The second regulator may be configured for receiving the first output signal, and for outputting a second output signal having a second AC component signal and a second DC component signal. A parameter PSRR of the second regulator may be obtained according to a ratio between the second AC component signal and the first AC component signal.

Abstract: A magnetic tunnel junction (MTJ) memory cell comprising a connection via structure, a bottom electrode disposed on the connection via structure, a memory material stack disposed on the bottom electrode, and a conductive contact structure disposed on the memory material stack, in which a bottom surface of the conductive contact structure is in direct contact with a memory material layer of the memory material stack.

Abstract: Wireless sensing using measurement enhancement is described. In one example, a described method comprises: receiving a wireless signal transmitted by a transmitter through a wireless multipath channel of a venue, wherein the received wireless signal differs from the transmitted wireless signal due to the wireless multipath channel and a motion of an object in the venue; obtaining a time series of channel information (TSCI) of the wireless multipath channel based on the received wireless signal, wherein each channel information (CI) comprises N1 CI components (CIC); for each respective CI having N1 CIC of the TSCI, computing a respective enhanced CI (ECI) having N2 CIC; computing a motion information (MI) based on the ECI of the TSCI; and performing a sensing task based on the MI.

Abstract: High resolution human imaging using neural network is described. In one example, a described method comprises: assembling a k1-dimensional (k1-D) imaging matrix by a processor based on arranging and concatenating a plurality of k2-dimensional (k2-D) input imaging matrices; encoding the k1-D imaging matrix by an encoder, which is a k1-D encoding neural network, to generate a (k1+k3)-D first intermediate matrix; generating a (k2+k3)-D second intermediate matrix based on the (k1+k3)-D first intermediate matrix; and decoding the (k2+k3)-D second intermediate matrix by a decoder, which is a k2-D decoding neural network, to generate a k2-D output imaging matrix. There is at least one skip connection between the encoder and the decoder. An imaging resolution of the k2-D output imaging matrix is greater than the imaging resolution of any one of the plurality of k2-D input imaging matrices.

Abstract: The present invention provides a storage device suitable for high temperature. A plurality of memory devices are disposed on the top of a substrate, respectively, and connected electrically to a control device and a temperature sensor. The temperature sensor includes a first predetermined temperature, a second predetermined temperature, and a third predetermined temperature. The temperature sensor is used for sensing the temperature of the plurality of memory devices and generating a temperature value. The control device adjusts the transmission rate of the storage signal to make the storage device adapt to high temperature environments.

Abstract: In some embodiments, the present disclosure relates to a method of forming a transistor device. The method includes forming a source contact over a substrate, forming a drain contact over the substrate, and forming a gate contact material over the substrate. The gate contact material is patterned to define a gate structure that wraps around the source contact along a continuous and unbroken path.

Abstract: The present disclosure provides a low drop-out (LDO) circuit. The LDO circuit includes an input terminal, an output terminal, a cascode operational amplifier, and a power stage. The cascode operational amplifier is electrically connected to the input terminal. The power stage has a first terminal electrically connected to the input terminal, a second terminal electrically connected to an output node of the cascode operational amplifier, and a third terminal electrically connected to the output terminal.

Abstract: An image sensor includes a first pixel array. The first pixel array includes multiple photo diodes and a polyhedron structure. The polyhedron structure is located above the photo diodes, and the polyhedron structure includes a bottom facet, a top facet, and at least one side facet. The bottom facet is located between the side facet and the photo diodes, and an orthogonal projection of the polyhedron structure overlaps with photo diodes. The polyhedron structure is configured to divide an incident light into a plurality of light beams focused in the photo diodes.

Abstract: An image sensor includes a sensor layer and a color filter layer disposed on the sensor layer. The image sensor further includes a lens layer disposed on the color filter layer. The lens layer includes a plurality of micro lenses. The image sensor further includes a first cut filter layer disposed over the lens layer. The first surface of the first cut filter layer has a plurality of first protrusions.

Abstract: A display device includes a display panel having a plurality of sub-pixel areas, each including a pixel circuit, each pixel circuit including: a diode, configured to be in a forward-biasing state during a display phase of the pixel circuit for light-emitting and configured to be in a reverse-biasing state in a sensing phase of the pixel circuit to generate a sensing voltage; a driving transistor for driving the diode during the display phase; a readout transistor, with a gate receiving the sensing voltage during the sensing phase to serve as a source follower; first to seventh transistors, gate control signals applied to the gates of the first to seventh transistors so that the pixel circuit switches between the display phase and the sensing phase; and a capacitor for storing a data voltage to be written to the diode in the display phase.

Abstract: A pixel package includes an electrode structure, a plurality of light-emitting units arranged on the electrode structure, and a light transmitting layer. The electrode structure has an upper layer with a first upper sheet, a lower layer with a first lower sheet, and a supporting layer arranged between the upper layer and the lower layer. The electrode structure and the plurality of light-emitting units are fully embedded in the light transmitting layer. In a top view of the pixel package, the first upper sheet is overlapped with and larger than the first lower sheet.

Abstract: The present disclosure relates to an integrated chip processing tool. The integrated chip processing tool includes a gas distribution ring configured to extend along a perimeter of a process chamber. The gas distribution ring includes a lower ring extending around the process chamber. The lower ring has a plurality of gas inlets arranged along a bottom surface of the lower ring and a plurality of gas conveyance channels arranged along an upper surface of the lower ring directly over the plurality of gas inlets. The gas distribution ring further includes an upper ring disposed on the upper surface of the lower ring and covering the plurality of gas conveyance channels. A plurality of gas outlets are arranged along opposing ends of the plurality of gas conveyance channels. A plurality of gas conveyance paths extending between the plurality of gas inlets and the plurality of gas outlets have approximately equal lengths.

Abstract: A overload protection switch with a reverse restart switching structure that has a seesaw lampshade provided with a protruding block which extending downward from the outside of the seesaw lampshade to ensure that the seesaw lampshade and the moving rod are accurately positioned in the ON and OFF positions in the housing to form a three-stage switching type with bidirectional positioning and forms an overload protection switch that can continuously maintain sufficient insulation distance and does not reduce the insulation distance due to fatigue decay of the binary alloy conductive plate.

Abstract: The present disclosure provides a printed circuit board and a method thereof. The printed circuit board has a first substrate, at least one first trace layer and at least one second trace layer. The first substrate has a first surface and a second surface. The first surface and the second surface are corresponding to each other along an axis. The first trace layer is formed on the first surface and/or the second surface of the first substrate. The first trace layer has at least one first trace and at least one first gap beside the first trace by etching. The second trace layer is formed on the first trace layer. The second trace layer has at least one second trace and at least one second gap beside the second trace by etching.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes receiving a structure comprising a metal feature, a first passivation structure over the metal feature, and a first opening extending through the first passivation structure and exposing the metal feature. The exemplary method also includes forming a conductive layer in the first opening; forming a second passivation structure over the conductive layer, performing a first etching process to form a second opening extending through the second passivation structure and exposing the conductive layer, performing a second etching process to selectively remove an upper portion of the second passivation structure to enlarge an upper portion of the second opening, and after the performing of the second etching process, forming a conductive feature in the second opening.

Abstract: The present invention relates to an image sensing device comprising: an image sensing array and an image processing circuit. The image sensing array includes sensing units, and the sensing units respectively generate multiple pieces of pixel data. The multiple pieces of pixel data are generated according to different frame rates under different exposure periods, and include a first pixel data of a first subframe and a second pixel data of a second subframe. The first pixel data is generated by exposing a first exposure period for a first frame rate, and the second pixel data is generated by exposing a second exposure period for a second frame rate. The first frame rate is less than the second frame rate. The first exposure period is greater than the second exposure period, and multiple pieces of the second pixel data are generated during one image capturing operation.

Abstract: A magnetic tunnel junction (MTJ) memory cell comprising a connection via structure, a bottom electrode disposed on the connection via structure, a memory material stack disposed on the bottom electrode, and a conductive contact structure disposed on the memory material stack, in which a bottom surface of the conductive contact structure is in direct contact with a memory material layer of the memory material stack.

Abstract: An electronic device includes a chassis, a support bracket and a cable clip. The support bracket is disposed in the chassis. The cable clip includes a retainer and a fixing structure. The retainer is curved with a radian and formed with a curved accommodation space. The fixing structure extends from a back of the retainer. The cable clip is fixed on the support bracket by the fixing structure.