Patents by Inventor Hsiang Wang

Hsiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929043
    Abstract: A detection circuit is used for a display controller configured to generate a plurality of backlight data according to a plurality of image data. The detection circuit includes a resize circuit and a comparison circuit. The resize circuit is configured to receive the plurality of image data and convert the plurality of image data into a plurality of region data. The comparison circuit, coupled to the resize circuit, is configured to: receive at least one first region data from the resize circuit; receive at least one first backlight data corresponding to the at least one first region data from the display controller; compare the at least one first region data with the at least one first backlight data to generate a comparison result; and output a control signal to control an output setting of the display controller according to the comparison result.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: March 12, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventor: Chun-Hsiang Wang
  • Patent number: 11925457
    Abstract: A device for encouraging and guiding a spirometer user includes a housing, a main valve, a visual assembly, and a sound making assembly. The housing has a guiding channel, a first outlet channel, a second outlet channel, and an inlet channel. The main valve is disposed in a housing communicating with the guiding channel, the first outlet channel, the second outlet channel or the inlet channel and configured to regulate or control fluid flowing paths. The visual assembly includes a check valve in the second outlet channel, and at least one movable member. The sound making assembly includes a check valve and a sound maker. So, it can generate the visual and sound encouraging effects for learning how to use a spirometer correctly.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: March 12, 2024
    Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, CENTRAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Ming-Feng Wu, Yu-Hsuan Chen, Kuo-Chih Su, Chun-Hsiang Wang
  • Publication number: 20240079315
    Abstract: Improved control of via anchor profiles in metals at a contact layer can be achieved by slowing down an anchor etching process and by introducing a passivation operation. By first passivating a metallic surface, etchants can be prevented from dispersing along grain boundaries, thereby distorting the shape of the via anchor. An iterative scheme that involves multiple cycles of alternating passivation and etching operations can control the formation of optimal via anchor profiles. When a desirable anchor shape is achieved, the anchor maintains structural integrity of the vias, thereby improving reliability of the interconnect structure.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Shin WANG, Yu-Hsiang Wang, Wei-Ting Chang, Fan-Yi Hsu
  • Patent number: 11923437
    Abstract: A method includes forming isolation regions extending into a semiconductor substrate. A semiconductor strip is between the isolation regions. The method further includes recessing the isolation regions so that a top portion of the semiconductor strip protrudes higher than top surfaces of the isolation regions to form a semiconductor fin, measuring a fin width of the semiconductor fin, generating an etch recipe based on the fin width, and performing a thinning process on the semiconductor fin using the etching recipe.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsu-Hui Su, Chun-Hsiang Fan, Yu-Wen Wang, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20240021634
    Abstract: An image sensor includes groups of sensor units, and a color filter layer having color units that disposed within the groups of sensor units, respectively. The color units of the color filter layer include a yellow color unit or a white color unit. The image sensor further includes a dielectric structure disposed on the color filter layer, and a meta surface disposed on the dielectric structure.
    Type: Application
    Filed: February 23, 2023
    Publication date: January 18, 2024
    Inventors: Chun-Yuan WANG, Chih-Ming WANG, Po-Hsiang WANG, Han-Lin WU
  • Patent number: 11869910
    Abstract: The present disclosure provides a light sensing element including a unit. The unit includes a plurality of photodiodes, a color filter disposed above the photodiodes, and a light host embedded in the color filter. The light host is a hollow structure disposed above the photodiodes. The color filter includes a first portion surrounding the light host, a second portion surrounded by the light host, and a third portion covering and physically contacting the first portion, the light host, and the second portion.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: January 9, 2024
    Assignee: VisEra Technologies Company Ltd.
    Inventors: Ching-Hua Li, Zong-Ru Tu, Po-Hsiang Wang, Han-Lin Wu
  • Patent number: 11860238
    Abstract: A circuit for parameter PSRR measurement includes a filter, a first regulator and a second regulator. The filter may be configured for receiving an AC input signal and a DC input signal, and for outputting a combined output signal according to the AC input signal and the DC input signal. The first regulator may be configured for receiving the combined output signal, and for outputting a first output signal having a first AC component signal and a first DC component signal. The second regulator may be configured for receiving the first output signal, and for outputting a second output signal having a second AC component signal and a second DC component signal. A parameter PSRR of the second regulator may be obtained according to a ratio between the second AC component signal and the first AC component signal.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: January 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Amit Kundu, Jaw-Juinn Horng, Yi-Hsiang Wang
  • Publication number: 20230420222
    Abstract: The present disclosure relates to an integrated chip processing tool. The integrated chip processing tool includes a gas distribution ring configured to extend along a perimeter of a process chamber. The gas distribution ring includes a lower ring extending around the process chamber. The lower ring has a plurality of gas inlets arranged along a bottom surface of the lower ring and a plurality of gas conveyance channels arranged along an upper surface of the lower ring directly over the plurality of gas inlets. The gas distribution ring further includes an upper ring disposed on the upper surface of the lower ring and covering the plurality of gas conveyance channels. A plurality of gas outlets are arranged along opposing ends of the plurality of gas conveyance channels. A plurality of gas conveyance paths extending between the plurality of gas inlets and the plurality of gas outlets have approximately equal lengths.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: Po-Hsiang Wang, Min-Chang Ching, Kuo Liang Lu, Bo-Han Chu
  • Patent number: 11853092
    Abstract: A device is provided. The device includes an operational amplifier, an output circuit, a first capacitor, and a second capacitor. The operational amplifier is configured to generate an output according to a feedback signal. The output circuit is configured to generate a first current signal in response to a supply voltage and the output of the operational amplifier. The first current signal includes a first ripple signal. The first capacitor and the second capacitor are coupled in parallel between the operational amplifier and the output circuit. The first capacitor is configured to receive the first current signal and feedback to the operational amplifier the first ripple signal.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Hsiang Wang, Jaw-Juinn Horng
  • Publication number: 20230413430
    Abstract: The present disclosure provides a printed circuit board and a method thereof. The printed circuit board has a first substrate, at least one first trace layer and at least one second trace layer. The first substrate has a first surface and a second surface. The first surface and the second surface are corresponding to each other along an axis. The first trace layer is formed on the first surface and/or the second surface of the first substrate. The first trace layer has at least one first trace and at least one first gap beside the first trace by etching. The second trace layer is formed on the first trace layer. The second trace layer has at least one second trace and at least one second gap beside the second trace by etching.
    Type: Application
    Filed: August 3, 2022
    Publication date: December 21, 2023
    Inventors: Po-Hsiang Wang, Ming-Hao Wu
  • Publication number: 20230395562
    Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.
    Type: Application
    Filed: August 15, 2023
    Publication date: December 7, 2023
    Applicant: EPISTAR CORPORATION
    Inventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
  • Publication number: 20230389346
    Abstract: The present disclosure relates to structures and methods of quantum devices. A quantum device comprises a substrate with an insulation surface and at least one quantum component disposed on the insulation surface of the substrate. The at least one quantum component may comprise multiple plateau members and at least one quantum dot. Each plateau member is disposed at an angle against an adjacent plateau member. Each quantum dot is formed within an insulation body and disposed at an included-angle location of two adjacent plateau members of the multiple plateau members. In addition, the at least one quantum component is operable under high temperature, such as above 4 K.
    Type: Application
    Filed: June 8, 2022
    Publication date: November 30, 2023
    Inventors: Pei-Wen LI, I-Hsiang WANG, Po-Yu HONG
  • Publication number: 20230388679
    Abstract: The present invention relates to an image sensing structure, including: a sensing circuit, a storage circuit and a processing circuit. The sensing circuit is used to generate multiple sensing signals in different periods; the storage circuit is used to store the sensing signals. The storage circuit sequentially outputs a first sensing signal of a target object in a first period and a second sensing signal of the target object in a second period to the processing circuit. The processing circuit performs dynamic event detection processing through the first sensing signal and the second sensing signal. Also, the present invention relates to an image sensing device including the image sensing structure.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 30, 2023
    Inventors: Ping-Hung Yin, Jia-Shyang Wang, Yu Hsiang Wang
  • Publication number: 20230386828
    Abstract: A pre-treatment apparatus can be added as a module of a wafer track system, where the pre-treatment is designed to reduce friction at the edges of a substrate. Reducing edge friction can help prevent back side edge particles during attachment to a vacuum chuck in a subsequent processing operation that can occur, for example, in an exposure device. The pre-treatment apparatus can be configured to deliver one or more gases to treat top and/or bottom surfaces of a substrate. The pre-treatment apparatus can treat back side edges of a substrate to reduce edge friction of the substrate and to prevent overlay defects.
    Type: Application
    Filed: March 23, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Hsiang WANG, Kai Yuan CHAN, Po-Chung CHENG, Chien Chou KO
  • Publication number: 20230388655
    Abstract: The present invention relates to an image sensing device comprising: an image sensing array and an image processing circuit. The image sensing array includes sensing units, and the sensing units respectively generate multiple pieces of pixel data. The multiple pieces of pixel data are generated according to different frame rates under different exposure periods, and include a first pixel data of a first subframe and a second pixel data of a second subframe. The first pixel data is generated by exposing a first exposure period for a first frame rate, and the second pixel data is generated by exposing a second exposure period for a second frame rate. The first frame rate is less than the second frame rate. The first exposure period is greater than the second exposure period, and multiple pieces of the second pixel data are generated during one image capturing operation.
    Type: Application
    Filed: May 4, 2023
    Publication date: November 30, 2023
    Inventors: Ping-Hung Yin, Jia-Shyang Wang, Yu Hsiang Wang
  • Publication number: 20230378142
    Abstract: A pixel package includes a base material, a circuit structure, light-emitting semiconductor elements, a non-light-emitting semiconductor element, and a light-transmitting adhesive layer. The base material has an upper surface, a lower surface, and a side surface. The circuit structure is buried in the base material and includes an first circuit layer exposed from the upper surface, bottom electrodes exposed from the lower surface, and a middle circuit layer between the upper circuit layer and the plurality of bottom electrodes and covered by the base material. The light-emitting semiconductor elements are on the upper surface and electrically connected to the circuit structure. The non-light-emitting semiconductor element is buried in the base material and directly connected to the middle circuit layer, and at least one outside surface is exposed. The light-transmitting adhesive layer covers the light-emitting semiconductor elements and is in direct contact with the base material.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 23, 2023
    Inventors: Li-Yuan HUANG, Tzu-Hsiang WANG, Chi-Chih PU, Ya-Wen LIN, Pei-Yu LI, Hsiao-Pei CHIU
  • Patent number: 11824966
    Abstract: A transmitter is configured to transmit a series of command signals and a series of data signals. The transmitter includes a serializer and a multiplexer. The serializer is configured to generate the series of data signals. The multiplexer, coupled to the serializer, is configured to selectively output the series of command signals or the series of data signals.
    Type: Grant
    Filed: January 31, 2021
    Date of Patent: November 21, 2023
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Yong-Ren Fang, Yu-Hsiang Wang, Che-Wei Yeh
  • Publication number: 20230369245
    Abstract: In some embodiments, the present disclosure relates to a semiconductor structure. The semiconductor structure includes a stacked semiconductor substrate having a semiconductor material disposed over a base semiconductor substrate. The base semiconductor substrate has a first coefficient of thermal expansion and the semiconductor material has a second coefficient of thermal expansion that is different than the first coefficient of thermal expansion. The stacked semiconductor substrate includes one or more sidewalls defining a crack stop ring trench that continuously extends in a closed path between a central region of the stacked semiconductor substrate and a peripheral region of the stacked semiconductor substrate surrounding the central region. The peripheral region of the stacked semiconductor substrate includes a plurality of cracks and the central region is substantially devoid of cracks.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 16, 2023
    Inventors: Jiun-Yu Chen, Chun-Lin Tsai, Yun-Hsiang Wang, Chia-Hsun Wu, Jiun-Lei Yu, Po-Chih Chen
  • Publication number: 20230370750
    Abstract: An image sensor and an operating method thereof are provided. The image sensor includes a first pixel circuit, a first column readout circuit, and a second column readout circuit. The first pixel circuit includes a first pixel unit, a first transfer transistor, a first reset transistor, a first readout transistor, and a first capacitor. The first column readout circuit includes a first circuit node. The second column readout circuit includes a bias transistor. A first terminal of the first reset transistor and a first terminal of the first readout transistor are coupled to the first circuit node, and a second terminal of the first readout transistor is coupled to the bias transistor.
    Type: Application
    Filed: April 20, 2023
    Publication date: November 16, 2023
    Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., LTD
    Inventors: Ping-Hung Yin, Jia-Shyang Wang, Yu-Hsiang Wang
  • Publication number: 20230369758
    Abstract: An antenna device is provided, which includes an antenna array, a beamforming circuit and a processor. The beamforming circuit is connected to the antenna array, where the beamforming circuit is used for controlling the antenna array to perform beamforming, where the beamforming circuit includes a temporary storage circuit, where the temporary storage circuit includes a first-in-first-out region, and the first-in-first-out region stores multiple beam indices. The processor is connected to the beamforming circuit, where the processor is used for controlling the beamforming circuit through a first processing interface to sequentially read the multiple beam indexes by a first-in-first-out method, and set a direction of a beam of the antenna array according to the read beam index, where the read beam index corresponds to the direction of the beam of the antenna array. In addition, a beam control method is also disclosed herein.
    Type: Application
    Filed: September 22, 2022
    Publication date: November 16, 2023
    Inventor: Tsai-Hsiang WANG