Patents by Inventor Hsiang Wang

Hsiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10864381
    Abstract: A light-emitting module includes a housing, a flexible film, and a protection portion. The housing includes a plurality of light-emitting units arranged in a matrix configuration and at least a switch electrically connected to at least one of the plurality of light-emitting units. The flexible film is detachably coupled to the housing. The protection portion covers the plurality of light-emitting units.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: December 15, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Jai-Tai Kuo, Chang-Hseih Wu, Tzu-Hsiang Wang, Chi-Chih Pu
  • Publication number: 20200380904
    Abstract: The present invention provides a driving circuit for a gamma voltage generator of a source driver. The gamma voltage generator includes a resistor string having a plurality of tap nodes, among which a plurality of first tap nodes are respectively connected to a plurality of first buffers. The driving circuit includes a second buffer, a digital-to-analog converter (DAC) and a control circuit. The second buffer is connected to a second tap node other than the plurality of first tap nodes among the plurality of tap nodes. The DAC is coupled to the second buffer. The control circuit, coupled to the DAC, is configured to receive a plurality of first control signals for the plurality of first buffers and calculate a second control signal for the DAC according to the plurality of first control signals.
    Type: Application
    Filed: March 25, 2020
    Publication date: December 3, 2020
    Inventors: Yun-Hsuan Yeh, Tai-Yin Wu, Ying-Hsiang Wang, Yao-Hung Kuo
  • Patent number: 10854800
    Abstract: A light emitting device includes a substrate, a first group of light emitting diode (LED) structures, a second group of LED structures, and a connection port is provided. The substrate has a first surface and a second surface opposite to the first surface. The first group of LED structures is disposed on one side of the first surface. The second group of LED structures is disposed on another side of the first surface opposite to the first group of LED structures. The connection portion includes at least an opening, and a first connection pad and a second connection pad electrically coupled to at least a part of the LED structures. The connection port is adapted to be coupled to other device through the opening. A light emitting module and an illuminating apparatus are also provided.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: December 1, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Tzu-Hsiang Wang, Chi-Chih Pu, Chen-Hong Lee
  • Patent number: 10843861
    Abstract: A drink cup having an automatic retractable straw is disclosed herein. It comprises a main body having an outer cup, an inner cup having a guide inclined surface at a bottom thereof, and a vacuum insulation layer between the outer cup and the inner cup; a lid covered on the main body and having an opening at one side thereof for corresponding to an upper end of the guide inclined surface, a containing groove adjacent to the opening on a top surface thereof, and a flip cover pivotally disposed on the containing groove and having a convex part corresponding to the opening; and a straw accommodated in the inner cup and having a connecting member formed with a first perforation at one end thereof for connecting to an upper end of the straw and a second perforation corresponding to the bonding part of the lid at the other end thereof.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: November 24, 2020
    Assignee: Yuan Min Aluminum Co., Ltd.
    Inventor: Kuan-Hsiang Wang
  • Patent number: 10847025
    Abstract: The present invention provides a system for changing a control interface of a controlled device based on functions of the device, in which a visual message is used as a medium to display a current working state of a controlled device on an interface to be operated by a user for recognition by the user, where the visual message includes different messages recognizable by the intensity, color, blinking of light or a lighting area provided by a visual unit.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: November 24, 2020
    Inventors: Chi-Hsiang Wang, Wan-Yu Hsien
  • Patent number: 10825839
    Abstract: A touch display device includes a substrate, light emitting units, an insulation layer, and mesh units. The light emitting units are disposed on the substrate. The insulation layer is disposed on the light emitting units. The mesh units are disposed on the insulation layer. Each of the mesh units has a mesh frame and a mesh opening. The light emitting units are disposed in the mesh openings. At least two of the mesh openings have different areas.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: November 3, 2020
    Assignee: InnoLux Corporation
    Inventors: Hsiao-Lang Lin, Jui-Jen Yueh, Chao-Hsiang Wang
  • Publication number: 20200341349
    Abstract: A range finder includes a prism module and a prism adjusting mechanism. The prism module includes a fixing prism group and a movable prism group, wherein the fixing prism group is adjacent to the movable prism group. The prism adjusting mechanism includes a first adjusting group and a second adjusting group, wherein the first adjusting group includes a first adjusting member and a second adjusting member, and the second adjusting group includes a third adjusting member. The first adjusting member or the second adjusting member is rotated to axially move so that the movable prism group is rotated with respect to the fixing prism group about a first axis, the third adjusting member is rotated to axially move so that the movable prism group is rotated with respect to the fixing prism group about a second axis, and the first axis is perpendicular to the second axis.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 29, 2020
    Inventors: Hua-Tang Liu, Sheng Luo, Chin-Hsiang Wang, Lian Zhao, Bin Liu
  • Publication number: 20200340295
    Abstract: A safety gate has two wall-mounted post assemblies, a main frame, and two connecting assemblies. The wall-mounted post assemblies are mounted on walls on two sides of the entrance. The main frame has a first frame portion, a second frame portion, and a sliding set. The sliding set connects the first frame portion and the second frame portion so the first frame portion and the second frame portion can slide with respect to each other to adjust an overlapping area. The connecting assemblies are mounted on two sides of the main frame and detachably mounted on the wall-mounted post assemblies. Therefore, the main frame is detachably mounted on the walls. Besides, the first frame portion and the second frame portion can be moved with respect to each other, so the occupied space is smaller and it is easy to control the blocked range of the entrance.
    Type: Application
    Filed: August 29, 2019
    Publication date: October 29, 2020
    Inventor: Tsung Hsiang Wang
  • Publication number: 20200329565
    Abstract: A package carrier includes a plurality of first circuit patterns, a plurality of second circuit patterns and an insulating material layer. The second circuit patterns are disposed between any two the first circuit patterns and are directly connected to the first circuit patterns. In a cross-sectional view, a first thickness of each of the first circuit patterns is greater than a second thickness of each of the second circuit patterns. A first surface of each of the first circuit patterns is aligned with a second surface of each of the second circuit patterns. The insulating material layer at least contacts the first circuit patterns.
    Type: Application
    Filed: January 10, 2020
    Publication date: October 15, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Ra-Min Tain, Pei-Chang Huang, Chi-Chun Po, Chun-Lin Liao, Po-Hsiang Wang, Hsuan-Wei Chen
  • Publication number: 20200292157
    Abstract: A light-emitting device including a substrate with a top surface and a bottom surface opposite to the top surface and a plurality of LED chips disposed on the top surface and configured to generate a top light visible above the top surface and a bottom light visible beneath the bottom surface, each LED chip comprising a plurality of light-emitting surfaces. The substrate has a thickness greater than 200 ?m and comprises aluminum oxide, sapphire, glass, plastic, or rubber. The plurality of LED chips has an incident light with a wavelength of 420-470 nm. The top light and the bottom light have a color temperature difference of not greater than 1500K.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 17, 2020
    Inventors: CHI-CHIH PU, CHEN-HONG LEE, SHIH-YU YEH, WEI-KANG CHENG, SHYI-MING PAN, SIANG-FU HONG, CHIH-SHU HUANG, TZU-HSIANG WANG, SHIH-CHIEH TANG, CHENG-KUANG YANG
  • Patent number: 10779378
    Abstract: A lighting apparatus, a method and a system for processing an emergency procedure are provided. The system includes two or more lighting apparatuses that are interconnected for forming a mesh network over an area. In the method, the lighting apparatus is activated to illuminate a surveillance zone under an emergency mode. In the meantime, a camera circuit is driven to capture a series of images of the surveillance zone for conduct motion detection. When a moving object is detected, the lighting apparatus transmits a beacon signal in response to the detection result. In the meantime, an acknowledgement signal in response to the beacon signal is generated by a signal source and received by the lighting apparatus. After that, the identifier with respect to the lighting apparatus is transmitted to a control center for obtaining the position of the lighting apparatus.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: September 15, 2020
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Chia-Hsiang Wang, Chui-Sung Peng
  • Publication number: 20200257152
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Application
    Filed: April 29, 2020
    Publication date: August 13, 2020
    Inventors: Chung-Wen YEN, Yu-Tsung LIU, Chao-Hsiang WANG, Te-Yu LEE
  • Publication number: 20200258579
    Abstract: A random bit cell includes a latch and a nonvolatile memory cell. The nonvolatile memory cell includes a storage circuit, a control element, an erase element, and a read circuit. The storage circuit is coupled to a first terminal of the latch. The storage circuit includes a floating gate transistor having a first terminal, a second terminal, and a floating gate. The control element has a first terminal coupled to a control line, and a control terminal coupled to the floating gate of the floating gate transistor. The erase element has a first terminal coupled to an erase line, and a control terminal coupled to the floating gate of the floating gate transistor. The read circuit is coupled to a bit line, a select gate line, and the floating gate of the floating gate transistor.
    Type: Application
    Filed: November 27, 2019
    Publication date: August 13, 2020
    Inventors: Tsung-Mu Lai, Hung-Hsiang Wang, Cheng-Te Yang, Chih-Hsin Chen
  • Publication number: 20200249511
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 6, 2020
    Inventors: Chung-Wen YEN, Yu-Tsung LIU, Chao-Hsiang WANG, Te-Yu LEE
  • Publication number: 20200243737
    Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.
    Type: Application
    Filed: January 22, 2020
    Publication date: July 30, 2020
    Applicant: EPISTAR CORPORATION
    Inventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
  • Publication number: 20200243664
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 30, 2020
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20200243478
    Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.
    Type: Application
    Filed: August 27, 2019
    Publication date: July 30, 2020
    Applicant: EPISTAR CORPORATION
    Inventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
  • Patent number: 10725486
    Abstract: A reference voltage generator includes a detecting voltage provider, a comparator, and a core circuit. The detecting voltage provider provides a detecting voltage with a first voltage level corresponding to a voltage coefficient. The comparator compares the first voltage level of the detecting voltage with a plurality of sampled amplitudes of an input signal to respectively generate a plurality of comparison results. The core circuit is used to: collect a plurality of first comparison results associated with a current received bit of a preset value from the comparison results; take the voltage coefficient as a first boundary voltage coefficient in response to the first comparison results satisfying a first condition; take the voltage coefficient as a second boundary voltage coefficient in response to the first comparison results satisfying a second condition. The reference circuit generates a reference voltage according to the first and second boundary voltage coefficients.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: July 28, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yong-Ren Fang, Shen-Iuan Liu, Ju-Lin Huang, Tzu-Chien Tzeng, Keko-Chun Liang, Yu-Hsiang Wang, Che-Wei Yeh
  • Patent number: 10700202
    Abstract: A semiconductor device is disclosed. The semiconductor device comprises a substrate, a gate structure disposed on the substrate, a spacer disposed on the substrate and covering a sidewall of the gate structure, an air gap sandwiched between the spacer and the substrate, and a source/drain region disposed in the substrate and having a faceted surface exposed from the substrate, wherein the faceted surface borders the substrate on a boundary between the air gap and the substrate.
    Type: Grant
    Filed: October 28, 2018
    Date of Patent: June 30, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuang-Hsiu Chen, Sung-Yuan Tsai, Chi-Hsuan Tang, Kai-Hsiang Wang, Chao-Nan Chen, Shi-You Liu, Chun-Wei Yu, Yu-Ren Wang
  • Patent number: D894851
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: September 1, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Tzu-Hsiang Wang, Chi-Chih Pu, Ya-Wen Lin