Abstract: A semiconductor device package includes a conductive layer, a first conductive pillar, a circuit layer and a second conductive pillar. The conductive layer has a first surface. The first conductive pillar is disposed on the first surface of the conductive layer. The circuit layer is disposed over the conductive layer. The circuit layer has a first surface facing the conductive layer. The second conductive pillar is disposed on the first surface of the circuit layer. The first conductive pillar is physically spaced apart from the second conductive pillar and electrically connected to the second conductive pillar.

Abstract: A LED driving apparatus with differential signal interfaces is introduced, including: N-stages LED drivers, wherein the first stage LED driver receives a first data packet differential signal and a first clock differential signal and outputs a second data packet differential signal and a second clock differential signal, the Mth stage LED driver receives a Mth data packet differential signal and a Mth clock differential signal and outputs a (M+1)th data packet differential signal and a (M+1)th clock differential signal.

Abstract: A method for manufacturing an integrated circuit is provided. The method includes depositing a floating gate electrode film over a semiconductor substrate; patterning the floating gate electrode film into at least one floating gate electrode having at least one opening therein; depositing a control gate electrode film over the semiconductor substrate to overfill the at least one opening of the floating gate electrode; and patterning the control gate electrode film into at least one control gate electrode over the floating gate electrode.

Abstract: In some embodiments, the present disclosure relates to a high voltage device that includes a substrate comprising a first semiconductor material. A channel layer that comprises a second semiconductor material is arranged over the substrate. An active layer that comprises a third semiconductor material is arranged over the channel layer. Over the active layer is a source contact spaced apart from a drain contact. A gate structure is arranged laterally between the source and drain contacts and over the active layer to define a high electron mobility transistor (HEMT) device. Between the gate structure and the source contact is a cap structure, which is coupled to the source contact and laterally spaced from the gate structure. The cap structure and a gate electrode of the gate structure comprise a same material.

Abstract: A device is disclosed. The device includes an operational amplifier, an output circuit and a first feedback circuit. The operational amplifier includes an input terminal that is configured to receive a feedback signal. The output circuit is coupled to an output terminal of the operational amplifier and is configured to generate an output signal in response to an output of the operational amplifier. The first feedback circuit is coupled to the output circuit and is configured to couple at least one first ripple signal in the output signal to the input terminal of the operational amplifier that is configured to receive the feedback signal, for adjusting the output signal. A method also is disclosed herein.

Abstract: An electronic device includes a substrate and a display driver chip bonded on the substrate. The display driver chip includes a plurality of operational amplifiers, and each of the operational amplifiers has a first stage and a second stage. The first stage includes a first power input terminal. The second stage includes a first power input terminal and an output terminal for outputting an output voltage. The first power input terminal of the first stage is connected to a first metal trace of the substrate, and the first power input terminal of the second stage is connected to a second metal trace of the substrate. The first power input terminal of the first stage and the first power input terminal of the second stage are both provided with a first voltage level.

Abstract: A LED driving apparatus with differential signal interfaces is introduced, including: N-stages LED drivers, wherein the first stage LED driver receives a first data packet differential signal and a first clock differential signal and outputs a second data packet differential signal and a second clock differential signal, the Mth stage LED driver receives a Mth data packet differential signal and a Mth clock differential signal and outputs a (M+1)th data packet differential signal and a (M+1)th clock differential signal.

Abstract: A light-emitting device comprises a carrier, which comprises a plurality of side surfaces, an insulating layer, an upper conductive layer arranged on the insulating layer, a lower conductive layer arranged under the insulating layer, and a plurality of conductive through holes arranged between and connected to the upper conductive layer and the lower conductive layer; a plurality of light-emitting units arranged on and electrically connected to the upper conductive layer; and a transparent unit fully covering the plurality of light-emitting units, and exposing the lower conductive layer, wherein the plurality of conductive through holes are not completely buried within the insulating layer, and each conductive through hole is sandwiched by two adjacent ones of the plurality of side surfaces.

Abstract: A safety gate has two wall-mounted post assemblies, a main frame, and two connecting assemblies. The wall-mounted post assemblies are mounted on walls on two sides of the entrance. The main frame has a first frame portion, a second frame portion, and a sliding set. The sliding set connects the first frame portion and the second frame portion so the first frame portion and the second frame portion can slide with respect to each other to adjust an overlapping area. The connecting assemblies are mounted on two sides of the main frame and detachably mounted on the wall-mounted post assemblies. Therefore, the main frame is detachably mounted on the walls. Besides, the first frame portion and the second frame portion can be moved with respect to each other, so the occupied space is smaller and it is easy to control the blocked range of the entrance.

Abstract: A method of biasing a guard ring structure includes biasing a gate of a MOS transistor to a first bias voltage level, biasing first and second S/D regions of the MOS transistor to a power domain voltage level, biasing a gate of the guard ring structure to a second bias voltage level, and biasing first and second heavily doped regions of the guard ring structure to the power domain voltage level. Each of the first and second S/D regions has a first doping type, each of the first and second heavily doped regions has a second doping type different from the first doping type, and each of the first and second S/D regions and the first and second heavily doped regions is positioned in a substrate region having the second doping type.

Abstract: A source driving circuit, a display apparatus and an operation method are provided. The source driving circuit includes a reference voltage generating circuit, a plurality of compensation circuits, a gamma voltage generating circuit and a digital to analog converter. The reference voltage generating circuit is configured to generate a plurality of gamma reference voltages. The plurality of compensation circuits are coupled to the reference voltage generating circuit and configured to generate a plurality of compensated gamma reference voltages according to the plurality of gamma reference voltages and a voltage associated with a common voltage. The gamma voltage generating circuit is configured to generate a plurality of gamma voltages according to the plurality of compensated gamma reference voltages. The digital to analog converter is configured to generate a plurality of data driving voltages corresponding to image data according to the plurality of gamma voltages.

Abstract: In some embodiments, the present disclosure relates to a transistor device. The transistor device that includes a source contact disposed over a substrate. The source contact has a first side and an opposing second side disposed between a first end and an opposing second end. A drain contact is disposed over the substrate and is separated from the source contact along a first direction. A gate structure is disposed over the substrate between the source contact and the drain contact. The gate structure extends along the first side of the source contact facing the drain contact and also wraps around the first end and the opposing second end of the source contact.

Abstract: Various embodiments of the present application are directed towards an integrated circuit (IC) chip comprising a front-end-of-line (FEOL) through semiconductor-on-substrate via (TSV), as well as a method for forming the IC chip. In some embodiments, a semiconductor layer overlies a substrate. The semiconductor layer may, for example, be or comprise a group III-V semiconductor and/or some other suitable semiconductor(s). A semiconductor device is on the semiconductor layer, and a FEOL layer overlies the semiconductor device. The FEOL TSV extends through the FEOL layer and the semiconductor layer to the substrate at a periphery of the IC chip. An intermetal dielectric (IMD) layer overlies the FEOL TSV and the FEOL layer, and an alternating stack of wires and vias is in the IMD layer.

Abstract: A multi-band dual-polarized antenna structure is provided. The multi-band dual-polarized antenna structure includes a first antenna array, a second antenna array and a third antenna array. The first antenna array is arranged in a first row and operating at a first frequency. The second antenna array is arranged in a second row, operates at a second frequency and has a first polarized direction. The third antenna array is arranged in the second row, operates at the second frequency and has a second polarized direction different from the first polarized direction.

Abstract: The present disclosure discloses a backlight module, which includes a light guide plate and at least one light emitting unit. The light guide plate includes a first side and a second side opposite to each other, at least one accommodating portion and at least one light guide structure. The accommodating portion is adjacent to the first side and has an incident surface faced toward the second side. The light guide structure is disposed between the accommodating portion and the second side, and the light guide structure further comprises a first reflective surface and a second reflective surface. The first reflective surface is toward the first side and close to the accommodating portion. The second reflective surface is adjacent to the first reflective surface, and the second reflective surface is toward the first side and away from the accommodating portion. The light emitting unit is disposed in the accommodating portion.

Abstract: A device for encouraging and guiding a spirometer user includes a housing, a main valve, a visual assembly, and a sound making assembly. The housing has a channel, a first outlet channel, a second outlet channel, and an inlet channel. The main valve is disposed in a housing communicating with the channel, the first outlet channel, the second outlet channel or the inlet channel and configured to regulate or control fluid flowing paths. The visual assembly includes a check valve in the second outlet channel, and at least one movable member. The sound making assembly includes a check valve and a sound making member. So, it can generate the visual and sound encouraging effects for learning how to use a spirometer correctly.

Abstract: A lighting apparatus and a system for indicating locations within an area are provided. The system includes a plurality of lighting apparatuses that are installed at different locations within the area. The lighting apparatuses form a mesh network. Every lighting apparatus is assigned with an identifier for locating the lighting apparatus with a color or a pattern. The lighting apparatus includes a control circuit that controls the lighting apparatus to operate with a first mode or a second mode. The apparatus includes a lighting unit that can be activated to illuminate color or pattern on a region for indicating where the lighting apparatus is located under the second mode. In an aspect, the area is divided into multiple regions that are indicated by different combinations of colors and patterns illuminated by the lighting units of the lighting apparatuses separately.

Abstract: The application discloses a light-emitting device including a carrier, a light-emitting element and a connecting structure. The carrier includes a first connecting portion and a first necking portion extended from the first connecting portion. The first connecting portion has a first width, and the first necking portion has a second width. The second width is less than the first width. The light-emitting element includes a first light-emitting layer being able to emit a first light and a first contacting electrode formed under the first light-emitting layer. The first contacting electrode is corresponded to the first connecting portion. The connecting structure includes a first electrical connecting portion and a protection portion surrounding the first electrical connecting portion. The first electrical connecting portion is electrically connected to the first connecting portion and the first contacting electrode.

Abstract: A receiver is configured to receive a series of command signals and a series of data signals. The receiver includes a first clock and data recovery (CDR) circuit, a control circuit and a second CDR circuit. The first CDR circuit is configured to process the series of command signal to generate a clock signal. The control circuit, coupled to the first CDR circuit, is configured to generate a control signal according to the series of command signals and the clock signal received from the first CDR circuit. The second CDR circuit, coupled to the control circuit, is configured to process the series of data signals according to the control signal received from the control circuit.

Abstract: Various embodiments of the present disclosure are directed toward an integrated chip including an undoped layer overlying a substrate. A first barrier layer overlies the undoped layer. A doped layer overlies the first barrier layer. Further, a second barrier layer overlies the first barrier layer, where the second barrier layer is laterally offset from a perimeter of the doped layer by a non-zero distance. The first and second barrier layers comprise a same III-V semiconductor material. A first atomic percentage of a first element within the first barrier layer is less than a second atomic percentage of the first element within the second barrier layer.