Patents by Inventor Hsiang Wang

Hsiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11081036
    Abstract: The disclosure provides a slew rate enhancement apparatus that is connected to an operational amplifier that receives an input signal and generates an output signal according to the input signal for driving a pixel. The slew rate enhancement apparatus comprises a signal edge detector, a comparator, an adjustment unit. The signal edge detector is coupled to the operational amplifier and configured to detect a signal edge and outputting a difference signal corresponding to a difference between the input and output signals. The comparator is coupled to the signal edge detector to receive the difference signal and configured to generate a control signal according to the difference signal. The adjustment unit is coupled to the comparator to receive the control signal, and configured to couple a compensation signal generated by a current source to the operational amplifier according to the control signal to enhance a slew rate of the operation amplifier.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: August 3, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventor: Ying-Hsiang Wang
  • Publication number: 20210226762
    Abstract: A repeater and a synchronization method for the same are provided. The synchronization method includes: configuring a base station to transmit an input signal during downlink transmission durations according to a time division duplex (TDD) configuration, in which the TDD configuration defines a predetermined pattern composed of an uplink transmission duration and a downlink transmission duration; configuring a processor generate a received signal code according to the input signal; configuring the processor to sample the received signal code by using a signal window to generate a target pattern; configuring the processor to dynamically compare the target pattern with the predetermined pattern according to the TDD configuration, positions of the received downlink transmission durations and positions of the received uplink transmission durations stored in a memory of the repeater, and determine whether the target pattern matches to the predetermined pattern.
    Type: Application
    Filed: January 21, 2020
    Publication date: July 22, 2021
    Inventors: CHIA-HSIANG WANG, CHIEH-WEN CHENG
  • Publication number: 20210222861
    Abstract: A light-emitting device includes a first light-emitting module, a second light-emitting module, a conductive layer and an insulation layer. The first light-emitting module includes a first substrate having a first cavity, a first sidewall, and a light-emitting component disposed on the first substrate. The second module includes a second substrate having a second cavity corresponding to the first cavity and a second sidewall corresponding to the first sidewall. The conductive layer is directly connected to the first cavity and the second cavity and electrically connect the first light-emitting module and the second light-emitting module. The insulation layer is directly connected to the first sidewall and the second sidewall.
    Type: Application
    Filed: January 20, 2021
    Publication date: July 22, 2021
    Inventors: Min-Hsun HSIEH, Ying-Yang SU, Shih-An LIAO, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
  • Publication number: 20210225855
    Abstract: A method for manufacturing an integrated circuit is provided. The method includes depositing a floating gate electrode film over a semiconductor substrate; patterning the floating gate electrode film into at least one floating gate electrode having at least one opening therein; depositing a control gate electrode film over the semiconductor substrate to overfill the at least one opening of the floating gate electrode; and patterning the control gate electrode film into at least one control gate electrode over the floating gate electrode.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Chung JEN, Yu-Chu LIN, Cheng-Hsiang WANG, Yi-Ling LIU
  • Patent number: 11066871
    Abstract: A retractable safety gate has a mesh fabric, a retracting mechanism connected with a first side of the mesh fabric, and a fastening mechanism connected with a second side of the mesh fabric. The retracting mechanism includes a bottom bracket, a fastening bracket, a first mounting tube, a locking assembly, and an energy storage assembly. The first mounting tube is rotatably mounted in the bottom bracket and the fastening bracket. The mesh fabric is wound around the first mounting tube. The locking assembly is mounted on the first mounting tube and selectively engages with the fastening bracket. The energy storage assembly is mounted in the first mounting tube and provides a resilient restoring force that drives the first mounting tube to wind the mesh fabric around the first mounting tube. The retractable safety gate rolls the mesh fabric up automatically and is convenient for use.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: July 20, 2021
    Assignee: Demby Development Co., Ltd.
    Inventor: Tsung-Hsiang Wang
  • Publication number: 20210217701
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first semiconductor device, a first conductive layer and a second conductive layer. The first semiconductor device has a first conductive pad. The first conductive layer is disposed in direct contact with the first conductive pad. The first conductive layer extends along a direction substantially parallel to a surface of the first conductive pad. The second conductive layer is disposed in direct contact with the first conductive pad and spaced apart from the first conductive layer.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 15, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Min Lung HUANG, Hung-Jung TU, Hsin Hsiang WANG, Chih-Wei HUANG, Shiuan-Yu LIN
  • Publication number: 20210191173
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventors: Chung-Wen YEN, Yu-Tsung LIU, Chao-Hsiang WANG, Te-Yu LEE
  • Publication number: 20210183901
    Abstract: In a display device, the display device includes a substrate, a first conductive layer, a second conductive layer, a semiconductor layer, an opposite substrate and a display medium layer. The first conductive layer is disposed on the substrate and includes a trace portion extending along a first direction and a protrusive portion extending from the trace portion. The second conductive layer is disposed on the first conductive layer and includes a wiring portion extending along a second direction. The semiconductor layer is disposed on the substrate. When viewed in a third direction perpendicular to the first direction and the second direction, an interface disposes between the trace portion and the protrusive portion, a virtual extending line overlaps the second edge and the interface, and the semiconductor layer extends beyond the virtual extending line. The display medium layer is disposed between the substrate and the opposite substrate.
    Type: Application
    Filed: February 24, 2021
    Publication date: June 17, 2021
    Inventors: Cheng-Hsiung CHEN, Pei-Chieh CHEN, Chao-Hsiang WANG, Yi-Ching CHEN
  • Patent number: 11015386
    Abstract: A safety gate has two wall-mounted post assemblies, a main frame, and two connecting assemblies. The two wall-mounted post assemblies are mounted to two walls of an entrance. The main frame has two frame portion. The two frame portion can pivot with respect to each other. The two connecting assemblies are mounted on two sides of the main frame and detachably and pivotally connected to the wall-mounted post assemblies. A stopping assembly is elastically mounted on a side, near the main frame, of each wall-mounted post assembly and configured to limit one of the connecting assemblies. With such safety gate, a user can press either one of the stopping assemblies to withdraw into the wall-mounted post assembly, and the corresponding connecting assembly can be separated from the wall-mounted post assembly to open the safety gate. When the two stopping assemblies are pressed, the main frame can be detached.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: May 25, 2021
    Assignee: DEMBY DEVELOPMENT CO., LTD.
    Inventor: Tsung-Hsiang Wang
  • Publication number: 20210151580
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer and a second spacer around the gate structure; forming a recess adjacent to two sides of the second spacer; performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; and forming an epitaxial layer in the recess.
    Type: Application
    Filed: January 28, 2021
    Publication date: May 20, 2021
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20210150954
    Abstract: An electronic device includes a substrate and a display driver chip bonded on the substrate. The display driver chip includes a plurality of operational amplifiers, and each of the operational amplifiers has a first stage and a second stage. The first stage includes a first power input terminal. The second stage includes a first power input terminal and an output terminal for outputting an output voltage. The first power input terminal of the first stage is connected to a first metal trace of the substrate, and the first power input terminal of the second stage is connected to a second metal trace of the substrate. The first power input terminal of the first stage and the first power input terminal of the second stage are both provided with a first voltage level.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 20, 2021
    Inventors: Syang-Yun TZENG, Cheng-Tsu HSIEH, Ching-Wen HOU, Ying-Hsiang WANG, Ping CHEN
  • Patent number: 11010136
    Abstract: A random bit stream generator which includes a pseudo-random bit stream generator and a multi-stage noise shaping (MASH) delta-sigma modulator is introduced. The pseudo-random bit stream generator may generate a first random bit stream according to a first clock signal. The MASH delta-sigma modulator is coupled to the first random bit stream generator to receive the first random bit stream and output a second random bit stream according to the first random bit stream and a second clock signal. A frequency of the second clock signal is greater than a frequency of the first clock signal, and the random bit stream has bell-shaped distribution. A method of generating a random bit stream having bell-shaped distribution adapted to a random bit stream generator is also introduced.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: May 18, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Che-Wei Yeh, Keko-Chun Liang, Yu-Hsiang Wang
  • Patent number: 10987303
    Abstract: The present disclosure relates generally to depot formulations of lurasidone and methods of making depot formulations of lurasidone. The depot formulations include a suspending agent and are highly syringeable.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: April 27, 2021
    Assignee: LifeMax Laboratories, Inc.
    Inventors: Chung-Chiang Hsu, Tzu-Ying Wu, Wei-Hsiang Wang, Chia-Yu Kuo
  • Publication number: 20210118359
    Abstract: A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original data signal and outputs a first data signal, the Nth stage LED driver receives a (N?1)th data signal and outputs a Nth data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery clock signal and a recovery data signal according to the (N?1)th data signal; and a first transmitter outputting the Nth data signal according to the recovery clock signal and the recovery data signal.
    Type: Application
    Filed: December 30, 2020
    Publication date: April 22, 2021
    Applicant: Novatek Microelectronics Corp.
    Inventors: Che-Wei Yeh, Keko-Chun Liang, Yu-Hsiang Wang, Yong-Ren Fang, Yi-Chuan Liu
  • Patent number: 10976630
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: April 13, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Chung-Wen Yen, Yu-Tsung Liu, Chao-Hsiang Wang, Te-Yu Lee
  • Patent number: 10962854
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: March 30, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Chung-Wen Yen, Yu-Tsung Liu, Chao-Hsiang Wang, Te-Yu Lee
  • Patent number: 10957974
    Abstract: The present disclosure discloses an antenna base for fixing an antenna body on a casing. The antenna base includes a base plate and a slot structure. The base plate is fixed on the casing. The slot structure includes a first side wall, a second side wall, and at least one welding structure. The first side wall and the second side wall are connected to the base plate and opposite to each other. An accommodating slot is formed between the first side wall and the second side wall for accommodating the antenna body. The at least one welding structure is disposed on the first side wall and for welding with the antenna body. In such a way, the antenna base is suitable for various antenna bodies with different structures according to practical demands without redesigning different molds for different antenna bases, which effectively reduces manufacturing cost.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: March 23, 2021
    Assignee: Wistron Corporation
    Inventors: Chung-Ta Yu, I-Hsiang Wang
  • Patent number: 10957715
    Abstract: In a display device, the display device includes a substrate, a first conductive layer, a second conductive layer, a semiconductor layer, an opposite substrate and a display medium layer. The first conductive layer is disposed on the substrate and includes a trace portion extending along a first direction and a protrusive portion extending from the trace portion. The second conductive layer is disposed on the first conductive layer and includes a wiring portion extending along a second direction. The semiconductor layer is disposed between the first conductive layer and the second conductive layer. When viewed in a third direction perpendicular to the first direction and the second direction, the semiconductor layer is fully located in the first conductive layer, an edge of the semiconductor layer overlaps the trace portion, and another edge of the semiconductor layer overlaps the protrusive portion. The display medium layer is disposed between the substrate and the opposite substrate.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: March 23, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Cheng-Hsiung Chen, Pei-Chieh Chen, Chao-Hsiang Wang, Yi-Ching Chen
  • Publication number: 20210079700
    Abstract: A safety gate has a gate body and two first locking units. The gate body has two first connecting elements. The two first locking units are respectively mounted on two opposite sides of a door frame. Each first locking unit has a second connecting element and a blocking element. Each of the first connecting elements is rotatably connected with a respective one of the second connecting elements. Each blocking element has a blocking position for blocking a corresponding first connecting element to prevent it from being disengaged from the second connecting element and a pressed position for detaching the corresponding first connecting element from the second connecting element of the first locking unit.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 18, 2021
    Inventor: Tsung-Hsiang Wang
  • Patent number: D926713
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: August 3, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Tzu-Hsiang Wang, Chi-Chih Pu, Ya-Wen Lin