Abstract: An integrated circuit includes a first semiconductor device, a second semiconductor device, and a metal shielding layer. The first semiconductor device includes a first substrate and a first multi-layer structure, and the first substrate supports the first multi-layer structure. The second semiconductor device includes a second substrate and a second multi-layer structure, and the second substrate supports the second multi-layer structure. The metal shielding layer is disposed between the first multi-layer structure and the second multi-layer structure, wherein the metal shielding layer is electrically connected to the second semiconductor device.

Abstract: An impact device for power transmission includes an impact unit and a hydraulic pressure adjusting unit. The impact unit has a hydraulic cylinder which is installed with a piston assembly and an output shaft therein for outputting torque through the output shaft by utilizing a hydraulic pressure provided in the hydraulic cylinder. The hydraulic pressure adjusting unit is disposed in the hydraulic cylinder and operative to adjust the hydraulic pressure of the hydraulic cylinder. Therefore, the impact device for power transmission can generate a hydraulic torque pulse, and the magnitude of the output torque can be adjusted by the hydraulic pressure adjusting unit.

Abstract: A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, at least one memory cell, and at least one word line. The raised dummy feature is present on the semiconductor substrate and defines a cell region on the semiconductor substrate. The memory cell is present on the cell region. The word line is present adjacent to the memory cell.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a light sensing feature, a negative oxide layer, a gate dielectric layer and a transfer gate. The light sensing feature is configured in the substrate to detect an incoming radiation. The negative oxide layer is over the light sensing feature. The gate dielectric layer is over the negative oxide layer. The transfer gate is over the gate dielectric layer.

Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.

Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A buffer layer is disposed over the second side of the substrate. A plurality of elements is disposed over the buffer layer. The elements and the buffer layer have different material compositions. A plurality of light-blocking structures is disposed over the plurality of elements, respectively. The radiation-sensing regions are respectively aligned with a plurality of openings defined by the light-blocking structures, the elements, and the buffer layer.

Abstract: A backside illuminated CMOS image sensor and a manufacturing method thereof are provided. Embedded micro-lenses disposed respectively on concave surfaces of a buffer oxide layer, wherein the concave surfaces are positioned to respectively align with photodiodes of pixel array of the CMOS image sensor. The embedded micro-lenses can confine incident light to the photodiodes to reduce optical crosstalk between adjacent pixels.

Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of light-blocking structures is disposed over the second side of the substrate. A passivation layer is coated on top surfaces and sidewalls of each of the light-blocking structures. A plurality of spacers is disposed on portions of the passivation layer coated on the sidewalls of the light-blocking structures.

Abstract: Seal ring structures are provided with rounded corner junctions or corner junctions that include polygons. The seal rings surround generally rectangular semiconductor devices such as integrated circuits, image sensors and other devices. The seal ring includes a configuration of two sets of generally parallel opposed sides and the corner junctions are the junctions at which adjacent orthogonal seal ring sides are joined. The seal rings are trench structures or filled trench structures in various embodiments. The rounded corner junctions are formed by a curved arc or multiple line segments joined together at various angles. The corner junctions that include one or more enclosed polygons include polygons with at least one polygon side being formed by one of the seal ring sides.

Abstract: A device includes a substrate having a non-pixel region and a pixel region; sensor elements disposed in the pixel region; and a metal layer disposed over the substrate. The metal layer includes a metal shield disposed in the non-pixel region and first trenches over the respective sensor elements in the pixel region. The device further includes a dielectric layer disposed over the metal layer. The dielectric layer has second trenches over the respective sensor elements and third trenches over the metal shield. The first trenches are completely through the metal layer, and the second trenches are partially through the dielectric layer.

Abstract: A backside illuminated (BSI) image sensor comprises a semiconductor substrate having a first surface and a second surface opposite to the first surface; a photosensitive element in the semiconductor substrate; a gate structure partially over the first surface of the semiconductor substrate; and a temporary carrier depository in proximity to the first surface of the semiconductor substrate, wherein the gate structure has a plug portion extending from the first surface toward the second surface. The plug portion of the gate structure helps to increase the charge transfer efficiency so as to improve quantum efficiency of the BSI image sensor.

Abstract: A method of manufacturing a semiconductor structure includes providing a first wafer including a surface, removing some portions of the first wafer over the surface to form a plurality of recesses extended over at least a portion of the surface of the first wafer, providing a second wafer, and disposing the second wafer over the surface of the first wafer.

Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.

Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of light-blocking structures is disposed over the second side of the substrate. A passivation layer is coated on top surfaces and sidewalls of each of the light-blocking structures. A plurality of spacers is disposed on portions of the passivation layer coated on the sidewalls of the light-blocking structures.

Abstract: A structure of an under bump metallization and a method of forming the same are provided. The under bump metallization has a redistribution via hole, viewed from the top, in a round shape or a polygon shape having an angle between adjacent edges greater than 90°. Therefore, the step coverage of the later formed metal layer can be improved.

Abstract: An integrated circuit includes a first semiconductor device, a second semiconductor device, and a metal shielding layer. The first semiconductor device includes a first substrate and a first multi-layer structure, and the first substrate supports the first multi-layer structure. The second semiconductor device includes a second substrate and a second multi-layer structure, and the second substrate supports the second multi-layer structure. The metal shielding layer is disposed between the first multi-layer structure and the second multi-layer structure, wherein the metal shielding layer is electrically connected to the second semiconductor device.

Abstract: A method of forming an image sensor device is disclosed. The method includes providing a substrate having sensor elements in a pixel region and having no sensor elements in a non-pixel region. The method further includes forming metal pillars over the pixel region and a metal shield layer over the non-pixel region. The metal pillars are disposed above spaces between adjacent sensor elements. The method further includes depositing a dielectric layer over the metal pillars and the metal shield layer; and etching the dielectric layer to form first and second trenches. The first trenches are formed over the pixel region and the second trenches are formed over the non-pixel region. Each of the first trenches aligns to a respective sensor element and is surrounded by the dielectric layer at its bottom and sidewall surfaces.

Abstract: A semiconductor device includes a semiconductor substrate, trench isolations, a sacrificial layer, a first resist protect oxide (RPO) layer, a second RPO layer and a silicide layer. The semiconductor substrate has first portions and second portions which are alternately disposed, and each of the second portions includes a first resist region with a first resistance, a second resist region with a second resistance and a silicide region. The second resistance is greater than the first resistance. The trench isolations are in the first portions. The sacrificial layer is on the first resist region. The first RPO layer is on the sacrificial layer. The first RPO layer together with the sacrificial layer have a first thickness. The second RPO layer is on the second resist region, in which the second RPO layer has a second thickness smaller than the first thickness. The silicide layer is on the silicide region.

Abstract: A semiconductor structure includes a wafer including a first surface and a periphery, a plurality of protrusions protruded from the first surface and a plurality of recesses spaced from each other by the plurality of protrusions, and each of the plurality of recesses is extended from the periphery of the wafer and is elongated across the first surface of the wafer.

Abstract: An image sensor device is provided, and includes pixel units. Each of the pixel units includes a light sensing element, a first transistor and a second transistor. The first transistor is coupled to the light sensing element. The second transistor is coupled to the light sensing element and the first transistor. The first transistor includes a first gate structure having a first width, and the second transistor includes a second gate structure having a second width, in which a distance between the first gate structure and the second gate structure is substantially greater than the first width and the second width.