Abstract: A method of forming a semiconductor device, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.

Abstract: The method includes placing a wafer in a chamber body of a plasma processing tool; moving a first movable jig along an arc path to comb a spiral-shaped radio frequency (RF) coil over the chamber body, the first movable jig having a plurality of first confining slots penetrated by a plurality of coil segments of the spiral-shaped RF coil, respectively; and generating plasma in the chamber body through the spiral-shaped RF coil.

Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.

Abstract: The invention provides a layout pattern of a semiconductor varactor, which comprises a plurality of varactor units arranged on a substrate, wherein each varactor unit comprises a plurality of fin structures arranged in parallel with each other, a plurality of gate structures arranged in parallel with each other, located on the substrate and spanning the fin structures, and a gate metal layer electrically connected with the plurality of gate structures.

Abstract: A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a channel structure extending between a first source/drain region and a second source/drain region. Further, a gate electrode is arranged directly over the channel structures, and an upper interconnect contact is arranged over and coupled to the gate electrode. A backside contact is arranged below and coupled to the first source/drain region. The backside contact has a width that decreases from a bottommost surface of the backside contact to a topmost surface of the backside contact.

Abstract: A semiconductor device and a method of forming the same is disclosed. The semiconductor device includes a substrate, a first well region disposed within the substrate, a second well region disposed adjacent to the first well region and within the substrate, and an array of well regions disposed within the first well region. The first well region includes a first type of dopants, the second well region includes a second type of dopants that is different from the first type of dopants, and the array of well regions include the second type of dopants. The semiconductor device further includes a metal silicide layer disposed on the array of well regions and within the substrate, a metal silicide nitride layer disposed on the metal silicide layer and within the substrate, and a contact structure disposed on the metal silicide nitride layer.

Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.

Abstract: A method is provided that includes forming a first metal layer of a seal structure over a micro-electromechanical system (MEMS) structure and over a channel formed through the MEMS structure to an integrated circuit of a semiconductor structure. The first metal layer is formed at a first temperature. The method includes forming a second metal layer over the first metal layer. The second metal layer is formed at a second temperature less than the first temperature. The method includes performing a first cooling process to cool the semiconductor structure.

Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.

Abstract: A method includes forming a first passivation layer, forming a metal pad over the first passivation layer, forming a planarization layer having a planar top surface over the metal pad, and patterning the planarization layer to form a first opening. A top surface of the metal pad is revealed through the first opening. The method further includes forming a polymer layer extending into the first opening, and patterning the polymer layer to form a second opening. The top surface of the metal pad is revealed through the second opening.

Abstract: An electronic card capable of light-emitting display includes a card body, electrical control module, light-emitting module and light-guiding module. The card body has a light-penetrable border portion having a surface on which an oblique refraction portion is disposed. The electrical control module is disposed in the card body and includes a circuit control carrier plate and a non-contact type radio-frequency antenna or a contact type communication chip. The light-emitting module is disposed in the card body and electrically connected to the circuit control carrier plate. The light-guiding module is disposed in the card body and corresponds in position to the light-emitting module. During personal data or transaction data exchange carried out with the card body, light emitted from the light-emitting module driven by the electrical control module is guided by the light-guiding module to the light-penetrable border portion, allowing the oblique refraction portion to increase display light brightness.

Abstract: A multi-directional output device includes a printed circuit board on which first and second magnetic sensors are arranged, and a direction control unit arranged above the printed circuit board. The direction control unit includes: first and second rotating driving bodies; first and second sliding driving bodies respectively movably connected to the first and second rotating driving bodies; first and second magnets respectively fixed on the first and second sliding driving bodies; and a lower cover on which first and second slide grooves are provided, wherein the first and second sliding driving bodies are respectively slidably arranged in the first and second slide grooves, and the first magnetic sensor and the second magnetic sensor are arranged corresponding to the first slide groove and the second slide groove, respectively.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a channel structure extending between a first source/drain region and a second source/drain region. Further, a gate electrode is arranged directly over the channel structures, and an upper interconnect contact is arranged over and coupled to the gate electrode. A backside contact is arranged below and coupled to the first source/drain region. The backside contact has a width that decreases from a bottommost surface of the backside contact to a topmost surface of the backside contact.

Abstract: Methods, systems, and devices for data management are described. A server may receive a plurality of parts of a secret from a computing device, where the plurality of parts may be individually encrypted and individually associated with respective public parts. The server may transmit a random challenge to the computing device. The computing device may transmit, to the server, a subset of parts in a decrypted state. The server may determine, using the subset of decrypted parts and a corresponding subset of respective public parts, that the subset of decrypted parts corresponds to a polynomial function with a degree corresponding to a quantity of parts in the subset of decrypted parts. The server may verify that the individually encrypted plurality of parts corresponds to a secret based on determining that the subset of decrypted parts corresponds to the polynomial function.

Abstract: An immersion cooling system includes a cooling tank, a housing and a valve. The coolant tank is configured to accommodate a liquid coolant and an electronic device immersed in the liquid coolant. The housing covers a side of the cooling tank and thereby forms an enclosure. The valve has two ports, one of which communicates with the enclosure and the other communicates with a part of the cooling tank above the liquid coolant. The valve is configured to open in response to a gas pressure inside the cooling tank exceeding an upper limit.

Abstract: An integrated circuit package and the method of forming the same are provided. The integrated circuit package may include a first die having a first substrate and a first through via extending through the first substrate, a first gap-fill layer along a sidewall of the first substrate, an isolation layer on a surface of the first substrate and a surface of the first gap-fill layer, a first bonding layer over the isolation layer, and a first bonding pad in the first bonding layer. The isolation layer may overlap an interface between the sidewall of the first substrate and a sidewall of the first gap-fill layer, and may extend on sidewalls of the first through via.

Abstract: An encoder with a light emitting diode includes: a light emitting diode, a switch module, an encoder module and a control shaft. The switch module includes an insulating base having a terminal part, a conductive elastic piece and a pressing driving body. The conductive elastic piece is disposed in the insulating base, and is disposed above the terminal part. The pressing driving body is disposed in the insulating base and is disposed above the conductive elastic piece for accommodating the light emitting diode. At least part of the encoder module is disposed in the insulating base, and the encoder module includes a magnetic sensor, a magnetic ring and a rotating driving body. The control shaft passes through a penetration hole of the rotating driving body, and is disposed above the pressing driving body.

Abstract: A solid-state storage device is provided, which includes a non-volatile memory, a temperature sensor, and a controller. The temperature sensor is configured to periodically detect a current temperature of the non-volatile memory. The controller is configured to periodically obtain the current temperature from the temperature sensor. The controller is configured to activate a dynamic temperature control mechanism of the solid-state storage device. The dynamic temperature control mechanism includes a temperature control state table having a plurality of temperature control states and their corresponding state values. The controller is further configured to calculate a temperature difference value between the current temperature and a previous temperature of the non-volatile memory, and accumulate the temperature difference value to obtain a temperature accumulation value.