Patents by Inventor Hsiu Chen

Hsiu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230409860
    Abstract: An electronic card capable of light-emitting display includes a card body, electrical control module, light-emitting module and light-guiding module. The card body has a light-penetrable border portion having a surface on which an oblique refraction portion is disposed. The electrical control module is disposed in the card body and includes a circuit control carrier plate and a non-contact type radio-frequency antenna or a contact type communication chip. The light-emitting module is disposed in the card body and electrically connected to the circuit control carrier plate. The light-guiding module is disposed in the card body and corresponds in position to the light-emitting module. During personal data or transaction data exchange carried out with the card body, light emitted from the light-emitting module driven by the electrical control module is guided by the light-guiding module to the light-penetrable border portion, allowing the oblique refraction portion to increase display light brightness.
    Type: Application
    Filed: December 14, 2022
    Publication date: December 21, 2023
    Inventors: JEN-HSIANG LIU, JUNG-HSIU CHEN
  • Publication number: 20230389231
    Abstract: The present disclosure provides an immersion cooling system for a server cabinet including a plurality of server boxes, a cooling tank and a plurality of liquid connecting pipes. Each server box includes an electronic device immersed in the cooling liquid, and the electronic device generates a thermal energy so that part of the cooling liquid evaporates into a hot vapor. The cooling tank is connected to the plurality of server boxes and includes a condenser and a storage part. The condenser is connected to each server box and condenses the hot vapor to form the cooling liquid. The storage part storages the cooling liquid from the condenser. Two ends of the liquid connecting pipe is connected to the storage part and the server box respectively. The cooling liquid in the storage part and the cooling liquid of each server box are maintained in a same liquid level.
    Type: Application
    Filed: August 8, 2022
    Publication date: November 30, 2023
    Inventors: Li-Hsiu Chen, Ming-Tang Yang, Wei-Chih Lin, Peng-Yuan Chen, Sheng-Chi Wu, Ren-Chun Chang, Wen-Yin Tsai
  • Publication number: 20230369460
    Abstract: Provided are a semiconductor structure and a manufacturing method thereof. The manufacturing method of the semiconductor structure includes the following. A gate structure is formed on a substrate. A tilt implanting process is performed to implant group IV elements into the substrate to form a doped region, and the doped region is located on two sides of the gate structure and partially located under the gate structure. A part of the substrate on two sides of the gate structure is removed to form a first recess. A cleaning process is performed on the surface of the first recess. A wet etching process is performed on the first recess to form a second recess. A semiconductor layer is formed in the second recess.
    Type: Application
    Filed: June 9, 2022
    Publication date: November 16, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Kuang-Hsiu Chen, Wei-Chung Sun, Chao Nan Chen, Chun-Wei Yu, Kuan Hsuan Ku, Shao-Wei Wang
  • Patent number: 11817361
    Abstract: A method includes forming a first passivation layer, forming a metal pad over the first passivation layer, forming a planarization layer having a planar top surface over the metal pad, and patterning the planarization layer to form a first opening. A top surface of the metal pad is revealed through the first opening. The method further includes forming a polymer layer extending into the first opening, and patterning the polymer layer to form a second opening. The top surface of the metal pad is revealed through the second opening.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Hsiu Chen, Wen-Chih Chiou, Chen-Hua Yu
  • Patent number: 11817253
    Abstract: A coil module is provided, including a second coil mechanism. The second coil mechanism includes a third coil assembly and a second base corresponding to the third coil assembly. The second base has a positioning assembly corresponding to a first coil mechanism.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: November 14, 2023
    Assignee: TDK TAIWAN CORP.
    Inventors: Feng-Lung Chien, Tsang-Feng Wu, Yuan Han, Tzu-Chieh Kao, Chien-Hung Lin, Kuang-Lun Lee, Hsiang-Hui Hsu, Shu-Yi Tsui, Kuo-Jui Lee, Kun-Ying Lee, Mao-Chun Chen, Tai-Hsien Yu, Wei-Yu Chen, Yi-Ju Li, Kuei-Yuan Chang, Wei-Chun Li, Ni-Ni Lai, Sheng-Hao Luo, Heng-Sheng Peng, Yueh-Hui Kuan, Hsiu-Chen Lin, Yan-Bing Zhou, Chris T. Burket
  • Publication number: 20230360992
    Abstract: A method includes forming a first passivation layer, forming a metal pad over the first passivation layer, forming a planarization layer having a planar top surface over the metal pad, and patterning the planarization layer to form a first opening. A top surface of the metal pad is revealed through the first opening. The method further includes forming a polymer layer extending into the first opening, and patterning the polymer layer to form a second opening. The top surface of the metal pad is revealed through the second opening.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 9, 2023
    Inventors: Yi-Hsiu Chen, Wen-Chih Chiou, Chen-Hua Yu
  • Publication number: 20230352587
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
    Type: Application
    Filed: July 4, 2023
    Publication date: November 2, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuang-Hsiu Chen, Sung-Yuan Tsai, Chi-Hsuan Tang, Chun-Wei Yu, Yu-Ren Wang
  • Patent number: 11772858
    Abstract: An airtight device includes a container and an airtight cover on the container, and the airtight cover includes a fixing bracket, a door, and a pressuring handle. The fixing bracket has a through hole and a guiding slot, and the through hole communicates with internal space of the container. The guiding slot has adjacent first and second top surfaces, and the second top surface is higher than the first top surface. The door selectively covers the through hole. The pressuring handle pivoted on the door has a first section, a second section, and a rotating axis between the first and second sections, and the first section rotates relative to the second section. The second section receives a force to drive the first section to move from below the second top surface to below the first top surface such that the rotating axis pressures the door.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: October 3, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chia-Hsing Chen, Chiu-Chin Chang, Yan-Hui Jian, Chih-Jui Chen, Chen-Hsiu Lee, Hsuan-Ting Liu, Chin-Lung Liu, Kuan-Lung Wu, Li-Hsiu Chen, Wen-Yin Tsai
  • Patent number: 11755870
    Abstract: A light emitting electronic card includes a card body, an electronic control module, a light emitting module and a light guide module. The card body includes a panel, a base plate, a light transmissive portion, a first light shielding portion and a second light shielding portion. The electronic control module is disposed at the card body, and includes a circuit control carrier board and a non-contact type radio-frequency (RF) antenna or a contact type communication chip. The light emitting module is disposed in the card body and is electrically connected to the circuit control carrier board. The light guide module is disposed in the card body and corresponds to the light emitting module, includes a light source focusing portion corresponding to the light transmissive portion, and guides a light source of the light emitting module to the light transmissive portion by the light source focusing portion.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: September 12, 2023
    Assignee: BEAUTIFUL CARD CORPORATION
    Inventors: Jen-Hsiang Liu, Jung-Hsiu Chen
  • Publication number: 20230281094
    Abstract: A creating method of a classification model about a hard disk efficiency problem comprising: by an analyzing device, performing: obtaining a plurality of pieces of measurement data of a plurality of hard disk devices each of which comprises a plurality of values of a plurality of vibration parameters; binarizing the plurality of pieces of measurement data based on a plurality of preset conditions respectively corresponding to the plurality of vibration parameters; and obtaining the classification model about the hard disk efficiency problem based on the plurality of pieces of binarized measurement data and a decision tree algorithm.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 7, 2023
    Inventors: Yi-Ju LIAO, JEN-YUAN CHANG, PO-HSIU CHEN, Hsieh-Liang TSAI
  • Publication number: 20230284410
    Abstract: A server chassis including a chassis body, at least one damper and a fan frame. The at least one damper is fixed to the chassis body. The fan frame is disposed on the chassis body via the at least one damper. The at least one damper is a magnetorheological fluid damper.
    Type: Application
    Filed: September 9, 2022
    Publication date: September 7, 2023
    Inventors: HAN-SHENG CHEN, JEN-YUAN CHANG, PO-HSIU CHEN, Hsieh-Liang TSAI
  • Publication number: 20230281453
    Abstract: A creating method of a classification model about a hard disk efficiency problem comprising: by an analyzing device, performing: obtaining pieces of training data of hard disk devices and each of the pieces of training data including vibration parameters and provided with preset output results; inputting the pieces of training data to an artificial neural network model; training the artificial neural network model to make the artificial neural network model output the corresponding preset output results according to the vibration parameters of the pieces of training data; regarding the trained artificial neural network model as the classification model about the hard disk efficiency problem. By the classification model about the hard disk efficiency problem created by the aforementioned method, the reason of lowering hard disk efficiency is successfully found.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 7, 2023
    Inventors: Yi-Ju LIAO, JEN-YUAN CHANG, PO-HSIU CHEN, Hsieh-Liang TSAI
  • Publication number: 20230281093
    Abstract: A creating method of a classification model about a hard disk efficiency problem comprising: by an analyzing device, performing: obtaining a plurality of pieces of measurement data of a plurality of hard disk devices each of which comprises a plurality of values of a plurality of vibration parameters; discretizing the plurality of pieces of measurement data based on a k-means algorithm; and obtaining the classification model about the hard disk efficiency problem based on the plurality of pieces of discretized measurement data and a decision tree algorithm.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 7, 2023
    Inventors: Yi-Ju LIAO, JEN-YUAN CHANG, PO-HSIU CHEN, Hsieh-Liang TSAI
  • Patent number: 11735661
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: August 22, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuang-Hsiu Chen, Sung-Yuan Tsai, Chi-Hsuan Tang, Chun-Wei Yu, Yu-Ren Wang
  • Patent number: 11699694
    Abstract: Methods of manufacturing a semiconductor package structure are provided. A method includes: bonding dies and dummy dies to a wafer; forming a dielectric material layer on the wafer to cover the dies and the dummy dies; performing a first planarization process to remove a first portion of the dielectric material layer over top surfaces of the dies and the dummy dies; and performing a second planarization process to remove portions of the dies, portions of the dummy dies and a second portion of the dielectric material layer, and a dielectric layer is formed laterally aside the dies and the dummy dies; wherein after the second planarization process is performed, a total thickness variation of the dies is less than a total thickness variation of the dummy dies.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: July 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsiu Chen, Chen-Hua Yu, Ming-Fa Chen, Wen-Chih Chiou
  • Patent number: 11688639
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a first semiconductor device and a second semiconductor device are formed within a semiconductor wafer and a scribe region between the first semiconductor device and the second semiconductor device is patterned. A singulation process is then utilized within the scribe region to singulate the first semiconductor device from the second semiconductor device. The first semiconductor device and the second semiconductor device are then bonded to a second semiconductor substrate and thinned in order to remove extension regions from the first semiconductor device and the second semiconductor device.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: June 27, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Hung-Pin Chang, Yi-Hsiu Chen, Ku-Feng Yang, Wen-Chih Chiou
  • Patent number: 11685408
    Abstract: Aspects of the disclosure provide for the generation of a driving difficulty heat map for autonomous vehicles. For instance, log data generated by a vehicle being driven in a manual driving mode for a segment of a route may be input into a disengage model in order to generate an output identifying a likelihood of a vehicle driving in an autonomous driving mode requiring a disengage from the autonomous driving mode along the segment of the route. The log data may have been collected within a geographic area. A grid for the geographic area may be generated. The grid may include a plurality of cells. The output is assigned to one of the plurality of cells. The plurality of cells and assigned output may be used to generate a driving difficulty heat map for the geographic area.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: June 27, 2023
    Assignee: WAYMO LLC
    Inventors: Xiaoyue Zhao, Henning Hohnhold, Yin-Hsiu Chen, Xiang Gao, Ajay Joshi, Kevin Cao
  • Publication number: 20230138504
    Abstract: An online signing system and method, a computing apparatus, and a computer-readable recording medium are provided. An assigned task is generated by a task assignment apparatus to the computing apparatus. The computing apparatus generates a signing request based on the assigned task to be transmitted to a client apparatus. The client apparatus downloads an assignment file from a storage database based on the signing request to display the assignment file on a display. The client apparatus receives an input via an input unit to generate a signature object on the assignment file, and transmits the signature object to the computing apparatus. After receiving the signature object, the computing apparatus combines the signature object and the assignment file to obtain a signed file, and transmits the signed file to the storage database.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 4, 2023
    Applicant: KDAN MOBILE SOFTWARE LTD.
    Inventors: Po-Chou Su, Hsuan Tu, Nan-Kuang Lee, Jia-Rou Lee, Weichih Sun, Kai-Yi Wu, Ying-Hsiu Chen
  • Patent number: 11637241
    Abstract: A RRAM and its manufacturing method are provided. The RRAM includes an interlayer dielectric layer, a first bottom contact structure, and a second bottom contact structure formed on a substrate. A first memory cell is formed on the first bottom contact structure. The first memory cell includes a first bottom electrode layer which includes a first conductive region. A pattern in which the first conductive region is vertically projected on the first bottom contact structure is a first projection pattern. A second memory cell is formed on the second bottom contact structure. The second memory cell includes a second bottom electrode layer which includes a second conductive region. A pattern in which the second conductive region is vertically projected on the second bottom contact structure is a second projection pattern. The second projection pattern is different from the first projection pattern.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: April 25, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Meng-Hung Lin, Bo-Lun Wu, Po-Yen Hsu, Ying-Fu Tung, Han-Hsiu Chen
  • Publication number: 20230097129
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer and a second spacer around the gate structure; forming a recess adjacent to two sides of the second spacer; performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; and forming an epitaxial layer in the recess.
    Type: Application
    Filed: December 1, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu