Abstract: A method of charging management of an electric vehicle includes: get an initial power of the electric vehicle; calculate an actual power consumption of the electric vehicle in an operation period; get a remaining power by subtracting the actual power consumption from the initial power; get a predicted power consumption of the electric vehicle in a next operation period; control a charging machine to charge the electric vehicle after the electric vehicle being connected to the charging machine until a power of the electric vehicle reaches the predicted power consumption from the remaining power, thereby avoiding wasting power due to overcharging.

Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor device includes a fin protruding from a substrate and an isolation structure surrounding the fin. The semiconductor device also includes a first channel layer and a second channel layer formed over the fin and at least partially overlapping the isolation structure. The semiconductor device further includes a gate structure formed in a space between the first channel layer and the second channel layer and wrapping around the first channel layer and the second channel layer.

Abstract: A semiconductor device according to the present disclosure includes a first isolation feature and a second isolation feature, a fin structure extending lengthwise along a first direction and sandwiched between the first isolation feature and the second isolation feature along a second direction perpendicular to the first direction, a first channel member disposed over the first isolation feature, a second channel member disposed over the second isolation feature, and a gate structure disposed over and wrapping around the first channel member and the second channel member.

Abstract: A semiconductor structure includes a semiconductor fin extending from a substrate, a source/drain (S/D) feature disposed over the semiconductor fin, a silicide layer disposed over the S/D feature, where the silicide layer extends along a sidewall of the S/D feature, and an etch-stop layer (ESL) disposed along a sidewall of the silicide layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first epitaxial structure and a second epitaxial structure spaced apart from the first epitaxial structure. The semiconductor device structure also includes a conductive contact electrically connected to the first epitaxial structure and a first conductive via over the conductive contact. The semiconductor device structure further includes a second conductive via directly above the second epitaxial structure. The second conductive via is longer than the first conductive via.

Abstract: An assembly has a wheel and a nonpneumatic tire. The nonpneumatic tire includes a plurality of helical springs. Each helical spring includes a first end portion, a second end portion, and an arching middle portion. Each helical spring being is interlaced with at least one other helical spring thereby forming a laced toroidal structure extending about an entire circumference of the nonpneumatic tire. The toroidal structure supports an entire load placed on the nonpneumatic tire. The plurality of helical springs are constructed of a predetermined material that maintains strength and ductility down to 17 K.

Abstract: Methods, devices, and systems for expression transfer are disclosed. The disclosure includes capturing a first image of a face of a person. The disclosure includes generating an avatar based on the first image of the face of the person, with the avatar approximating the first image of the face of the person. The disclosure includes transmitting the avatar to a destination device. The disclosure includes capturing a second image of the face of the person on a source device. The disclosure includes calculating expression information based on the second image of the face of the person, with the expression information approximating an expression on the face of the person as captured in the second image. The disclosure includes transmitting the expression information from the source device to the destination device. The disclosure includes animating the avatar on a display component of the destination device using the expression information.

Abstract: Methods for manufacturing a semiconductor structure are provided. The semiconductor structure includes a substrate a substrate and channel layers vertically stacked over the substrate. The semiconductor structure also includes a dielectric fin structure formed adjacent to the channel layers and a gate structure abutting the channel layers and the dielectric fin structure. The semiconductor structure also includes a source/drain structure attached to the channel layers and a contact formed over the source/drain structure. The semiconductor structure also includes a Si layer covering a portion of a top surface of the source/drain structure. In addition, the Si layer is sandwiched between the dielectric fin structure and the contact.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an epitaxial structure over the fin portion. The semiconductor device structure includes a dielectric fin over the base portion. The semiconductor device structure includes a silicide layer between the dielectric fin and the epitaxial structure. A void is between the silicide layer and the dielectric fin.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method comprises forming a fin over a substrate, wherein the fin comprises a first semiconductor layer and a second semiconductor layer including different semiconductor materials, and the fin comprises a channel region and a source/drain region; forming a dummy gate structure over the channel region of the fin and over the substrate; etching a portion of the fin in the source/drain region to form a trench therein, wherein a bottom surface of the trench is below a bottom surface of the second semiconductor layer; selectively removing an edge portion of the second semiconductor layer in the channel region such that the second semiconductor layer is recessed; forming a sacrificial structure around the recessed second semiconductor layer and over the bottom surface of the trench; and epitaxially growing a source/drain feature in the source/drain region of the fin.

Abstract: Method and devices for processing audio signals based on sound profiles are provided. A sound profile can include data related to haptic movement of the audio data which is specific to a left ear or a right ear, demographic information, ethnicity information, age information, location information, social media information, intensity score of the audio data, previous usage information, or device information. A sound profile can be customized for individual user to include the inaudible frequency range at high frequency end and low frequency end. Audio data within the inaudible frequency range can be compensated by haptic movement corresponding to the inaudible frequency range. A sound profile can further include an audio frequency range and its lowest audible volume for a user. A sound profile can be provided to a user without any action from the user's part.

Abstract: A method includes forming a gate stack over a semiconductor region, and forming a first gate spacer on a sidewall of the gate stack. The first gate spacer includes an inner sidewall spacer, and a dummy spacer portion on an outer side of the inner sidewall spacer. The method further includes removing the dummy spacer portion to form a trench, and forming a dielectric layer to seal a portion of the trench as an air gap. The air gap and the inner sidewall spacer in combination form a second gate spacer. A source/drain region is formed to have a portion on an outer side of the second gate spacer.

Abstract: A semiconductor structure includes a fin disposed on a substrate, the fin including a channel region comprising a plurality of channels vertically stacked over one another, the channels comprising germanium distributed therein. The semiconductor structure further includes a gate stack engaging the channel region of the fin and gate spacers disposed between the gate stack and the source and drain regions of the fin, wherein each channel of the channels includes a middle section wrapped around by the gate stack and two end sections engaged by the gate spacers, wherein a concentration of germanium in the middle section of the channel is higher than a concentration of germanium in the two end sections of the channel, and wherein the middle section of the channel further includes a core portion and an outer portion surrounding the core portion with a germanium concentration profile from the core portion to the outer portion.

Abstract: The current disclosure describes semiconductor devices, e.g., transistors including a thin semimetal layer as a channel region over a substrate, which includes bandgap opening and exhibits semiconductor properties. Described semiconductor devices include source/drain regions that include a thicker semimetal layer over the thin semimetal layer serving as the channel region, this thicker semimetal layer exhibiting metal properties. The semimetal used for the source/drain regions include a same or similar semimetal material as the semimetal of the channel region.

Abstract: The method includes a data collection step, a setup step, a positioning step, an analysis step, and an adjustment step. The data collection step collects spatial data about a scene to be monitored. The setup step installs a number of monitoring devices and a reference device, where the reference device includes a reflector or a calibration pattern. The positioning step determines respective positions of the monitoring devices relative to the reference device. The analysis step determines whether the FOVs of the monitoring devices jointly cover the scene by an algorithm module analyzing the scene data, the FOVs of the monitoring devices, and the relative positions of the monitoring devices against the reference device. The adjustment step provides suggestions about adding one or more monitoring devices or changing positions of the monitoring devices to cover the scene entirely if the FOVs of the monitoring devices do not cover the scene.

Abstract: A water purifier structure includes a container assembly and a buffer unit mounted in the container assembly. The container assembly includes a housing and a cap unit. The housing has a first receiving section and a second receiving section. The second receiving section of the housing is provided with a retaining portion. The buffer unit is mounted in the second receiving section of the housing and includes a positioning ring secured in the retaining portion of the housing, and a cushioning member mounted in the positioning ring. The cushioning member is elastically movable in the positioning ring. When the cushioning member is compressed by a force, the cushioning member is contracted and elastically deformed toward the second receiving section of the housing, to form a buffering force.

Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a first source/drain structure and a second source/drain structure over a semiconductor substrate. The method also includes forming a dielectric layer over the first source/drain structure and the second source/drain structure and forming a conductive contact on the first source/drain structure. The method further includes forming a first conductive via over the conductive contact, and the first conductive via is misaligned with the first source/drain structure. In addition, the method includes forming a second conductive via directly above the second source/drain structure, and the second conductive via is longer than the first conductive via.

Abstract: The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.

Abstract: A semiconductor device includes a substrate; a fin structure formed on a substrate; and a gate feature formed over the fin structure, the gate feature comprising a gate dielectric layer, wherein the gate dielectric layer traverses the fin structure to overlay a central portion of the fin structure and opposite side portions of the fin structure that are located in respective undercuts formed in respective portions of a dielectric layer located adjacent to opposite sidewalls of the gate feature, wherein the undercuts extend beyond respective sidewalls of the gate feature and away from the central portion of the fin structure.