Patents by Inventor Hsuan Lin

Hsuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12360933
    Abstract: There is provided a detection system including a detection device and a post processor. The detection device and the post processor exchange data therebetween using a predetermined communication protocol. The detection device outputs at least one of calculated data and raw data to the post processor in response to each polling according to a request from the post processor. The raw data is provided to the post processor for the machine learning.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: July 15, 2025
    Assignee: PIXART IMAGING INC.
    Inventors: Yao-Hsuan Lin, Bo-Yi Chang, Sheng-Hung Wang, Yu-Chen Fu
  • Patent number: 12362003
    Abstract: An in-memory computation device and computation method are provided. The in-memory computation method includes: providing a memory cell block of a memory cell array to store a plurality of weight values, and providing a plurality of memory cells on the memory cell block to store a plurality of corresponding bits of each of the weight values; respectively transmitting a plurality of input signals to the plurality of bit lines through an input buffer; providing the plurality of memory cells to perform a multiplication operation of the plurality of input signals and the plurality of weight values to generate a plurality of first operation results respectively corresponding to a plurality of bit orders; and performing an addition operation on the plurality of first operation results to generate a second operation result according to the plurality of bit orders by a sense amplifier.
    Type: Grant
    Filed: April 19, 2023
    Date of Patent: July 15, 2025
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Yu-Hsuan Lin, Po-Hao Tseng, Feng-Min Lee, Ming-Hsiu Lee
  • Patent number: 12356342
    Abstract: A power-adjusting method for uplink transmission is provided. The power-adjusting method is applied to user equipment (UE). In response to the UE transmitting a first packet carrying a specific message to a network node, the power-adjusting method includes the UE increasing the transmission power to transmit the first packet.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: July 8, 2025
    Assignee: MEDIATEK INC.
    Inventors: Chih-Chieh Lai, Yi-Hsuan Lin, Ming-Yuan Cheng, Wei-Yu Lai, Wei-Jen Chen
  • Publication number: 20250205038
    Abstract: A tissue scaffold is provided. The tissue scaffold includes a textile formed by interweaving a plurality of warp yarns and a plurality of weft yarns. The textile includes a first region and a second region, and the second region is adjacent to the first region. The plurality of warp yarns have different diameters in the first region and the second region. The textile has a plurality of pores, and the size of each of the plurality of pores is between 100 ?m and 800 ?m. A method of manufacturing the aforementioned tissue scaffold is also provided.
    Type: Application
    Filed: December 27, 2023
    Publication date: June 26, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Chieh Huang, Lih-Tao HSU, Cheng-Yi WU, Meng-Hsueh LIN, Hui-Ting HUANG, Chen-Hsuan LIN, Yi-Hung WEN, Fang-Chieh CHANG, Hsin-Hsin SHEN, Pei-I TSAI, Jun-Jae HUANG
  • Patent number: 12342629
    Abstract: An ESD protection device includes a substrate, an epitaxial layer, first to third well regions, and first to sixth doped regions. The first to third well regions are disposed in the epitaxial layer. The third well region is disposed between the first and second well regions. The first and second doped regions are disposed on the first well region and coupled to a pad. The third and fourth doped regions are disposed on the second well region and coupled to a ground terminal. The fifth doped region is disposed on the third well region, and the sixth doped region is disposed in the fifth doped region. The third, fifth, and sixth doped regions have the same conductive type. In response to an electrostatic discharge event occurring on the pad, a discharge path is formed between the pad and the ground terminal.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: June 24, 2025
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yeh-Ning Jou, Jian-Hsing Lee, Chieh-Yao Chuang, Hsien-Feng Liao, Ting-Yu Chang, Chih-Hsuan Lin, Wen-Hsin Lin, Hwa-Chyi Chiou
  • Publication number: 20250180361
    Abstract: A visual vehicle-positioning fusion system and a method thereof is provided. In the method, an image point cloud map stored in a storage device is converted into a longitude and latitude database corresponding to the image point cloud map. Longitude and latitude measurement coordinates received by a positioning device are used as first location information. The longitude and latitude database is compared with the longitude and latitude measurement coordinates to generate the initial location of a vehicle. Feature matching is performed on the initial location and the image point cloud map to generate second location information of the vehicle on the image point cloud map. The first location information or the second location information is selected as a final positioning output information and outputted based on a positioning fusion rule.
    Type: Application
    Filed: December 4, 2023
    Publication date: June 5, 2025
    Applicant: Automotive Research & Testing Center
    Inventors: Chih-Yuan HSU, Nong-Hong LIN, Ting-Fu JHU, You-Sian LIN, Shih-Hsuan LIN
  • Publication number: 20250174295
    Abstract: A memory device test system includes a memory device, a tester, a system board, and an interface card. The tester generates a first control signal corresponding to a test being performed to the memory device. The system board is coupled to the tester and generates, in response to the first control signal, a second control signal to the memory device. The interface card is coupled to the tester, the system board, and the memory device and transmits to the memory device, in response to a switch signal received from the tester, a power signal from the tester through a first conductive path or from the system board through a second conductive path. The memory device generates, in response to the power signal and the second control signal, an output signal corresponding to the test to the tester.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 29, 2025
    Inventors: Yi-Kai HUANG, Hung-Kai CHAN, Ting Hsuan LIN
  • Publication number: 20250162684
    Abstract: A bicycle power-saving crank includes: a base arm connected at one end to a chainwheel and rotatable synchronously with the chainwheel; a base sprocket, fixed to the base arm and facing in the chainwheel; an outer sprocket, rotatably connected to the other end of the base arm via an outer spindle; a transmission component, rotatably connected to the base sprocket and the outer sprocket; and an outer arm, rotatably connected to the outer spindle and a pedal and rotatable synchronously with the outer sprocket. When the base arm extends horizontally in the travel direction, while the axial extension line of the outer arm forms a 12° angle relative to the horizontal extension line of the base arm. This design ensures that, throughout the pedaling process, the outer arm consistently maintains an angle of 12° relative to the base arm, regardless of its rotational angle, thereby enhancing pedaling efficiency.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 22, 2025
    Inventors: CHING-CHANG LO, CHIN-CHU WANG, TING-YUAN WANG, LI-CHIEH LO, TING-HUI WANG, CHUNG-HSUAN LIN
  • Patent number: 12300715
    Abstract: A capacitor structure is provided. The capacitor structure includes a first electrode and a second electrode. The first electrode includes a first segment and a third segment. The second electrode includes a second segment and a fourth segment, the second segment is interposed between the first segment and the third segment, and the third segment is interposed between the second segment and the fourth segment. A first distance is between the first segment and the second segment, and a second distance between the second segment and the third segment. The first distance is different from the second distance.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: May 13, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chang-Yu Huang, Yi Hsuan Lin, Chih-Pin Hung
  • Publication number: 20250149524
    Abstract: A package structure includes a frontside redistribution layer (RDL) structure with a recessed portion, a lower encapsulation layer on the frontside RDL structure and a plurality of through vias connected to the frontside RDL structure to an upper package, a first semiconductor die on the frontside RDL structure and in the lower encapsulation layer, and an integrated passive device (IPD) connected to the frontside RDL structure in the recessed portion that connects to the first semiconductor die. A method of forming a package structure includes forming a molded portion with a lower encapsulation layer, a plurality of through vias in the lower encapsulation layer and a first semiconductor die in the lower encapsulation layer, forming a RDL structure with a recessed portion on the molded portion, the plurality of through vias connect the frontside RDL structure to an upper package, and attaching an IPD in the recessed portion.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 8, 2025
    Inventors: Chun-Sheng Fan, Ta-Hsuan Lin, Hua-Wei Tseng, Wei-Cheng Wu
  • Publication number: 20250137955
    Abstract: An environment detection apparatus is provided. In one embodiment, the detection apparatus comprises: a first sensing device, a second sensing device in fluid communication with the first sensing device and a spectrum analyzer electrically connected to the first sensing device and the second sensing device. The first sensing device includes a pair of first electrodes configured to provide a first alternating current signal directly to a gas flowing into the first sensing device. The second sensing device includes a first filter configured to capture a solid in the gas flowing into the second sensing device and a pair of second electrodes configured to provide a second alternating current signal directly to the first filter with the solid captured by the first filter.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 1, 2025
    Inventors: MING DA YANG, CHUN-HSUAN LIN, CHWEN YU
  • Publication number: 20250141220
    Abstract: An ESD protection circuit is coupled to a first pad and includes an ESD detection circuit, a P-type transistor, an N-type transistor, and a discharge circuit. The ESD detection circuit determines whether an ESD event occurs on the first pad to generate a detection signal at a first node. The P-type transistor comprises a source coupled to the first pad, a drain coupled to a second node, and a gate coupled to the first node. The N-type transistor comprises a drain coupled to the second node, a source coupled to a ground, and a gate coupled to a second pad. The discharge circuit is coupled between the first pad and the ground and controlled by a driving signal at the second node. When the ESD protection circuit is in an operation mode, the first pad receives a first voltage, and a second pad receives a second voltage.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 1, 2025
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Hsuan LIN, Shao-Chang HUANG, Yeh-Ning JOU, Chieh-Yao CHUANG, Hwa-Chyi CHIOU, Wen-Hsin LIN, Kai-Chieh HSU, Ting-Yu CHANG, Hsien-Feng LIAO
  • Publication number: 20250139226
    Abstract: An automatic system updating apparatus and method are provided, which identifies the event of system update and collects the updating results to the allowlist. The apparatus determines whether at least one pending event intercepted from a file system belongs to a system update event based on a plurality of update rules. The apparatus executes the at least one pending event and generates at least one executable file corresponding to the at least one pending event in response to the at least one pending event belonging to the system update event, and the new generated at least one executable file is not included in an allowlist. The apparatus adds the at least one executable file corresponding to the at least one pending event to the allowlist based on a security setting.
    Type: Application
    Filed: October 24, 2024
    Publication date: May 1, 2025
    Inventors: Tzi-Cker CHIUEH, Lap-Chung LAM, Li-Ting HUANG, Hsuan-Lin CHENG, Xu-Kang WU, Dong-Shen WU
  • Publication number: 20250140667
    Abstract: In a semiconductor package having a redistribution structure, two or more semiconductor dies are connected to a first side of the redistribution structure and an encapsulant surrounds the two or more semiconductor dies. An integrated passive device (IPD) is connected on a second side of the redistribution structure. The second side is opposite to the first side and the IPD is electrically coupled to the redistribution structure. An interconnect device is connected on the second side of the redistribution structure and is electrically coupled to the redistribution structure. Two or more external connections are on the second side of the redistribution structure and are electrically coupled to the redistribution structure.
    Type: Application
    Filed: February 28, 2024
    Publication date: May 1, 2025
    Inventors: Chih-Chiang Chang, Hua-Wei Tseng, Ta-Hsuan Lin, Wei-Cheng Wu, Der-Chyang Yeh
  • Patent number: 12289692
    Abstract: A method for improving transmission power management with compliance to regulations of radiofrequency exposure, which may comprise: at a current time, estimating whether a window average power, which may reflect average power transmitted using a radio technology during a moving time window, will exceed a power limit after the current time; if true, proceeding to at least one of a first handling subroutine and a second handling subroutine to set a power cap, and causing power transmitted to be capped by the power cap after the current time. The first handling subroutine may comprise: scheduling to set the power cap lower at a scheduled time. Estimating whether the window average power will exceed the power limit may involve discarding one of a plurality of power records. The second handling subroutine may comprise: setting the power cap not higher than the discarded one of the plurality of power records.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: April 29, 2025
    Assignee: MEDIATEK INC.
    Inventors: Yi-Hsuan Lin, Han-Chun Chang, Chih-Yuan Lin, Yi-Ying Huang
  • Patent number: 12286511
    Abstract: The present disclosure provides a low-dissipation flexible copper clad laminate, which includes a copper foil and a polyimide film. The polyimide film is attached to the copper foil. The polyimide film includes a polyimide, and the polyimide has a structure represented by formula (I). Formula (I) is defined as in the specification.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: April 29, 2025
    Assignee: CPC Corporation, Taiwan
    Inventors: Ching-Hsuan Lin, Wan-Ling Hsiao
  • Patent number: 12283623
    Abstract: A semiconductor structure includes a substrate, a conductive region, a first insulation layer, a second insulation layer, a gate structure, a low-k spacer, a gate contact, and a conductive region contact. The low-k spacer is formed between a sidewall of the gate structure and the first insulation layer. The gate contact is landed on a top surface of the gate structure. A proximity distance between a sidewall of the gate contact and the conductive region contact along a top surface of the second insulation layer is in a range of from about 4 nm to about 7 nm. A method for manufacturing a semiconductor structure is also provided.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: April 22, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hsuan Lin, Hsi Chung Chen, Chih-Teng Liao
  • Patent number: 12284790
    Abstract: An electronic apparatus with convenient airflow-reversing function includes a chassis, a rotation mechanism, a fan device, a connection rod, and a handle. The chassis includes a bottom plate. The rotation mechanism is pivoted on the bottom plate. The fan device is disposed on the rotation mechanism. The connection rod is pivoted on the rotation mechanism. The handle is pivoted on the chassis, and is rotatably connected to the connection rod. When the handle is rotated, the connection rod drives the rotation mechanism and the fan device to rotate to change the airflow direction.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: April 22, 2025
    Assignee: Nanning FuLian FuGui Precision Industrial Co., Ltd.
    Inventor: Chih-Hsuan Lin
  • Publication number: 20250125505
    Abstract: An electronic device includes a battery module, a battery connector and a controller is provided. The battery connector includes a first connector and a second connector. The first connector is installed on the battery module and includes a first metal component and an enable pin. The first metal component is disposed on a housing of the first connector and is coupled to the enable pin. The second connector includes a second metal component, a detection pin and a ground pin. The second metal component is disposed on a housing of the second connector. The detection pin is coupled to the second metal component. The ground pin is coupled to a ground potential and its position corresponds to the position of the enable pin. The controller determines a connection status of the first connector and the second connector according to an external signal on the detection pin.
    Type: Application
    Filed: August 11, 2024
    Publication date: April 17, 2025
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Hao-Hsuan Lin, Yu-Hsiu Su, Yu-Cheng Shen, Shih-Hsiang Kao, Wan-Ling Wong, Min-Che Kao, Yu-Lung Wu, Yen-Po Liao
  • Publication number: 20250125223
    Abstract: A method includes forming a metal pad, depositing a passivation layer on the metal pad, and planarizing the passivation layer, so that the passivation layer includes a planar top surface. The method further includes etching the passivation layer to form an opening in the passivation layer, wherein the metal pad is exposed to the opening, and forming a conductive via including a lower portion in the opening, and an upper portion higher than the passivation layer. A polymer layer is then dispensed to cover the conductive via.
    Type: Application
    Filed: January 17, 2024
    Publication date: April 17, 2025
    Inventors: Wan-Yu Lee, Ta-Hsuan Lin, Hua-Wei Tseng, Wei-Cheng Wu